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Software estimation of the performance of a communication system is very time-consuming. Moreover, many variables (sampling frequency, digital format, carrier resolution, rounding and quantization etc.) have to be optimized while satisfying the best trade-off between performances and complexity. In order to speed up the final parameter optimization of a design, we propose to perform direct hardware simulation (emulation) on an FPGA. Such a simulation needs a hardware emulation of the communication channel. To do so, we have designed a hardware White Gaussian Noise Generator (WGNG) in an FPGA circuit. High accuracy, fast and low-cost hardware are achieved by combining the Box-Muller and Central limit methods. The design is fully parameterizable and the performance of the WGNG is entirely characterized with a MATLAB program. This WGNG is also used to generate more complex channels, such as Rayleigh channel and Rice channel. Emmanuel Boutillon received the engineering degree in telecommunications and his PhD in 1995, both from the Ecole Nationale Superieure des Telecommunications (Paris). From 1992 to 2000, he worked at ENST, with a one year sabbatical stay at UofT in 1998. He is currently a professor at the University of South Brittany where he conducts research in the field of VLSI for digital communications. |