Abstract
Processor architects critically need software tools that accurately track architectural changes made during exploration, and provide fast and quantitative feedback for each design point. A key component for such exploration is an architecture-sensitive compiler that can exploit architectural and micro-architectural features inserted by the designer. Indeed, Design Space Exploration (DSE) without a compiler-in-the-loop (CIL) to exploit such features can be meaningless. In this talk I will present a CIL framework for processor architecture DSE. The framework is developed around EXPRESSION, an Architecture Description Language (ADL) that captures the functionality and structure of the processor at a high level. A software toolkit comprising an optimizing compiler, an instruction-set simulator and a cycle-accurate simulator are parameterized from the ADL, allowing for early estimation of performance, power and code size. System designers can modify the ADL to re?ect architectural changes; for each change, the applications are re-evaluated using the architecture-sensitive compiler and the cycle-accurate simulator and feedback on performance as well as power is provided. In this talk I will highlight the need and usefulness of our CIL DSE methodology on the Intel XScale architecture, and present results for the exploration of several facets of processor architecture exploration, including exploration of the Instruction Set Architecture (ISA), partial bypassing of the processor pipeline, processor-memory bus interface, and the cache organization.
Biography
Nikil D. Dutt is currently Professor of CS and EECS at the University of California, Irvine. He received a Ph.D. in Computer Science from the University of Illinois at Urbana-Champaign in 1989. His research interests are in embedded systems design automation, computer architecture, optimizing compilers, system specification techniques, and distributed embedded systems. He leads the ACES (Architectures and Compilers for Embedded Systems) group at UCI ( http://www.cecs.uci.edu/~aces ). He is a coauthor of five books and over 200 journal and conference publications. He received best paper awards at CHDL'89, CHDL'91, VLSI Design 2003, CODES+ISSS 2003, CNCC 2006, and ASPDAC 2006. Professor Dutt currently serves as Editor-in-Chief of ACM Transactions on Design Automation of Electronic Systems (TODAES) and as Associate Editor of ACM Transactions on Embedded Computer Systems (TECS). He was an ACM SIGDA Distinguished Lecturer during 2001-2002, and an IEEE Computer Society Distinguished Visitor for 2003-2005. He has served on the steering, organizing, and program committees of several premier CAD and Embedded System Design conferences and workshops, including ASPDAC, CASES, CODES+ISSS, DATE, ICCAD, ISLPED and LCTES. He is a senior member of the IEEE, serves or has served on the advisory boards of ACM SIGBED and ACM SIGDA, and is Vice-Chair of IFIP WG 10.5.