Abstract
We have implemented customized SIMD 16-bit floating point instructions on a NIOS II processor. On several image processing and media benchmarks for which the accuracy and dynamic range of this format is sufficient, a speed-up ranging from 1.5 to more than 2 is obtained versus the integer implementation. The hardware overhead remains limited and is compatible with the capacities of to-day FPGAs. In this presentation, we discuss the integer versus floating point issues for image and media processing, the accuracy and dynamic range of 16-bit floating point data, the corresponding hardware costs compared to integer or 32-bit floating point operators and we explain the speedup that is obtained compared to the integer or 32-bit floating point versions.
Biography
Daniel Etiemble is a professor in at the University de Paris Sud. His research interests are at the intersection of microelectronics and computer science. They include VLSI design of binary and multivalued circuits in various technologies, the impact of VLSI technologies on computer architectures and computer performances, the performance of memory hierarchies in PC implementations, the performance evaluation of interconnection networks for parallel and distributed architectures and computer arithmetic.