Abstract
Several modern systems, from ubiquitous mobile phones to powerful gaming machines, contain multiple heterogeneous processing cores. In a modern phone, for example, a general purpose processor manages the human machine interface, while a DSP manages the baseband signal processing. Usually, these heterogeneous multi-processor systems isolate tasks, and execute the isolated tasks in separate processors.
In this seminar a novel heterogeneous multiprocessor pipeline system is described, where a single streaming application is executed by multiple processors. Recent developments in Application Specific Instruction Set Processors (particularly from Tensilica Inc), have driven the creation of these multi processor pipelines. Each processor in the pipeline is customized with differing instructions and cache sizes to improve performance of the whole system while minimizing the increase in area. Differing configurations are rapidly explored, and an automated method to choose the best arrangement is shown. Finally, the possibilities of merging pipeline systems are discussed, and the system level software needed to schedule, context switch, and meet real-time deadlines in a merged pipeline is examined.
Biography
Sri Parameswaran is an Associate Professor in the School of Computer Science and Engineering. He also serves as the Program Director for Computer Engineering at the University of New South Wales. Sri has received the Faculty of Engineering Teaching Staff Excellence Award in 2005. His research interests are in System Level Synthesis, Low power systems, High Level Systems and Network on Chips. He served on the Program Committees of numerous International Conferences, such as Design and Test in Europe (DATE), the International Conference on Computer Aided Design (ICCAD), the International Conference on Hardware/Software Codesign and System Synthesis (CODES-ISSS), Asia South Pacific Design Automation Conference (ASP-DAC) and the International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES). Sri has received best paper nominations from the International Conference on VLSI Design and the Asia South Pacific Design Automation Conference.