Footnotes

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Reports describing various aspects of the NUMAchine project can be obtained via the WWW from:http://www.eecg.toronto.edu/EECG/RESEARCH/ParallelSys.

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Although the first working NUMAchine implementation will use the MIPS R4400 processor, decoupling the processors and memory in our implementation of the NUMAchine architecture permits switching to the MIPS R10000 processor when it becomes available.

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A single queue would suffice if one could guarantee that a nonsinkable message is received only when it can be fully processed without blocking subsequent sinkable messages.

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Atomic access is performed using read_with_lock and write_with_unlock operations. The lock acquired is the per-cache line lock used by the coherence protocol, allowing system software to manipulate cache lines even while they are being accessed by application software.

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The SPLASH-2 applications take anywhere from 5 minutes to 24 hours to run on an SGI Challenge for each different system configuration. These times can double if both effects are turned on.

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For the sake of other SPLASH-2 experimenters, the BlockOwner routine was changed to

Stephen D. Brown
Wed Jun 28 18:31:42 EDT 1995