About

I received my B.Eng in Computer Engineering from Memorial University of Newfoundland in 2002, and continued on to do my Masters degree there under the supervision of Dr. Howard Heys, which was completed in 2004. My Masters thesis investigated the development of a configurable ASIC for implementing block ciphers. The challenges in programming this device---and an interest in understanding how it could be improved---led me to pursue my PhD.

Since 2004, I have been enrolled in the PhD Program in Computer Engineering at the University of Toronto, under the supervision of Dr. Paul Chow. As part of the Computer Engineering Research Group, my focus is on developing programming models for emerging reconfigurable computing platforms.

Research

Broadly, my research interests fall into the following categories:

  • Reconfigurable and High Performance Computing Systems
  • Reconfigurable and Parallel Programming Models and Languages
  • Domain-Specific Programming Languages
  • Digital Hardware Design and Synthesis
  • FPGA Architecture and Applications
  • Cryptography, Network Security, and Communications

Current Research

My research initially focused on investigating and developing programming models and tools for multi-FPGA computing platforms. These application-specific reconfigurable multiprocessors are intended to improve performance and reduce power consumption for certain classes of computation-intensive algorithms. As the research progressed, it became apparent that it was applicable to a larger class of problems and systems.

Motivation

As the performance improvement curve of microprocessors is flattening, it is no longer a viable option to wait for faster processors to handle high-performance computing (HPC) applications. While desktop processors can move toward what were traditionally HPC architectures (such as multicore, multiprocessor, or vector processors), for HPC systems to get the performance improvement needed in that application space, new and alternative architectures need to be considered.

This has led to the increased adoption of application-specific processors (ASPs) for HPC applications, and systems using graphics processing units (GPUs), FPGAs, and Cell processors as computing elements have all been developed. Each of these types of ASP has its own unique development and programming methodology, and this is further complicated by HPC systems which use multiple ASPs, since parallel programming is a generalchallenge in HPC. Furthermore, it is becoming increasingly likely that HPC systems will include multiple types of ASPs in parallel with conventional multicore processors, leading to a complex heterogeneous programming environment.

Contributions

The goal of my research is to provide a unified, high-level programming model for application experts to use to program high-performance reconfigurable computing (HPRC) systems or high-performance heterogeneous computing (HPHC) systems. This requires the development of a high-level language (Armada) that allows application experts to easily express the parallelism in their algorithms, and back-end tools that partition the program across the target system, configure communication between different parts of the program, and generate the appropriate code for each ASP.

The key notion is that we are willing to trade implementation efficienty on any single computational node for overall application speedup across the whole multiprocessor system. It is hoped that the benefits of having a single, scalable, portable description of the application that offer good performance improvement will be an attractive option, when compared to non-scalable non-portable custom implementations or software on general-purpose microprocessors only. Ideally, the tools I am developing will open up the use of application-specific reconfigurable multiprocessors to an audience of scientists that would otherwise have great difficulty using such power computing platforms.

Publications and Presentations

Refereed Full Conference Papers

House, A. W. H. and Heys, H. M. (2004). "Design of a Flexible Cryptographic Hardware Module." In Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering – CCECE 2004, 2–5 May 2004, vol 1, pages 603–608. Niagara Falls, Ontario, Canada. (PDF Copyright © 2004 IEEE.)

Refereed Short Conference Papers

House, A. W. H. and Chow, P. (2008). "Investigation of Programming Models for Emerging FPGA-Based High Performance Computing Systems." In FCCM'08: The Sixteenth Annual IEEE Symposium on Field-Programmable Custom Computing Machines, April 14-15th, 2008, pages 291–292. Palo Alto, California. (PDF Copyright © 2008 IEEE.)

Workshop Papers

House, A. W. H. and Chow, P. (2008). "Programming Soft Processors in High Performance Reconfigurable Computing." In the Workshop on Soft Processor Systems (WoSPS), in conjunction with the Seventeenth International Conference on Parallel Architectures and Compilation Techniques (PACT), 26 October 2008. Toronto, Ontario, Canada. Available online at http://www.eecg.toronto.edu/wosps08/ (PDF).

Abstract-Refereed Conference Papers

House, A. W. H. and Heys, H. M. (2002). "Preliminary Design of a Flexible Cryptographic Hardware Module." In CD-ROM Proceedings of NECEC 2002: The Twelfth Annual Newfoundland Electrical and Computer Engineering Conference, November 13, 2002. Memorial University of Newfoundland, St. John's, Canada. (PDF)
House, A. W. H. and Heys, H. M. (2000). "FPGA Implementation of ATM Encryption Algorithms." In printed Proceedings of NECEC 2000: The Tenth Newfoundland Electrical and Computer Engineering Conference, November 15th, 2000. Memorial University of Newfoundland, St. John's, Canada. (PDF unavailable.)

Poster Presentations

House, A. W. H. and Chow, P. (2008). "Investigation of Programming Models for Emerging FPGA-Based High Performance Computing Systems." Presented at FCCM'08: The Sixteenth Annual IEEE Symposium on Field-Programmable Custom Computing Machines, April 14-15th, 2008. Palo Alto, California. (POSTER PDF)

Refereed Conference Presentations

House, A. W. H. and Heys, H. M. (2004). "Design of a Flexible Cryptographic Hardware Module." Presented at the 2004 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE 2004), 2--5 May 2004. Niagara Falls, Ontario, Canada.

Workshop Presentations

House, A. W. H. and Chow, P. (2008). "Programming Soft Processors in High Performance Reconfigurable Computing." Presented at the Workshop on Soft Processor Systems (WoSPS), in conjunction with the Seventeenth International Conference on Parallel Architectures and Compilation Techniques (PACT), 26 October 2008. Toronto, Ontario, Canada.

Abstract-Refereed Conference and Symposium Presentations

House, A. W. H. and Chow, P. (2008). "Programming Models for Emerging High Performance Computing Systems." Presented at Connections 2008, the University of Toronto Electrical and Computer Engineering Graduate Symposium, 27 May 2008. Toronto, Ontario, Canada. Also presented the lecture, "Matching Algorithms to Computing Architectures" on behalf of a colleague.
House, A. W. H. and Chow, P. (2007). "Programming Models and Tools for Multi-FPGA Computing." Presented at Connections 2007, the University of Toronto Electrical and Computer Engineering Graduate Symposium, May 2007. Toronto, Ontario, Canada.
House, A. W. H. and Heys, H. M. (2002). "Preliminary Design of a Flexible Cryptographic Hardware Module." Presented at NECEC 2002, the Twelfth Newfoundland Electrical and Computer Engineering Conference, 13 November 2002. St. John's, NL, Canada.
House, A. W. H. and Heys, H. M. (2002). "Design of a Flexible Cryptographic Hardware Module." Presented at Memorial University of Newfoundland's 2002 Engineering Graduate Student Symposium, Saturday, 23 November 2002. St. John's, NL, Canada.
House, A. W. H. and Heys, H. M. (2000). "FPGA Implementation of ATM Encryption Algorithms." Presented at NECEC 2000, the Tenth Newfoundland Electrical and Computer Engineering Conference, 15 November 2000. St. John's, NL, Canada.

Teaching

Teaching Philosophy

For me, teaching is one of the key attractions to an academic career. Teaching is more than just the transmission of information or facts; we must help the students understand, and this includes matters beyond the nominal content of a particular course. With this in mind, my goal in teaching students is threefold: to introduce students to fundamental concepts of the subject matter, to show them how to use those concepts, and to encourage them to learn on their own.

This is especially crucial when educating engineers, who will be called upon to solve problems and teach themselves new technologies and techniques throughout their careers. Thus, I see my role as a teacher primarily as one in which I show students how to use the knowledge they have at hand to analyze and solve problems. Often, these problems can be rigidly defined and mathematical, but just as often they can be open-ended, and in such cases it is necessary to guide students through the problem-solving, show them how to find the answer on their own, and provide feedback when they go astray. This approach forms the foundation of my teaching.

Teaching Strategies and Practice

The key to helping students retain information and understand how to use it is to get them actively involved in learning. Engineering education traditionally offers a number of excellent venues for this type of active learning—such as labs, assignments, projects, and work terms—but such techniques are typically applied outside of the classroom, and students cannot have labs and projects for every course without being completely overwhelmed. Consequently, I try to bring active learning into my lectures through various in-class exercises. These can range from soliciting the next step in solving a problem from the class, to partner exercises where students work with a neighbour to find an answer, to student presentations in class. Incorporating these different activities can appeal to different student learning styles and provide valuable formative assessment to students as they engage with the course material more frequently than just the night before an exam or assignment due date. This can improve student learning even in courses that incorporate projects and labs, since it helps students get more out of the classroom lecture time.

Teaching Goals and Aspirations

I have strong interest in teaching courses such as digital logic and systems design, computer organization and embedded systems, and compilers, all of which are common to undergraduate computer engineering curricula. Furthermore, I am keenly interested in developing courses on FPGA architecture, hardware synthesis, and reconfigurable and high-performance computing, whether as senior undergraduate or graduate offerings. I also desire to continue my professional development in teaching, including exploring the use of new approaches (such as e-books, online video and animation, and custom software) to facilitate student learning. I doubt I will ever be fully satisfied with my performance as a teacher, and as such, I will continually strive to develop new techniques to engage myself and my students with my teaching.

Teaching Dossier

A version of my full teaching dossier can be accessed in PDF format here.

Sample Course Materials

I have mirrored the content of websites developed 5--6 years ago for courses I was teaching or TAing at the time. Today, this content would likely be hosted on a course or content management system, rather than a custom website.

Curriculum Vitae

A copy of my CV, which covers all of my education, teaching experience, and publication history, can be accessed in PDF format here.

Links

University of Toronto

Memorial University of Newfoundland

Professional

Research

Contact

Edward S. Rogers Sr. Department of Electrical and Computer Engineering
University of Toronto
10 King's College Road
Toronto, ON M5S 3G4
Canada
E-mail: User "ahouse" AT domain "eecg.toronto.edu".
Office: EA306 (Engineering Annex)