University of Toronto Electronics Group Abstracts (Prof. Martin)

Table of Professor Martin's Students

Detailed Abstracts for Professor Martin's Students

• Stephen Alie
  M.A.Sc. Student, Kenneth Martin Supervising
  Direct e-mail to alie@eecg.toronto.edu
  See home page at ~alie
  

  Abstract - My reaserch is on the subject of high speed data-recovery. At the core of the research is a novel phase/frequency detector which is used in a phase-locked loop to perform the critical timing syncrhonization required for data-recovery.

• Bryn R. Owen
  Research Associate, Kenneth Martin Supervising
  Direct e-mail to bryn@eecg.toronto.edu
  See home page at ~bryn
  

  Abstract - An analog VLSI layout language called BALLISTIC has been created and is being used to design analog module generators for a variety of useful circuits. These circuits include op amps, comparators, switched-capacitor filters, and digital support circuits. The library will be expanded to include more intricate building-blocks customized for wireless sub-systems. The layout language was made public before its presentation at CICC `95 and is now available to non-profit organizations through both ftp and the world-wide web. To date, it has been used as the layout tool in 10 distinct research projects leading to fabrication.

• Greg Hartman
  M.A.Sc. Student (Sep. 1995 to Spring 1997), Kenneth Martin Supervising
  Direct e-mail to ghartman@eecg.toronto.edu
  See home page at ~ghartman
  

  Abstract - Continuous Time Adaptive Analog Cable Equalizer

  When transmitting data over copper at rates in the hundreds of Mb/s the attenuation on even a few hundred meters of cable can become significant due to the skin effect and dielectric losses. This attenuation is frequency dependent, making a simple gain stage unsuitable for equalization. Accurate re-generation of the data at these frequencies can be done using a relatively small chip area with low power using an analog filter. To allow proper equalization for an arbitrary cable length an adaptive filter will be designed, fabricated and tested.

• Marcial K. Chua
  M.A.Sc. Student (Fall 1995 to Spring 1997), Kenneth Martin Supervising
  Direct e-mail to mchua@eecg.toronto.edu
  See home page at ~mchua
  

• Ralph A I Duncan
  Ph.D. (Completed June 1995), Kenneth Martin & Adel Sedra Supervising
  Direct e-mail to ralph@eecg.toronto.edu

  Abstract - A tunable 1 GHz active-LCR oscillator with on-chip inductors was designed and fabricated for use in front-end demodulation schemes. Additionally, an active-LCR filter based on positive-feedback for on-chip inductor Q-enhancment was designed and fabricated. Both circuits were fabricated in the BATMOS process and later tested.

• Bob Richens
  Lab Technician, Kenneth Martin & David Johns & Adel Sedra Supervising
  Direct e-mail to richens@eecg.toronto.edu
  See home page at ~richens
  

  Abstract - Lab technician for the analogue electronics group, including lab and equipment maintenance, board design and inventory management.

• Sepideh Rezania
  M.A.Sc. (Completed Nov. 1995), Kenneth Martin Supervising
  Direct e-mail to sepideh@eecg.toronto.edu
  See home page at ~sepideh
  

  Abstract - Development of the spreadsheet interface system, PowerDesign, enabled a variety of amplifier circuits to be investigated. The focus was on common-mode feedback circuits, including switched-capacitor and continuous-time implementations. An op amp with the switched-capacitor CMFB circuit was fabricated in the BATMOS process and later tested. Other configurations of the op amp, including single-ended and enhanced-gain, were designed and incorporated into PowerDesign as well.

• Mohammad Hossein Shakiba
  Ph.D. Student (Sep. 1991 to Summer 1997), David Johns & Kenneth Martin Supervising
  Direct e-mail to shakiba@eecg.toronto.edu
  See home page at ~shakiba
  

  Abstract - Analog Viterbi decoders offer the advantages of reduced power and size over digital implementations, primarily due to the elimination of the A/D converter. A new derivation of the Viterbi algorithm for decoding a class-IV partial-response signal is proposed. This algorithm leads to a very simple and fast structure with a complexity much less than that of the A/D converter by itself. A 200 MHz 3.3V class-IV decoder was designed and fabricated in the 0.8um BATMOS process, and experimental results confirm that a speed of 200 MSymbols/s can be achieved with only 30mW power consumption.

• Steve Jantzi
  Ph.D. Student (Sep. 1992 to Summer 1997), Kenneth Martin & Adel Sedra Supervising
  Direct e-mail to steve@eecg.toronto.edu
  See home page at ~steve
  

  Abstract - A 4th-order complex bandpass sigma-delta analog-to-digital converter has been designed and submitted for fabrication in the 0.8um BATMOS process as well as a 0.5um CMOS process. This A/D conversion scheme works directly on the pair of quadrature outputs from the front-end mixer, performing bandpass A/D conversion rather than low-pass conversion, thus reducing image problems and eliminating concerns about self-EMI and 1/f noise. The circuit is designed to clock at 13 MHz (for cellular receivers) and to convert incoming quadrature signals with 4.875 MHz centre frequency and up to 200 kHz (GSM) bandwidth. The converter should realize more than 70dB SNR. Smaller bandwidths can also be converted, such as 100 kHz (CT2+) and 30 kHz (IS-54, AMPS), with SNR increasing for narrower bandwidths.

• Wynstan Tong
  M.A.Sc. Student (Jan. 1996 to Oct. 1996), Kenneth Martin Supervising
  Direct e-mail to wynstan@eecg.toronto.edu
  See home page at ~wynstan
  

  Abstract - The design of high-speed analog wireless circuits will be undertaken. Circuits will include frequency synthesizers, phase-locked loops, and operational transconductance amplifiers. Current work is focused on a GHz-range frequency synthesizer that will be incorporated into a digital radio system. The proposed architecture is the fractional-N type. Applications for these circuits include cellular communications, high-speed digital networks and signal-synchronization circuits.

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