ECE452 - Computer Architecture

First Term 2008
Department of Electrical and Computer Engineering
University of Toronto

Instructor: Prof. Paul Chow


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Please check the ANNOUNCEMENTS page via the portal regularly for course information and handouts. Any significant changes made to this course site will be accompanied by an announcement. The bulletin board and certain handouts will also be on the portal.


Instructor: Prof. Paul Chow

EA320, Tel: 978-2402, Email: pc@eecg.toronto.edu

Course Description. This course provides students with a solid understanding of fundamental architectural techniques used to build today's high-performance processors and systems. Course topics include pipelining, caches, virtual memory, and multiprocessors. Some emphasis will be placed on hardware/software interaction to achieve performance.


Course Timetable

Lectures
  • Mon 1-2pm BA1170
  • Wed 1-2pm BA1220
  • Fri 12-1pm BA1130
Tutorials
  • Friday TUT01 11am - 12noon BA1200
  • Friday TUT02 4pm - 5pm GB412

Evaluation Scheme

   Assignments (2) 15%
   Midterms (2) 35%
   Final 50%

Required Textbook:
J. Hennessy and D. Patterson, Computer Architecture: A Quantitative Approach, 4th edition.

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