This page provides the PowerPoint slides that accompany
Fundamentals of Digital Logic with VHDL Design
If you discover any errors in these slides, we would
greatly appreciate hearing about them. Also, if you make
improvements to any of the slides and wish to share these improvements
with others who are using the book, please contact the authors.
The PowerPoint files are password protected. If you require the userid/password, please email the authors at:
For each chapter in the book, separate PowerPoint files are provided. The files can be accessed in either compressed format (ZIP) or uncompressed format: