Jongsok Choi

Ph.D., University of Toronto

Publication

Refereed Journal Publications

  • Q. Huang, R. Lian, A. Canis, J. Choi, R. Xi, S. Brown, J. Anderson, "FCCM13: The Effect of Compiler Optimizations on High-Level Synthesis-Generated Hardware", submitted in ACM TRETS, Sept. 2013. (in revision)
  • A. Canis, J. Choi, M. Aldham, V. Zhang, A. Kammoona, J.H. Anderson, S. Brown, T. Czajkowski, "LegUp: Open source high-level synthesis for FPGA-based processor/accelerator systems", accepted to appear in ACM Transactions on Embedded Computing Systems (TECS), April 2012.

  • Refereed Conference Publications

  • J. Choi, S. Brown, J. Anderson, "From Software Threads to Parallel Hardware in High-level Synthesis", IEEE International Conference on Field Programmable Technology (FPT), pp. 270-279, Kyoto, Japan, Dec. 2013.
  • J. Cai, M. Wang, R. Lian, A. Canis, J. Choi, B. Fort, E. Miao, Y. Zhang, N. Calagar, S. Brown, J. Anderson, "From C to Blokus Duo with LegUp High-Level Synthesis," IEEE International Conference on Field Programmable Technology (FPT), pp. 46-49, Kyoto, Japan, Dec. 2013.
  • A. Canis, J. Choi, B. Fort, R. Lian, Q. Huang, N. Calagar, M. Gort, J. Qin, T. Czajkowski, S. Brown, J. Anderson, "From software to accelerators with LegUp high-level synthesis," IEEE/ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), Montreal, Sept. 2013.
  • Q. Huang, R. Lian, A. Canis, J. Choi, R. Xi, S. Brown, J. Anderson, "The effect of compiler optimizations on high-level synthesis for FPGAs," IEEE Int'l Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 89-96, Seattle, WA, May 2013.
  • J. Anderson, S. Brown, A. Canis, J. Choi, "High-level synthesis with LegUp: a crash course for users and researchers," ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), pp. 7-8, Monterey, CA, February 2013.
  • J. Choi, K. Nam, A. Canis, J.H. Anderson, S. Brown, T. Czajkowski, "Impact of cache architecture on speed and area of FPGA-based processor/parallel-accelerator systems," IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 17-24, Toronto, Canada, April 2012.
  • S. Hadjis, A. Canis, J.H. Anderson, J. Choi, K. Nam, S. Brown. T. Czajkowski, "Impact of FPGA architecture on resource sharing in high-level synthesis," ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), pp. 111-114, Monterey, CA, February 2012.
  • A. Canis, J. Choi, M. Aldham, V. Zhang, A. Kammoona, J.H. Anderson, S. Brown, T. Czajkowski, "LegUp: High-level synthesis for FPGA-based processor/accelerator systems," ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), Monterey, CA, February 2011.

  • Invited Talks

  • A. Canis, J. Choi, "LegUp: An Open Source High-Level Synthesis Tool for FPGA-Based Processor/Accelerator Systems," Xilinx Inc., San Jose, CA, USA, February, 2013.
  • J. Choi, J. Anderson, "LegUp: An Open Source High-Level Synthesis Tool for FPGA-Based Processor/Accelerator Systems," Samsung Electronics, Suwon, S. Korea, December, 2012.
  • J. Choi, J. Anderson, "LegUp: An Open Source High-Level Synthesis Tool for FPGA-Based Processor/Accelerator Systems," KAIST, Daejeon, S. Korea, December, 2012.
  • J. Choi, "Impact of cache architecture on speed and area of FPGA-based processor/parallel-accelerator systems," U of Toronto FPGA Seminar, Toronto, ON, January 2012.
  • J. Choi, "LegUp High-Level Synthesis for Processor/Accelerator Systems: Status and Current Research," Cascadia 2011 Workshop, Seattle, WA, August 2011.
  • J. Choi, "Full Custom Layout of an FPGA", Altera Toronto Technology Center, Toronto, ON, May, 2013.
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