T.S. Czajkowski and S.D. Brown, Fast
Toggle Rate Computation for FPGA Circuits,
Proceedings of 18th International Conference of Field-Programmable Logic,
Heidelberg, Germany, September 8-10, 2008, pp. 65-70.
T.S. Czajkowski and S.D. Brown, Functionally Linear Decomposition and Synthesis of Logic Circuits for FPGAs,
IEEE Proceedings of the 45th Design Automation Conference, Anaheim,
California, June 8-13, 2008, pp. 18-23.
T.S. Czajkowski and S.D. Brown, Using Negative Edge Triggered FFs to Reduce
Glitching Power in FPGA Circuits, IEEE Proceedings of the 44th Design Automation
Conference, San Diego, California, June 4-8, 2007, pp. 324-329. (Citation: ACM Digital Library, IEEExplore)
T.S. Czajkowski and J. Rose, A Synthesis
Oriented Omniscient Manual Editor, Proceedings of the 12th ACM/SIGDA
International Symposium on Field-Programmable Gate Arrays, Monterey, California, February 22-24, 2004, pp.
89-98. (Citation: ACM Digital Library)
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