I am an assistant professor in the Department of Electrical and Computer Engineering at the University of Toronto. I joined the Edward S. Rogers Department of Electrical and Computer Engineering in 2009.
Prior to joining the University of Toronto, I received my PhD from the University of Wisconsin-Madison studying Computer Architecture. I was part of the PHARM research group and I was co-advised by Mikko Lipasti and Li-Shiuan Peh. I received my Bachelor of Science degree in 2002 from Purdue University in West Lafayette, IN.
My research interests include multi- and many-core architectures, on-chip networks, cache coherence protocols and architectural support for parallel programming. Scalable cache coherence protocols and on-chip interconnection networks require new innovations to support many-core architectures. My current research explores performance and power optimizations for various sharing and communication patterns in on-chip networks and cache coherence protocols for many-core architectures. I am also interested in improving the programmability of many-core architectures. Please see my research page for more details.
I am a recipient of the Ontario Ministry of Research and Innovation Early Researcher Award (2012). I recently served as the program co-chair of the 7th Network-on-Chip Symposium (NOCS) and am currently serving as the program chair of the 20th International Symposium on High Performance Computer Architecture (HPCA). In 2009, I co-authored a book on On-Chip Networks with Li-Shiuan Peh. My research is supported by NSERC, Intel, CFI, AMD and Qualcomm.
Beyond research, I am also involved in outreach activities for women in computer architecture. If you are a woman studying or working in the area of computer architecture, please consider joining our group: WICArch.