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Current Students:
- Ph.D. Candidates
-
Mahdi Shabany,
Sequential Monte Carlo Techniques
applied to Baseband
Digital Communications.
- M.A.Sc. Candidates
- Jing Zhang,
A
1.5Gbps baseband processor for 60 GHz Radio
Applications.
- Samir Parikh,
A
CMOS Bioluminescence Detection System-on-Chip.
- Cintia Mann.
A
Fully Electronic DNA Sensor.
Previous Students:
- Yadollah Eslami Amirabadi,
Ferroelectric Memory Design for a Smart Card Cryptography
Processor, 2005.
-
Tooraj
Esmailian,
Multi
Mega-bit per second Data Transmission over In-Building Power
Lines, 2003.
- Vincent Gaudet,
Architecture
and Implementation of Analog Iterative Decoders, 2003.
-
Warren
Gross,
Implementation of Algebraic Soft-Decision Reed-Soloman Decoders,
2003.
- Ali Sheikholeslami,
Modeling &
Design of Ferroelectric Memory Structures, 1999.
- Javad Omidi,
VLSI Implementation of Kalman
Filter based MLSE receivers for Fading Channels (Co-supervised
with Professor Pasupathy), 1998.
- Brenden Fry,
Bayesian Networks and their
Application to Pattern Recognition, Data Compression and
Coding.(Co-supervised
with Professor G. Hinton), 1995.
- Ken Schultz,
CAM-Based
Circuits for ATM Switch Networks, 1995.
- Gennady Feygin,
Arithmetic Coding: Parallel Algorithms and Architectures,
1995.
- Edward Lee,
Field-Programmable Analog Arrays Based on MOS Transconductors,
1995.
- Kerry Lowe,
Gate
Sizing and Buffer Insertion Methods for Optimizing Delay and
Power in CMOS and BiCMOS Logic Networks, 1995.
-
Kostas
Pagiamtzis, VLSI
Performance Estimation of IP Blocks for Multicarrier
System-on-Chip, 2002.
-
Ted Fill,
VLSI and Embedded
Software Implementations for Reed-Soloman Decoders, 2001.
-
Nirmal Sohi,
A Multi-Standard Set-top Box Channel Decoder, 2000.
-
Warren
Gross, VLSI Architectures for the Forward-Backward
Algorithm ,1999.
-
Ken
Chalmers, A CMOS DVD 4X ViterbiDetector System Design and VLSI
Implementation, 1999.
-
Jason
Podaima, Content Addressable FIFO for ATM
Multicasting,1998.
-
Wai Ming
Louie,
Digital TV
Set-top Box, 1998.
- Jason Podaima, A Content Addressable FIFO
for Shared Memory ATM Switch Architectures, 1998.
- Vincent Gaudet, Design of a CMOS Current
Conveyor-Based Field-Programmable Analog Array, 1997.
- Dean D'Mello, Synthesis of FPAA Cores
Using an Intermediate Layout Language Approach, 1996.
- Paul Chow,
A Mixed
Signal Field Programmable Array, 1994.
- Ali Sheikholeslami
Transient
Modelling of Ferroelectric Capacitors for Semiconductor Memories,
1994.
- Michael Tresidder,
Interleaved Datapaths for Hiding Memory Latency,
1994.
- Qiang Wang,
An Array
Architecture for Reconfigurable Datapaths, 1993.
- Steve Wood,
Ferroelectric Memories, 1992.
-
Ravi
Ananth, A Field Programmable Stochastic Computer for Signal
Processing Applications , 1992.
-
Michael
Smith, Reconfigurable Cache Memory Design , 1992.
-
Gabriel
Varga, A Universal Sensor Interface IC , 1992.
-
Joseph
Dao,
VLSI
Structures for Symbol-by-Symbol Detectors, 1992.
- Edward Lee,
A CMOS
Field Programmable Analog Array, 1991.
- Afshan Ally,
A
Hopfield Neural Network Decoder for Convolutional Codes
, 1991.
- Bernard Herscovici,
Receivers
for the Mobile Digital Cellular System , 1990.
-
Gennady
Feygin, A Multiprocessor Architecture for Viterbi Decoders with
Linear Speedup , 1990.
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