ECE452 - Computer ArchitectureFall 2009
|
| Topics | Reading | Questions |
|---|---|---|
| System and technology trends, CPU performance equation, Amdahl's law, Benchmarks, Measuring performance |
1.1–1.11 | 1.3, 1.5, 1.7, 1.9, 1.10, 1.12, 1.14 to be taken up on Sept. 25 |
| ISAs, addressing modes, memory, operands, operations, instruction coding |
B.1–B.10 | From 3rd edition: 2.3, 2.6, 2.10, 2.11 to be taken up on Oct. 2 |
| Pipelining, datapath organization, performance | A.1, A.2, A.3 | From 3rd edition: A.5ab, From 2nd edition: 3.4 to be taken up on Oct. 2 |
| Control, hazards, pipeline exceptions, supporting multi-cycle operations | A.4, A.5, A.8 | From 3rd edition: A.2, A.3, and A.9 to be taken up on Oct. 9 |
| Instruction level parallelism, data dependences, loop unrolling, branch prediction | 2.1-2.3 |
Dependences: 4.2 Loop unrolling: 4.7 Branch prediction: 3.8, 3.9 (all from 3rd ed.) (take up Oct. 16) |
| Dynamic scheduling, dynamic scheduling with scoreboarding, Tomasulo's algorithm, speculation | 2.4-2.9, A7 |
A.13: Scoreboard (template available on blackboard) 3.6a: Tomasulo 3.20: Speculation All questions from 3rd Edition.To be taken up on Oct 23. |
| Dynamic scheduling with speculation and precise interrupts (MIPS R10K), multiple instruction issue, branch target buffers |
Branch target buffers: 3.14 (all from 3rd ed.) Tomasulo and speculative execution: 3.18 and 3.21 IMPORTANT NOTE: For these last two questions, assume the MIPS R10K dynamically scheduled speculative processor model discussed in class. An excel template to help you answer these questions can be found on BlackBoard. To be taken on Oct 30th. |
|
| | ||
| Cache performance, reducing miss rate, reducing miss penalty, reducing hit time, virtual/physical caches, average memory access time, 3Cs, cache optimizations | 5.1, C.1, C.2, C.3, 5.2 | 3ed: 5.1, 5.4a-e, 5.16. To be taken up on Nov 6. |
| Multithreading, Parallel architectures, Memory models | 3.5, 4.1 | 3ed: 6.29, 6.30 (take up Nov. 13) |
| Snoopy cache coherence | 4.2 | 4ed: 4.1, 4.2a (take up Nov. 20) |
| Directory-based cache coherence | 4.4 | 4ed: 4.16, 4.17 (take up Nov. 27) |
|
Synchronization: 4.5 Memory consistency models: 4.6, 4.7 Virtual Memory, Protection, Virtual Machines: C.4, C.5, 5.4 |
4.5 4.6, 4.7 C.4, C.5, 5.4 |
4ed: 4.7ab + Vitual Memory question (to be taken on Dec 4th) |