Plotting Gm/Id with LTSpice
It is sometimes useful to plot Gm/Id for transistors to help with choosing how to bias a transistor. It is not straightforward in LTSpice since Gm is not an output parameter in LTSpice. Below describes how to plot Gm/Id using LTSpice and does so with some generic Mosfet models.
The Mosfet models are from the
Predictive Model Technology website. They are all BSIM4 models and are from 4 different technology nodes: 130nm, 65nm, 32nm and 22nm models.
The channel lengths were set to 190nm, 100nm, 48nm and 33nm respectively for the different technology nodes.
The mosfet library file is: mos_transistors.lib
The results are shown below where Julia was used for plotting the results
To get the above results, the following LTSpice schematic and nmos symbol were used
The circuit is run twice for each channel length (width was set equal to 2L)
Run 1 was the .dc simulation (.ac was commented out) which finds Id vs Vg
Run 2 was the .ac simulation (.dc was commented out) which finds gm vs Vg
(since AC is set to 1, the Id current is the gm value)
- Due to gate leakage, I(VSS) was found (rather than I(VD)) as the gate leakage can be significant when VG is near zero and Ids is very small.
- To get the output data from LTSpice, use "data export" from within the plot plane settings.
- To improve accuracy of the results, the option "plotwinsize=0" results in no compression of the data and the option "numdgt=15" keeps the number of digits high.
The Julie file is: gm_id_plot.jl
The output results in CSV files are: