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ECE334S - Digital Electronics - Spring 2010

General

This course is an introduction to building digital integrated circuits with emphasis on the transistor level aspects of IC design. Topics to be covered are CMOS logic design, integrated circuit processing, layout design, transistor sizing, combinational circuit design, sequential logic, power dissipation, crossing clock domains, memory circuits, and I/O circuits.

This page can also be accessed directly at http://www.eecg.toronto.edu/~johns/ece334/ece334.html

Announcements

Nov 11 Course web page goes live!

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Lecturer

David A. Johns    Email: johns@eecg.toronto.edu     Office: BA5144 (inside of BA5145)

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Textbook

"CMOS VLSI Design" (third edition) by N.H. E. Weste and D. Harris, Addison Wesley, 2005     ISBN: 0-321-14901-7

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Lectures

Monday    1-2pm     BA1170

Thursday   1-2pm    BA1180

Friday        2-3pm    BA1180

Lec # Topic Textbook Section Lecture Notes
1 Introduction 1.1, 1.2
2 CMOS logic 1.3-1.4
3 CMOS logic 1.5 Layout
4 Ideal MOS transistors 2.1, 2.2
5 Simple MOS Capacitance 2.3
6 Detailed MOS Capacitance 2.3
7 Non-ideal effects 2.4
8 Non-ideal effects 2.4
9 DC Transfer Characteristics 2.5
10 Delay Estimation 4.2 Delay_estimation_01.pdf
11 Transistor sizing 4.2 (same notes as above)
12 Unit Delay and Inverter Chain Sizing 4.2,4.3 Delay_estimation_02.pdf, inverter_chain_sizing.pdf
13 Dynamic Power Dissipation 4.4
14 Dynamic Power Dissipation 4.4 Dynamic Power
15 Review Lecture
16 CMOS Processing 3.2 processing.pdf
17 CMOS Processing 3.2 Silicon Run Video
18 Elmore Delay 4.2 Elmore_Delay.pdf
19 Interconnect Delay 4.5 Interconnect.pdf
20 Schmitt Trigger Circuits Schmitt.pdf
21 Circuit Families: Static CMOS, Ratioed 6.2.1, 6.2.2
22 Circuit Families: CVSL, Dynamic 6.2.3, 6.2.4
23 Sequential Circuit Design 7.2
24 Register Circuits, setup and hold timing 7.3 Register_setup_hold.pdf
25 Synchronizers 7.6 metastability.pdf
26 Review Lecture
27 Synchronizers 7.6
28 Memory Intro 11.1 memory_01.pdf
29 SRAM memory 11.2
30 SRAM memory 11.2 memory_02.pdf
31 DRAM memory 11.3
32 ROM memory 11.4
33 EEPROM,Flash memory memory_03.pdf
34 IC Packaging 12.2 packaging.pdf
35 Power Distribution 12.3 power_distribution.pdf
36 Clock Design 12.5 clock_design.pdf
37 Review Lecture

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Tutorials (weekly)

The first tutorial is on Jan 19

TUT      01     Fri     11am-noon     GB304

TUT      02     Tue     4-5pm           HA410

You can attend whichever tutorial better suits your schedule (though be aware that

seating could be difficult if many choose the same tutorial).

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Laboratory

The laboratory information is available here.

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Grades/Tests

Your final grade will be determined by:

Final Exam      50%

Term Test 1     20%

Term Test 2     20%

Laboratory      10%

Term test 1      Wed, Feb 10      7-9pm      Location: TBA

Term test 2      Wed, Mar 17      7-9pm      Location: TBA

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Email

Questions about the lab should be directed: TBA

Questions and comments regarding the lecture can be directed to johns@eecg.toronto.edu

Questions regarding the tutorial should be directed: TBA

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Problem Sets

Problem Set 1 - Solutions 1

Problem Set 2 - Solutions 2

Problem Set 3 - Solutions 3

Problem Set 4 - Solutions 4

Problem Set 5 - Solutions 5

Problem Set 6 - Solutions 6

Problem Set 7 - Solutions 7

Problem Set 8 - Solutions 8

Problem Set 9 - Solutions 9

Previous years Term Tests and exams

Term_Test_01_2009 and Term_Test_01_2009_solutions

Term_Test_02_2009 and Term_Test_02_2009_solutions

Final_exam_2009 and Final_exam_2009_solutions

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