Laboratory | Announcements | Grades/Tests | Lectures | Problem Sets |
General
This course is an introduction to building digital integrated circuits with emphasis on the transistor level aspects of IC design. Topics to be covered are CMOS logic design, integrated circuit processing, layout design, transistor sizing, combinational circuit design, sequential logic, power dissipation, crossing clock domains, memory circuits, and I/O circuits.
This page can also be accessed directly at http://www.eecg.toronto.edu/~johns/ece334/ece334.html
Dec 2 No Announcements
Lecturer
David A. Johns Email: johns@eecg.toronto.edu Office: BA5144 (inside of BA5145)
Textbook
(the third edition can also be used)
Monday 1-2pm GB220
Thursday 1-2pm GB119
Friday 2-3pm BA1180
Lec # | Topic | Textbook Section | Lecture Notes |
---|---|---|---|
Introduction | 1.1, 1.2 | Intro.pdf | |
CMOS logic | 1.3-1.4 | cmos_logic_intro.pdf | |
CMOS logic | 1.4 | ||
CMOS Layout | 1.5 | Layout.pdf | |
Ideal MOS transistors | 2.1, 2.2 | mos_transistors.pdf | |
Simple MOS Capacitance | 2.3 | ||
Detailed MOS Capacitance | 2.3 | ||
Non-ideal effects | 2.4 | non_ideal_mos_effects.pdf | |
Non-ideal effects | 2.4 | ||
DC Transfer Characteristics | 2.5 | inverter_dc_analysis.pdf | |
DC Transfer Characteristics | 2.5 | ||
Delay Estimation | 4.2 | delay estimation.pdf | |
Delay Estimation | 4.2 | ||
Transistor sizing, unit delay estimation | 4.3 | ||
Inverter Chain Sizing | 4.3,4.5 | inverter_chain_sizing.pdf | |
Review Lecture | |||
Power Dissipation | 5.1 | power_dissipation.pdf | |
Power Dissipation | 5.2 | ||
Power Dissipation | 5.2 | ||
CMOS Processing | 3.2 | processing.pdf | |
CMOS Processing | 3.2 | Silicon Run Video | |
Elmore Delay | 4.3 | Elmore_Delay.pdf | |
Interconnect Delay | 6.1 | Interconnect.pdf | |
Schmitt Trigger Circuits | Schmitt.pdf | ||
Circuit Families: Static CMOS, Ratioed | 9.2 | digital_mos_circuits.pdf | |
Circuit Families: CVSL, Dynamic | 9.2 | ||
Synchronous Design | 10.2 | synchronous_design.pdf | |
Synchronous Design | 10.2 | synchronous_design_b.pdf | |
Register Circuits, setup and hold timing | 10.3 | Register_setup_hold.pdf | |
Synchronizers | 10.6 | metastability.pdf | |
Synchronizers | 10.6 | ||
Memory Intro | 12.1 | memory_01.pdf | |
SRAM memory | 12.2 | ||
Review Lecture | 12.2 | memory_02.pdf | |
DRAM memory | 12.3 | ||
ROM memory | 12.4 | ||
EEPROM,Flash memory | memory_03.pdf | ||
IC Packaging | 13.2 | packaging.pdf | |
Power Distribution | 13.3 | power_distribution.pdf | |
Clock Design | 13.4 | clock_design.pdf | |
Review Lecture |
Tutorials (roughly weekly)
The first tutorial is on Jan 18
TUT 01 Fri 11am-noon HA410
TUT 02 Tue 4-5pm HA410
Tutorial Schedule
Jan 18, 21
Jan 25, 28
Feb 1, 4
Feb 8
Feb 18
Mar 1, 4
Mar 8, 11
Mar 15
Mar 25
Mar 29, Apr 1
Apr 5, 8
You can attend whichever tutorial better suits your schedule (though be aware that
seating could be difficult if many choose the same tutorial).
The laboratory information is available here.
Your final grade will be determined by:
Final Exam 50%
Term Test 1 20%
Term Test 2 20%
Laboratory 10%
Term test 1 Wed, Feb 9 7-9pm Location: HA403
Term test 2 Wed, Mar 16 7-9pm Location: HA403
No aid sheet is allowed for tests. Any calculator type is allowed.
The equation sheet for all tests is here: equation_sheet.pdf
This equation sheet will be available as the last page on all tests.
Questions and comments regarding the lecture can be directed to:
David Johns johns@eecg.toronto.edu
The tutors names and emails are:
Saber Amini: samini@ieee.orgProblem Set 1 - Solutions 1 To be taken up Jan 18, Jan 21 tutorials
Problem Set 2 - Solutions 2 To be taken up in Jan 25, 28 tutorials
Problem Set 2b - Solutions 2b To be taken up in Feb 1, 4 tutorialsProblem Set 3 - Solutions 3 To be taken up in Feb 8 tutorial
Problem Set 4 - Solutions 4 To be taken up Mar 1, 4 tutorialsProblem Set 5 - Solutions 5 To be taken up Mar 11, 15 tutorials
Problem Set 6 - Solutions 6 To be taken up Mar 25, 29 tutorials
Problem Set 7 - Solutions 7 To be taken up Mar 25, 29 tutorials
Problem Set 8 - Solutions 8 To be taken up Apr 1, 5
Problem Set 9 - Solutions 9 To be taken up Apr 8
Previous Term Tests and exams
Term_Test_01_2009 and Term_Test_01_2009_solutions
Term_Test_02_2009 and Term_Test_02_2009_solutions
Final_exam_2009 and Final_exam_2009_solutions
Term_Test_01_2010 and Term_Test_01_2010_solutions
Term_Test_02_2010 and Term_Test_02_2010_solutions
Final_exam_2010 and Final_exam_2010_solutions
Term_Test_01_2011 and Term_Test_01_2011_solutions
Term_Test_02_2011 and Term_Test_02_2011_solutions
Final_exam_2011 and Final_exam_2011_solutions