Journal Papers

A Low-Power Delta-Sigma Modulator Using a Charge-Pump Integrator
Nilchi, A.; Johns, D.A.;
IEEE Trans on Circuits and Systems - I: Regular Papers
Vol. 60 , No. 5
Publication Year: 2013 , Page(s): 1310 - 1321

A low-power capacitive charge pump based pipelined ADC
Ahmed, I.; Mulder, J.; Johns, D.A.;
Solid-State Circuits, IEEE Journal of
Vol. 45 , No. 5
Publication Year: 2010 , Page(s): 1016 - 1027

Charge-pumped based switched-capacitor integrator for delta-sigma modulators
A. Nilchi and D.A. Johns,
IET Electronic Letters,
vol. 46, no. 6, pp. 400-401, March 18, 2010.

Incremental data converters at low oversampling ratios
T. Caldwell and D.A. Johns
IEEE Trans on Circuits and Systems - I: Regular Papers,
vol. 57, No. 7, July 2010 Page(s): 1525 - 1537

A 12-bit 3.125 MHz bandwidth 0-3 MASH delta-sigma modulator
A. Gharbiya and D.A. Johns,
IEEE Journal of Solid-State Circuits,
Volume 44, Issue 7, July 2009 Page(s):2010 - 2018

Combining Multipath and Single-Path Time-Interleaved Delta-Sigma Modulators
A. Gharbiya and D.A. Johns,
IEEE Transactions on Circuits and Systems II: Express Briefs,
Volume 55, Issue 12, Dec. 2008 Page(s):1224 - 1228

A Robust 4-PAM Signaling Scheme for Inter-Chip Links Using Coding in Space
K. Farzan and D.A. Johns
IEEE Transactions on Very Large Scale Integration (VLSI) Systems,
Volume 16, Issue 11, Nov. 2008 Page(s):1535 - 1544

A High Bandwidth Power Scalable Sub-Sampling 10-Bit Pipelined ADC With Embedded Sample and Hold
I. Ahmed and D.A. Johns
IEEE Journal of Solid-State Circuits,
Volume 43, Issue 7, July 2008 Page(s):1638 - 1647

An 11-bit 45MS/s pipelined ADC with rapid calibration of DAC errors in a multi-bit pipeline stage
I. Ahmed and D.A. Johns
IEEE Journal of Solid-State Circuits,
vol. 41, pp. 1578-1588, July 2008.

A time-interleaved continuous-time delta-sigma modulator with 20MHz signal bandwidth
T. Caldwell and D.A. Johns,
IEEE Journal of Solid-State Circuits,
vol. 41, pp. 1578-1588, July 2006.

On the implementation of input feedforward delta-sigma modulators
A. Gharbiya and D.A. Johns,
IEEE Trans. on Circuits and Systems-II: Express Briefs,
vol. 53, pp. 453-457, June 2006.

Coding schemes for chip-to-chip interconnect applications
K. Farzan and D.A. Johns,
IEEE Trans on Very Large Scale Integration (VLSI) Systems,
vol. 14, pp. 393-406, April 2006.

A 50-MS/s (35mW) to 1-kS/s (15uW) power scaleable 10-bit piplined ADC using rapid power-on opamps and minimal bias current variation
I. Ahmed and D.A. Johns,
IEEE Journal of Solid-State Circuits,
vol. 40, pp. 2446-2455, Dec. 2005.

High-speed oversampling analog-to-digital converters
A. Gharbiya, T.C. Caldwell and D.A. Johns,
International Jounal of High Speed Electronics and Systems,
Vol 15, No. 2, pp. 297-317, June 2005.

A CMOS 10-Gb/s power-efficient 4-PAM transmitter
K. Farzan and D.A. Johns,
IEEE Journal of Solid-State Circuits,
vol. 39, pp. 529-532, March 2004.

Digital LMS adaptation of analog filters without gradient information
A. Chan Carusone and D.A. Johns,
IEEE Trans. on Circuits and Systems - II: Analog and Digital Signal Processing
vol. 50, pp. 539-552, Sept. 2003.

High-speed CMOS analog Viterbi detector for 4-PAM partial response signalling
B. Zand and D.A. Johns,
IEEE Journal of Solid-State Circuits,
vol. 37, pp. 895-903, July 2002.

Variable-structure compensation of delta-sigma modulators: Stability and performance
T. Zourntos and D.A. Johns,
IEEE Trans. on Circuits and Systems - I: Fundamental Theory and Application
vol. 49, pp. 41-53, January 2002.

Differential signaling with a reduced number of signal paths
A. Carusone, K. Farzan and D.A. Johns,
IEEE Trans. on Circuits and Systems - II: Analog and Digital Signal Processing,
vol. 48, pp. 294-300, March 2001.

Analogue adaptive filters: Past and present
A. Carusone and D.A. Johns,
Circuits, Devices and Systems, IEE Proceedings-
vol. 147, pp. 82-90, Feb 2000.

A differential 160-MHz self-terminating adaptive CMOS line driver
R. Mahadevan and D.A. Johns,
IEEE Journal of Solid-State Circuits,
vol. 35, pp. 1889-1894, December 2000.

A CMOS optical preamplifier for wireless infrared communications,
K. Phang and D.A. Johns,
IEEE Trans. on Circuits and Systems - II: Analog and Digital Signal Processing,
vol. 46, pp. 852-859, July 1999.

BiCMOS circuits for analog Viterbi decoders,
M.H. Shakiba, D.A. Johns and K.W. Martin,
IEEE Trans. on Circuits and Systems - II: Analog and Digital Signal Processing,
vol. 45, pp. 1527-1537, Dec. 1998.

An integrated 200MHz 3.3V BiCMOS class-IV partial-response analog Viterbi decoder,
M.H. Shakiba, D.A. Johns and K.W. Martin,
IEEE Journal of Solid-State Circuits,
vol. 33, pp. 61-75, Jan. 1998.

Integrated circuits for data transmission over twisted-pair channels,
D.A. Johns and D. Essig,
IEEE Journal of Solid-State Circuits,
vol. 32, pp. 398-406, March 1997.

Time-interleaved oversampling A/D converters: Theory and practice
R. Khoini-Poorfard, L.B. Lim and D.A. Johns,
IEEE Trans. on Circuits and Systems - II: Analog and Digital Signal Processing,
vol. 44, pp. 634-645, Aug. 1997.

A 100Mb/s BiCMOS adaptive pulse-shaping filter,
A. Shoval, W.M. Snelgrove and D.A. Johns,
IEEE Journal on Selected Areas in Communications: Special issue on Copper Wire Access Technologies for High Performance Networks,
vol. 13, pp. 1692-1702, Dec. 1995.

2V fully-differential SC integrator in standard CMOS
S. Crapanzano and D.A. Johns,
Electronic Letters
vol. 31, No. 23, pp. 1995-1996, Nov. 1995.

Analysis of modulators with zero mean stochastic inputs,
R. Khoini-Poorfard and D.A. Johns,
IEEE Trans. on Circuits and Systems - II: Analog and Digital Signal Processing,
vol. 42, pp. 164-175, March 1995.

Comparison of DC offset effects in four LMS adaptive algorithms,
A. Shoval, D.A. Johns and W.M. Snelgrove,
IEEE Trans. on Circuits and Systems - II: Analog and Digital Signal Processing,
vol. 42, pp. 176-185, March 1995.

General approach for implementing analogue Viterbi decoders,
M.H. Shakiba, D.A. Johns and K.W. Martin,
Electronic Letters,
vol. 30, pp. 1823-1824, Oct. 1994.

A high-quality analog oscillator using oversampling D/A conversion techniques,
A.K. Lu, G.W. Roberts and D.A. Johns,
IEEE Trans. on Circuits and Systems - II: Analog and Digital Signal Processing,
vol. 41, pp. 437-444, July 1994.

Time-interleaved oversampling converters,
R. Khoini-Poorfard and D.A. Johns,
Electronic Letters,
vol. 29, pp. 1673-1674, Sept. 1993.

Design and analysis of delta-sigma based IIR filters,
D.A. Johns and D.M. Lewis,
IEEE Trans. on Circuits and Systems - II: Analog and Digital Signal Processing,
vol. 40, pp. 233-240, April 1993.

Tuning of continuous-time filters in the presence of parasitic poles,
K. A. Kozma, D. A. Johns and A.S. Sedra,
IEEE Trans. on Circuits and Systems - I: Fundamental Theory and Applications,
vol. 40, pp. 13-20, Jan. 1993.

Automatic tuning of continuous-time integrated filters using an adaptive filter technique,
K.A. Kozma, D.A. Johns, A.S. Sedra,
IEEE Trans. on Circuits and Systems,
vol. 38, pp. 1241-1248, Nov. 1991.

IIR filtering on sigma-delta modulated signals,
D.A. Johns and D.M. Lewis,
Electronic Letters,
vol. 27, pp. 307-308, Feb. 1991.

Continuous-time LMS adaptive recursive filters,
D.A. Johns, W.M. Snelgrove and A.S. Sedra,
IEEE Trans. on Circuits and Systems.
vol. 38, pp. 769-778, July 1991.

Programmable multiplexed switched-capacitor filters,
X.F. Wania, D.A. Johns and A.S. Sedra,
Electronic Letters,
vol. 26, pp. 1051-1053, July, 1990.

Adaptive recursive state-space filters using a gradient based algorithm,
D.A. Johns, W.M. Snelgrove and A.S. Sedra,
IEEE Trans. on Circuits and Systems,
vol. 37, pp. 673-684, June 1990.

Orthonormal ladder filters,
D.A. Johns, W.M. Snelgrove and A.S. Sedra,
IEEE Trans. on Circuits and Systems,
vol. CAS-36, pp. 337-343, March 1989.

State-space simulation of LC ladder filters,
D.A. Johns and A.S. Sedra,
IEEE Trans. on Circuits and Systems,
vol. CAS-34, pp. 986-988, August 1987.

Conference Papers

Analysis of Thermal Noise and the Effect of Parasitics in the Charge-Pump Integrator
A. Nilchi and D.A. Johns, PhD Research in Microelectronics and Electronics (PRIME), Berlin, Germany, July 2010.

A frequency-scalable 15-bit incremental ADC for low power sensor applications
Liang, Joshua; Johns, David A.; Circuits and Systems (ISCAS), Publication Year: 2010 , Page(s): 2418 - 2421

I. Ahmed, J. Mulder and D.A. Johns, “A 50MS/s 9.9mW piplined ADC with 58dB SNDR in 0.18um CMOS using capacitive charge pumps,” IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2009.

A. Nafee and D.A. Johns, “A 14 - bit Micro-Watt Power Scalable Automotive MEMS Pressure Sensor Interface”, European Solid-State Circuits Conference, Edinburgh, Scotland, Sept. 2008.

A. Gharbiya and D.A. Johns, “A 12-bit 3.125-MHz Bandwidth 0-3 MASH Delta-Sigma Modulator”, European Solid-State Circuits Conference, Edinburgh, Scotland, Sept. 2008.

I. Ahmed and D.A. Johns, “An 11-bit 45MS/s pipelined ADC with rapid calibration of DAC errors in a multi-bit pipeline stage”, European Solid-State Circuits Conference, Munich, Germany, Sept. 2007.

I. Ahmed and D.A. Johns, “A high bandwidth power scaleable sub-sampling 10-bit pipelined ADC with embedded sample-and-hold”, European Solid-State Circuits Conference, Munich, Germany, Sept. 2007.

T. Caldwll and D.A. Johns, “Time-interleaved incremental data converters with low oversampling ratios”, PhD Research in Microelectronics and Electronics (PRIME), France, July 2007.

I. Ahmed and D.A. Johns, “DAC Nonlinearity and Residue Gain Error Correction in a Pipelined ADC Using a Split-ADC Architecture”, PhD Research in Microelectronics and Electronics (PRIME), Otranto, Italy, June 2006.

T. Caldwell and D.A. Johns, “An incremental data converter with an oversampling ratio of 3”, PhD Research in Microelectronics and Electronics (PRIME), Otranto, Italy, June 2006.

T. Caldwell and D.A. Johns, “A time-interleaved continuous-time Delta-Sigma modulator with 20MHz signal bandwidth,” European Solid-State Circuits Conference, pp. 447-450, Grenoble, France, Sept. 2005.

A. Gharbiya and D.A. Johns, “Fully digital feedforward delta sigma modulator”, PhD Research in Microelectronics and Electronics (PRIME), Lausanne, Switzerland, July 2005.

T. Caldwell and D.A. Johns, “A high speed technique for time-interleaving continuous-time delta-sigma modulators”, PhD Research in Microelectronics and Electronics (PRIME), Lausanne, Switzerland, July 2005.

I. Ahmed and D.A. Johns, “A 50MS/s (35mW) to 1kS/s (15uW) power scaleable 10b pipelined ADC with minimal bias current variation,” IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2005.

N. Yaghini and D.A. Johns, “A 43mW CT complex delta-sigma ADC with 23MHz of signal bandwidth and 68.8dB SNDR,” IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2005.

R. Wang, K. Martin and D.A. Johns, “A 3.3mW 12MS/s 10b pipelined ADC in 90nm digital CMOS,” IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2005.

K. Farzan and D.A. Johns, “A low-power crosstalk-insensitive signaling scheme for chip-to-chip communication”, IEEE International Symposium on Circuits and Systems, Vancouver, British Columbia, May, 2004.

A. Hadji-Abdolhamid and D.A. Johns, “A 400-MHz 6-bit ADC with a partial analog equalizer for coaxial cable channels,” European Solid-State Circuits Conference, Lisbon, Portugal, Sept. 2003.

K. Farzan and D.A. Johns, “A low complexity power-efficient signaling scheme for chip-to-chip communication”, IEEE International Symposium on Circuits and Systems, Bangkok, Thailand, May, 2003.

K. Farzan and D.A. Johns, “A power-efficient architecture for high-speed D/A converters”, IEEE International Symposium on Circuits and Systems, Bangkok, Thailand, May, 2003.

K. Farzan and D.A. Johns, “A CMOS 7-Gb/s Power Efficient 4-PAM Transmitter,” European Solid-State Circuits Conference, Firenze, Italy, Sept. 2002.

A. Chan Carusone and D.A. Johns, “Analog filter adaptation using a dithered linear search algorithm,” IEEE International Symposium on Circuits and Systems, Scottsdale, Arizona, May, 2002.

A. Chan Carusone and D.A. Johns, “A 5th order Gm-C filter in 0.25um CMOS with digitally programmable poles and zeros,” IEEE International Symposium on Circuits and Systems, Scottsdale, Arizona, May, 2002.

K. Farzan and D.A. Johns, “Power efficient chip-to-chip signaling schemes,” IEEE International Symposium on Circuits and Systems, Scottsdale, Arizona, May, 2002.

B. Zand and D.A. Johns, “High speed CMOS analog Viterbi detector for 4-PAM partial response signalling,” European Solid-State Circuits Conference, Austria, Sept. 2001.

B. Zand, K. Phang, and D.A. Johns, “A transimpedance amplifier with dc-coupled differential photodiode current sensing for wireless optical communications,” pp. 455-458, IEEE Custom Integrated Circuits Conference, San Diego, California, May, 2001.

K. Phang and D.A. Johns, “A 1V 1mW CMOS front-end with on-chip dynamic gate biasing for a 75Mb/s optical receiver,” IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2001.

A. Hadji-Abdolhamid and D.A. Johns, “ADC resolution enhancement by an analog decorrelator,” IEEE International Symposium on Circuits and Systems, Geneva, June, 2000.

R. Mahadev and D.A. Johns, “A differential 160MHz self-terminating adaptive CMOS line driver,” pp. 436-437, IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2000.

J. Cheng and D.A. Johns, “A 100MHz partial analog equalizer for use in wired data transmission,” European Solid-State Circuits Conference, Duisburg, Germany, Sept. 1999.

A. Carusone and D.A. Johns, “Obtaining digital gradient signals for analog adaptive filters,” IEEE International Symposium on Circuits and Systems, Florida, May, 1999.

S. Hranilovic and D.A. Johns, “A multilevel modulation scheme for high-speed wireless infrared communications,” IEEE International Symposium on Circuits and Systems, Florida, May, 1999.

B. Zand, K. Phang and D.A. Johns, “Transimpedance amplifier with differential photodiode current sensing,” IEEE International Symposium on Circuits and Systems, Florida, May, 1999.

T. Zourntos, and D.A. Johns, “Stable one-Bit delta-sigma modulators based on switching control”, IEEE International Conference on Acoustics, Speech and Signal Processing, Seattle, WA, May, 1998.

K. Phang and D.A. Johns, “A 3-V CMOS optical preamplifier with dc photocurrent rejection,” IEEE International Symposium on Circuits and Systems, Monterey, CA, May, 1998.

A. Abdolhamid and D.A. Johns, “A comparison of CAP/QAM architectures,” IEEE International Symposium on Circuits and Systems, Monterey, CA, May, 1998.

D.A. Johns and D. Essig, “Integrated circuits for data transmission over twisted-pair channels,”‘ IEEE Custom Integrated Circuits Conference, pp. 5-12, San Diego, California, May, 1996 (invited paper).

M.H. Shakiba, D.A. Johns and K.W. Martin, “A 200MHz 3.3V BiCMOS class-IV partial-response analog Viterbi decoder,” Custom Integrated Circuits Conference, pp. 567-570, Santa Clara, California, May, 1995.

K. Kozma, D.A. Johns and A.S. Sedra, “An approach for tuning high-Q continuous-time bandpass filters,” IEEE International Symposium on Circuits and Systems, pp. 1037-1040, Seattle, Washington, May, 1995.

R. Khoini-Poorfard and D.A. Johns, “Mismatch effects in time-interleaved oversampling converters,” IEEE International Symposium on Circuits and Systems, pp. 5.429-5.432, London, England, May 1994.

M.H. Shakiba, D.A. Johns and K.M. Martin, “Analog implementation of class-IV partial-response Viterbi detector,” IEEE International Symposium on Circuits and Systems, pp. 4.91-4.94, London, England, May 1994.

A. Munshi, D.A. Johns, A.S. Sedra, “Adaptive impedance matching,” IEEE International Symposium on Circuits and Systems, pp. 2.69-2.72, London, England, May 1994.

A. Shoval, D.A. Johns, and W.M. Snelgrove, “DC offset performance of four LMS adaptive algorithms,” IEEE International Symposium on Circuits and Systems, 2.409-2.412, London, England, May 1994.

A.K. Lu, G.W. Roberts and D.A. Johns, “A high-quality analog oscillator using oversampling D/A conversion techniques,” IEEE International Symposium on Circuits and Systems, pp. 1298-1301, Chicago, May 1993.

D.A. Johns, D.M. Lewis and D. Cherepacha, “Highly selective “analog” filters using delta-sigma based IIR filtering,” IEEE International Symposium on Circuits and Systems, pp. 1302-1305, Chicago, May 1993.

R. Khoini-Poorfard and D.A. Johns, “On the effect of comparator hysteresis in interpolative delta-sigma modulators,” IEEE International Symposium on Circuits and Systems, pp. 1148-1151, Chicago, May 1993.

A.S. Munshi, D.A. Johns and A.S. Sedra, “Equalization and linearization via linear negative feedback,” IEEE International Symposium on Circuits and Systems, pp. 2502-2505, Chicago, May 1993.

A.S. Munshi and D.A. Johns, “Adaptive IIR filtering of delta-sigma modulated signals,” IEEE International Conference on Acoustic, Speech and Signal Processing, Vol. III, pp. 356-359, Minneapolis, Apr. 1993.

A. Shoval, D.A. Johns and W.M. Snelgrove, “A wide-range tunable BiCMOS transconductor,” CCVLSI, pp. 81-88, Halifax, Oct. 1992.

R. Khoini-Poorfard and D.A. Johns, “Stabilizing adaptive lattice IIR structures by projection of constraints,” IEEE Midwest Symposium on Circuits and Systems, pp. 1481-1484, Washington, DC, Aug. 1992.

K.A. Kozma, D.A. Johns and A.S. Sedra, “On the tuning of continuous-time integrated filters, including parasitic effects,” IEEE International Symposium on Circuits and Systems, pp. 835-838, San Diego, May 1992.

A. Shoval, D.A. Johns and W.M. Snelgrove, “Median-based offset cancellation circuit technique,” IEEE International Symposium on Circuits and Systems, pp. 2033-2036, San Diego, May 1992.

B.R. Owen and D.A. Johns, “A single-column structure for delta-sigma based IIR filters,” IEEE International Symposium on Circuits and Systems, pp. 2413-2416, San Diego, May 1992.

D.A. Johns and D.M. Lewis, “Sigma-delta based IIR filters,” Midwest Symposium on Circuits and Systems, pp. 210-213, Monterey, California, May, 1991.

X.F. Wania, D.A. Johns and A.S. Sedra, “Programmable multiplexed switched-capacitor filters,” Midwest Symposium on Circuits and Systems, pp. 973-976, Calgary, Alberta, Aug., 1990.

D.A. Johns, W.M. Snelgrove and A.S. Sedra, “Performance improvements for fine-tuned adaptive recursive filters,” IEEE International Symposium on Circuits and Systems, pp. 1951- 1954, New Orleans, Louisiana, May 1990.

K.A. Kozma, D.A. Johns, and A.S. Sedra, “An adaptive tuning circuit for integrated continuous-time filters,” IEEE International Symposium on Circuits and Systems, pp. 1163-1166, New Orleans, Louisiana, May 1990.

D.A. Johns, W.M. Snelgrove and A.S. Sedra, “DC offsets in analogue adaptive IIR filters,” European Conference on Circuit Theory and Design, pp. 137-141, Brighton, UK, Sept., 1989.

D.A. Johns, W.M. Snelgrove and A.S. Sedra, “Continuous-time analog adaptive recursive filters,” IEEE International Symposium on Circuits and Systems, pp. 667-670, Portland, Oregon, May, 1989.

X.Y. Gao, W.M. Snelgrove and D.A. Johns, “Nonlinear IIR adaptive filtering using a bilinear structure,” IEEE International Symposium on Circuits and Systems, pp. 1740-1743, Portland, Oregon, May, 1989.

D.A. Johns, W.M. Snelgrove and A.S. Sedra, “State-space adaptive recursive filters,” IEEE International Symposium on Circuits and Systems, pp. 2153-2156, Helsinki, Finland, June, 1988.

D.A. Johns, W.M. Snelgrove and A.S. Sedra, “Orthogonal filters and singly-terminated LC ladder filters,” Midwest Symposium on Circuits and Systems, pp 761-764, Syracuse, NY, August, 1987.

D.A. Johns, W.M. Snelgrove and A.S. Sedra, “Nonideal effects in analog adaptive IIR filters,” Midwest Symposium on Circuits and Systems, pp 594-597, Champaign-Urbana, Illinois, Aug. 1989 (invited)



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