Alireza Kaviani

I am currently working at XILINX Inc. located in San Jose area. Before starting my current job I was a lecturer in the Dept. of Electrical and Computer Engineering at the University of Toronto, where I did my PhD. The title of my PhD dissertation is Novel Architectures and Synthesis Methods for High Capacity Field Programmable Devices. Click here to see the abstract and table of contents of my PhD thesis. I obtained my M.A.Sc. in Computer Engineering from University of Toronto in 1994. I also hold a B.Sc. in Electrical Engineering from Sharif University in Tehran/Iran.

Courses

• Spring 1999:
  Digital Hardware Design Using Programmable Logic Devices ECE1756
  Computer Hardware ECE342
• Fall 1998:
  Microprocessor Systems ECE385F
  Introduction to Microprocessors ECE370F

Accomplishments

• Alireza Kaviani, "Using Design Hierarchy to Improve Quality of Results in FPGAs," International Conference on Field-Programmable Logic and Applications (FPL'2002), France, Sep. 2002, pp. 1017-1026.
• Li Shang, Alireza Kaviani and K. Bathala, "Dynamic Power Consumption in Virtex-II FPGA Family," International Symposium on Field-Programmable Gate Arrays (FPGA'2002), Monterey, CA, Feb. 2002, pp. 157-164.
• Alireza Kaviani and Stephen Brown, "Computational Field Programmable Architecture," Patent # 6,140,839, filed on May 13th 1998, issued on Oct. 31, 2000.
• Alireza Kaviani and Stephen Brown, "Technology Mapping Issues for an FPGA with Lookup Tables and PLA-like Blocks," International Symposium on Field-Programmable Gate Arrays (FPGA'2000), Monterey, CA, Feb. 2000, pp. 60-66. PostScript
• Alireza Kaviani and Stephen Brown, "The Hybrid Field Programmable Architecture," IEEE Design and Test, pp. 74-83. April-June 1999.
• Alireza Kaviani and Stephen Brown, "Efficient Implementation of Array Multipliers in FPGAs," The Fifth Canadian Workshop on Field Programmable Devices (FPD98), Montreal, QB, June 1998. PostScript
• Alireza Kaviani, "Hybrid Programmable Logic Device" Patent # 5,841,291 filed on Feb. 9th 1996, issued on Nov. 24, 1998.
• Alireza Kaviani, Daniel Vranesic and Stephen Brown, "Computational Field Programmable Architecture," Custom Integrated Circuits Conference (CICC98), Santa Clara, CA, May 1998. PostScript
• Alireza Kaviani and Stephen Brown, "Hybrid FPGA Architecture," International Symposium on Field-Programmable Gate Arrays (FPGA'96), Monterey, CA, Feb. 1996, pp. 1-7. Click here to see more.
• Alireza Kaviani and Zvonko Vranesic, "On Scheduling in Multiprocessor Systems Using Fuzzy Logic," The 24th International Symposium on Multiple-valued Logic (MVL'94), Boston, May 1994, pp. 141-147. PostScript

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