Related Research

• The CAD Benchmarking LAB at North Carolina State University stores a large collection of real benchmark circuits for synthesis, partitioning, and other work.

· The SIS logic synthesis software and documentation is available from the Berkeley CAD Software site.

· Charles Alpert has done extensive paritioning work. His site has benchmarks, public-domain code and a detailed survey of algorithms in partitioning.

· Much of the motivation for this work comes from FPGA companies such as Actel, Altera, and Xilinx,

· Vaughn Betz does work on FPGA architecture and placement and global routing algorithms. We used his excellent tool VPR for our experiments.

· Steve Wilton has done work to stochastically generate memory configurations in his work on memory in FPGAs.

· Mohammad Khalid works on architecture for Field-Programmable Systems and should be one of our best customers for random circuits.

· Yaska Sankar used these circuits for his research on fast placement.

· Other FPGA CAD Software written at the University of Toronto is available to download.

· Joel Darnauer has also made a package which generates random circuits. His is intended more towards research in Field-Programmable Systems, and is based on the Rent exponent in a circuit's partition tree.

· Paul Kundarewich is currently working on circuit generation.