Mike
Hutton – Research Publications.
Journal
Papers
·
Michael
Hutton, Jonathan Rose and Derek Corneil.
Automatic
Generation of Synthetic Sequential Benchmark Circuits. To Appear, IEEE Trans. CAD,
2002.
·
Michael
Hutton, Khosrow Adibsamii and Andrew Leaver. Adaptive
Delay Estimation for Partioning-Driven PLD placement. To Appear, IEEE Trans.VLSI, 2002.
·
Michael
Hutton, J.P. Grossman, Jonathan Rose and Derek Corneil. Characterization
and Parameterized Random Generation of Combinational Benchmark Circuits. IEEE Trans. CAD, Vol 17, No 10,
pp 955-966, Oct, 1998.
·
Michael
Hutton and Anna Lubiw. Upward planar
drawing of single-source acyclic digraphs. SIAM J. Computing Vol 25, No. 2, pp 291-311. April 1996.
Conference
Papers
·
Michael
Hutton, Vinson Chan, Peter Kazarian, Victor Maruri, Tony Ngai, Jim Park, Rakesh
Patel, Bruce Pedersen, Jay Schleicher and Sergey Shumarayev. Interconnect
Enhancements for a High-Speed PLD Architecture. In Proc 10th ACM/SIGDA International Symposium
on FPGAs (FPGA), pp. 3-11. Feb
2002.
·
Michael
Hutton. Interconnect
Prediction for Programmable Logic Devices. In Proc. ACM/SIGDA Int’l Workshop on System-Level
Interconnect Prediction (SLIP),
pp. 125-131, April 2001.
·
Michael
Hutton, Andrew Leaver and Khosrow Adibsamii, Timing-Driven
Placement for Hierarchical Programmable Logic Devices. In Proc 9th
ACM/SIGDA International Symposium on FPGAs (FPGA), pp. 3-11. Feb, 2001.
·
Michael
Hutton and Jonathan Rose. Applications
of Clone Circuits to Issues in Physical Design. In Proc. 1999 Int’l Symposium on Circuits and Systems
(ISCAS), April 1999.
·
Michael
Hutton and Jonathan Rose. Equivalence
Classes of Clone Circuits to Issues in Physical Design. In Proc. 1999 Int’l Symposium on
Circuits and Systems (ISCAS), April 1999.
·
Michael
Hutton, Jonathan Rose and Derek Corneil, Generation of
Synthetic Sequential Benchmark Circuits. In Proc. 5th ACM/SIGDA International Symposium
on FPGAs (FPGA), pp. Feb 1997.
·
Michael
Hutton, J.P. Grossman, Jonathan Rose and Derek Corneil. Characterization
and Parameterized Random Generation of Digital Circuits. In Proc. 33rd ACM/SIGDA
Design Automation Conference (DAC), pp. 94-99. June, 1996.
·
Michael
Hutton and Anna Lubiw. Upward planar
drawing of single-source acyclic digraphs. In Proc. 2nd ACM/SIAM Symposium on Discrete
Algorithms (SODA), pp. 197-217, 1991.
Re-printed by invitation in W.T. Trotter, Ed, Planar Graphs: DIMACS Series in Discrete
Mathematics and Computer Science, Vol. 9, American Mathematical Society,
Providence RI, 1993, pp. 41-57.
Thesis
Publications
·
Michael
Hutton. Characterization and
Automatic Generation of Benchmark Circuits. Ph.D. Thesis, University of Toronto. June, 1997. Chapters:
0
1 2 3 4 5 6 7 A B C bib
·
Michael
Hutton. Upward planar
drawing of single-source acyclic digraphs. Master’s Thesis, University of Waterloo, October, 1990.
Other
·
Michael
Hutton. Notes on
integer bin-packing for technology mapping on trees. Unpublished manuscript. 1992.
·
Michael
Hutton. Non-canonical
extensions of LR Parsing Methods.
Unpublished manuscript, 1990.