ECE352 - Fall 2014

Andreas Moshovos (*)

 

** Warning **

 

There may be errors or omissions in the notes that follow and of course I’m responsible for them. If you do spot an error please let me know. There no intentional errors in the notes. Irrespective of any typos and other errors, you are responsible for the “correct answer” to questions and problems.

 

If you want to experiment with NIOS II programs outside of the labs I recommend purchasing a DE-1 or a DE-2 board.

 

The schedule below is adapted from the 2013 offering. The material and order may change as we move forward.

 

THEMATIC SECTION #1: Understanding what computers do at the low level:

What you need to know to successfully program a computer

 

Week of Sept. 8

 

1.  Introduction, course goals, digital systems and why they are useful.

 

2.  Using Binary Quantities to Represent Other Things.

We will not cover real number representations (including floating point) yet. We will do so later in the semester.

**** Self-Assessment Quiz (answers)

**** Program to print out the floating point representation in hexadecimal.

**** Practice questions Answers

·                             More information about floating point numbers – we will not cover or discuss any of this material.

 

3.  Behavioral Model of Memory.

* if there is time we will cover this in the lectures:

       - The DE1 SRAM memory chip interface: lecture slides, datasheet

**** Practice questions

**** Self-Assessment Quiz POSTED SEPT. 11

 

Week of Sept. 15

 

4.  Introduction to the NIOS II programming model.

Practice questions: ADDI and immediates.

 

5.  Simple Control Flow (non straight-line sequencing).

Lecture Slides: A = B + C, if-then-else (PPTX)

 

 

 

Week of Sept. 22

 

6.  Subroutines – Requirements – Calling and Returning

Lecture Slides: i. Calling and Returning (PPTX)

               ii. Call/return execution sequence (PPTX)

           

 

7.  Subroutines – Passing Arguments

      Examples of functions using strings as arguments

      Strings are zero-terminated in C. So “lala” is stored in memory as five bytes: ‘l’, ‘a’, ‘l’, ‘a’, 0.

      You can think of strings as arrays of bytes where the last element is always zero.

      See lecture 2 for more information.
      Another example of subroutine calls

 

8.  A Recursive Subroutine posted Sept 25

 

 

Week of Sept. 29

 

9.  For loops, arrays and do-while loops.

 

10.Structures and recursive datatypes
We did not go over the assembly code yet. We will do so later on in the course.

 

11.Introduction to I/O Devices: The Parallel Port Interface (PIT)
For the time being read only the mapped I/O section.

12.The Serial Port / Universal Asynchronous Receiver Transmitter (UART)

 

13.Introduction to Interrupts / UART Updated and Section added, Oct2.

14.The Timer Device

This is for reference for your lab.

 

Week of Sept. 30

 

15.Code Races.

16.Emulating instructions in software via interrupts.

Lecture slides

17.Memory Interface: Connecting to Memory and Devices

Slides used in the lectures: bus and devices.pptx, Added Oct 18

 

Week of Oct. 6

 

18.Memory-Mapped I/O: Physical Implementation

 

 

Week of Oct. 13

 

19.A Single-Cycle Processor

20.Modifying the single-cycle processor

      Slides used in the lectures: singlecycle.ppt

 

 

Week of Oct. 20

 

21.Multi-cycle implementation: The control

      Control drawing

      Slides used in the lectures: multicycle.ppt

 

22.Modifying the multi-cycle implementation

 

23.Pipelined implementation Figures revised on Oct. 30. Corrected the pipeline for immediate using instructions.

Lecture slides: pipelining

Description of the SRAM chip to be used in the lab: DE1 SRAM chip. The datasheet for this SRAM chip.

 

24.Multi-programmed Control We’ll cover this later

25.Bus-based datapath/control implementation We’ll cover this later

 

Week of Oct. 27

 

26.Pipelining example, interrupts, preserving sequential semantics and superscalar: slides.

27.Dynamic Scheduling: Out-of-order execution and register renaming: slides.

28.A Modern Processor: slides:

29.Independence Architectures: VLIW, SIMD, and Vector Processors: slides.

 

Week of Nov. 3

 

   28. Graphics processors for general purpose computation: slides.

   29. Control Flow Prediction: slides.

 

Week of Nov. 10

 

30.Synthesizing Large Memory from Existing Components

31.Memory: internal organization and operation, SRAM and DRAM: slides.

32.Caches (Prof. Steffan) – We will be going over this material over several lectures. We will cover it in a different way, and we may cover topics not referred to in these notes. Please keep notes during the lectures.

      Additional Notes on Caches

      Examples on Caches and Execution Time

 

Week of Nov. 17

  

33.Replacement policies, Virtual Memory and Multiprocessor systems: slides.


Week of Nov. 24

 

34.Floating Point Representation (see earlier notes #2 above): slides.

35.Addition and Adder Circuits: slides.

36.Multiplication and Division: slides.

 

 

 

(*) Permission is given to reproduce these notes provided that a notice of their origin is clearly given. All rights reserved just in case :)