module wrapper10k70 ( address, data, clk, pclk, fc, as, reset, dtack, lds, uds, rw, srama, sramdl, sramdh, sram1en, sram2en, sram1oe, sram2oe, sram1we, sram2we, sram1ud, sram2ud, sram1ld, sram2ld, cod_sync, cod_sdin, cod_sdout, cod_lrsync, cod_sclk, br_sfpga, bg_sfpga, bgack_sfpga, irqsf, iacksf, hex0, hex1, hex2, hex3, sfpga_digital, sfpga_con40, sfpga_logic, sfpga_con60, tmpinput, led ); input [23:1] address; input [15:0] data; input [38:0] tmpinput; input clk; input pclk; input [2:0] fc; input as; input reset; input dtack; input lds; input uds; input rw; input [17:0] srama; input [15:0] sramdl; input [15:0] sramdh; input sram1en; input sram2en; input sram1oe; input sram2oe; input sram1we; input sram2we; input sram1ud; input sram2ud; input sram1ld; input sram2ld; input cod_sync; input cod_sdin; input cod_sdout; input cod_lrsync; input cod_sclk; input br_sfpga; input bg_sfpga; input bgack_sfpga; input irqsf; input iacksf; input [7:0] hex0; input [7:0] hex1; input [7:0] hex2; input [7:0] hex3; input [23:0] sfpga_digital; input [31:0] sfpga_con40; input [17:0] sfpga_logic; input [51:0] sfpga_con60; output [15:0] led; reg [3:0] dataled; reg [20:0] count; always @(posedge clk or negedge reset) begin if (reset == 1'b0) begin count = 20'b000000000000000000000; end else begin count = count + 1; end end always @(posedge clk or negedge reset) begin if (reset == 1'b0) begin dataled <= 4'b0000; end else begin if (count == 20'b11111111111111111111) begin dataled = dataled + 1; end else begin dataled = dataled; end end end assign led = ((dataled == 4'b0000) ? 16'b1111111111111110 : // led1 ((dataled == 4'b0001) ? 16'b1111111111111101 : // led2 ((dataled == 4'b0010) ? 16'b1111111111111011 : // led3 ((dataled == 4'b0011) ? 16'b1111111111110111 : // led4 ((dataled == 4'b0100) ? 16'b1111111111101111 : // led5 ((dataled == 4'b0101) ? 16'b1111111111011111 : // led6 ((dataled == 4'b0110) ? 16'b1111111110111111 : // led7 ((dataled == 4'b0111) ? 16'b1111111101111111 : // led8 ((dataled == 4'b1000) ? 16'b1111111011111111 : // led9 ((dataled == 4'b1001) ? 16'b1111110111111111 : // led10 ((dataled == 4'b1010) ? 16'b1111101111111111 : // led11 ((dataled == 4'b1011) ? 16'b1111011111111111 : // led12 ((dataled == 4'b1100) ? 16'b1110111111111111 : // led13 ((dataled == 4'b1101) ? 16'b1101111111111111 : // led14 ((dataled == 4'b1110) ? 16'b1011111111111111 : // led15 ((dataled == 4'b1111) ? 16'b0111111111111111 : // led16 16'b1111111111111111)))))))))))))))); endmodule