library altera;
use altera.maxplus2.all;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;


entity wrapper10k70 is
 port (
	
	pclk : in std_logic;
	clk : in std_logic;
	fc :  in std_logic_vector ( 2 downto 0);
	reset : in std_logic;

	address: in std_logic_vector(23 downto 1);
	data :	in std_logic_vector (15 downto 0);
	as	:  in std_logic;
	dtack : in std_logic;
	lds : in std_logic;
	uds	: in std_logic;
	rw 	: in std_logic;

	irqsf: in std_logic;
	iacksf : in std_logic;
	br_sfpga : in std_logic;
	bg_sfpga : in std_logic;
	bgack_sfpga : in std_logic;
	lrsync_cod : in std_logic;

	sync_cod : in std_logic;
	sclk_cod : in std_logic;
	sdout_cod : in std_logic;
	sdin_cod : in std_logic;
	
	srama : in std_logic_vector (17 downto 0);
	sramdl : in std_logic_vector (15 downto 0);
	sramdh : in std_logic_vector (15 downto 0);
	sram1en : in std_logic;
	sram2en : in std_logic;
	sram1oe : in std_logic;
	sram2oe : in std_logic;
	sram1we : in std_logic;
	sram2we : in std_logic;
	sram1ud : in std_logic;
	sram2ud : in std_logic;
	sram1ld : in std_logic;
	sram2ld : in std_logic;
	
	
	hex0 : in std_logic_vector(7 downto 0);
	hex1 : in std_logic_vector(7 downto 0);
	hex2 : in std_logic_vector(7 downto 0);
	hex3 : in std_logic_vector(7 downto 0);
	sfpga_digital :  in std_logic_vector(33 downto 0);
	sfpga_con40 :  in std_logic_vector(31 downto 0);
	sfpga_logic :  in std_logic_vector(17 downto 0);
	sfpga_con60 :  in std_logic_vector(51 downto 0);
	led : out std_logic_vector(15 downto 0);

-- these signals are for future use do not use or change
--------------------------------------------------------
	tmpinput : in std_logic_vector (38 downto 0)
--------------------------------------------------------
	);
	end wrapper10k70;
architecture temp_sfpga of wrapper10k70 is

	signal dataled :  std_logic_vector(3 downto 0);
	signal count:  std_logic_vector (20 downto 0);
begin

	counter: process (clk,count)
	begin
		if reset = '0' then
		count <= "000000000000000000000"; 
		elsif (clk ' event and clk = '1') then
		count <= count + 1;
		end if;
	end process;

	counter1: process (clk,count,dataled)
	begin
		if reset = '0' then
			dataled <= "0000";
			elsif (clk 'event and clk = '1' ) then
				if count = "111111111111111111111" then
				dataled <= dataled+1; 
				else
				dataled <= dataled;
			end if; 
		end if;	
	end process;	


	with dataled select
	led <= "1111111111111110" when  "0000", -- led1
          "1111111111111101" when  "0001",  -- led2
          "1111111111111011" when  "0010",  -- led3
          "1111111111110111" when  "0011",  -- led4
          "1111111111101111" when  "0100",  -- led5
          "1111111111011111" when  "0101",  -- led6
          "1111111110111111" when  "0110",  -- led7
          "1111111101111111" when  "0111",  -- led8
          "1111111011111111" when  "1000",  -- led9
          "1111110111111111" when  "1001",  -- led10
          "1111101111111111" when  "1010",  -- led11
          "1111011111111111" when  "1011",  -- led12
          "1110111111111111" when  "1100",  -- led13
          "1101111111111111" when  "1101",  -- led14
          "1011111111111111" when  "1110",  -- led15
          "0111111111111111" when  "1111",  -- led16
          "1111111111111111"when others;

end temp_sfpga;