This page provides an overview of the course and how it is run.
The specifics for any particular year will be provided through the
Piazza link for that year.
In the case of any ambiguity, the information on Piazza for the
relevant year will be deemed to be correct.
A special thanks to
Xilinx for the donations of hardware
and software that make the labs possible.
To check your current disk space usage and limits on the ug machines, use
the command quota -s.
Directory and File Names
Do not have any directories or filenames in your path that have spaces
in them.
For example, do not have your project directory in the folder called
``My Documents''.
To be safe, it would also be wise to take the same precaution when
installing the tools.
There is no textbook for this course.
When available, you will be provided with handouts or links to
material in piazza.
Timing Analysis
High-Speed Digital System Design: A
Handbook of Interconnect Theory and Design Practices, Hall, Hall
and McCall, Wiley. Chapter 8 is most directly relevant to the
lectures. Chapter 9 gets more into setting up spreadsheets to do
the computations. Available through UofT library
online
Clock Domains and Synchronization
Digital Systems Engineering, Dally and Poulton,
Cambridge. Chapter 10.
