Application-Specific Microarchitecture Optimizations
One of the important trends in microprocessor design is the specialization of microarchitectures. Last decade has shown the increase of the design of a number of Application-Specific Instruction Processors (ASIPs) such as Media and Network Processors. These designs take advantage of inherent application characteristics to meet the increasing performance and power constraints. In this talk, we discuss how such application-specific characteristics can be used to design effective methods to achieve reliability. Our main approach is based on the observation that the meaning of a fault is application-specific. For most server and desktop applications, omitting faults is not an option, i.e., the processor should be designed to capture and eliminate faults. This is the inherent nature of the user expectation. However, for other domains-such as networking and media applications-a certain level of error is acceptable, and the integrity of the system's behavior can be maintained despite potential faults. However, processors do not utilize this resiliency, i.e., regardless of the application at hand, a processor is expected to operate completely fault-free. In this talk, we will question this traditional approach and propose clumsy packet processors, which are not guaranteed to be fault-free. By using this relaxed correctness, we show that significant performance and energy optimizations can be achieved. In this talk, we study the effects of data cache faults on a number of representative networking applications. We first present a realistic model that estimates the change in the fault rates according to the clock frequency of the cache. Then, we present a scheme that dynamically adjusts the clock frequency of the data caches to achieve the desired optimization goal, e.g., reduced energy or reduced access latency. Note that, once the correctness constraint is released, traditional performance metrics such as energy-delay product become insufficient to compare alternative designs. Therefore, we also discuss new metrics that can effectively measure the quality of an architecture.
Biography: Dr. Gokhan Memik is an assistant professor at the Electrical and Computer Engineering Department of Northwestern University since September 2003. He received his B.S. degree in Computer Engineering in 1998 from Bogazici University, Istanbul / Turkey and his Ph.D. degree in Electrical Engineering from University of California at Los Angeles (UCLA) in August 2003. His PhD thesis titled "Microarchitectures for High Performance, Power Efficient Network Processors" introduced several optimizations for Network Processor microarchitectures including cache miss detection and data filtering. He is also the author of NetBench, a widely used benchmarking suite for Network Processors. Dr. Memik's research interests are in Computer Architecture and Design Automation with emphasis on networking hardware. He is the author of 2 book chapters and over 30 journal and refereed conference publications in these areas.