Architectural full-system software simulators such as Virtutech Simics are powerful and versatile research enablers for both architectural exploration and advanced OS/compiler development. Their main shortcoming is limited throughput, especially when simulating multiprocessor systems. Much recent research has focused on FPGA-based platforms to simulate/emulate hardware. Development turnaround and real-estate constraints on FGPAs often limit these platforms from achieving full-system simulation. In this talk, I will present the ProtoFlex hybrid emulation/simulation framework for accelerating full-system multiprocessor simulation using FPGAs. In ProtoFlex, only a small set of frequently encountered behaviors are implemented in the FPGA for acceleration while a software-based reference simulator implements the extensive set of infrequent behaviors. Furthermore, the mapping from simulated processors to the FPGA is virtualized using time-multiplexed interleaving so that many processor contexts can be emulated by a single physical pipeline. I will present applications for hybrid simulation/emulation and performance results comparing simulation throughput against pure software simulators.
Babak Falsafi is a Professor in the School of Computer and Communication Sciences at EPFL, and an Adjunct Professor of Electrical and Computer Engineering and Computer Science at Carnegie Mellon. He is the Microarchitecture thrust leader for the FCRP Center for Circuit and System Solutions and directs the Parallel Systems Architecture Laboratory (PARSA) at EPFL. His research targets architectural support for parallel programming, resilient systems, architectures to break the memory wall, and analytic and simulation tools for computer system performance evaluation. He is a recipient of an NSF CAREER award in 2000, IBM Faculty Partnership Awards between 2001 and 2004, and an Alfred P. Sloan Research Fellowship in 2004. He is a senior member of IEEE and ACM.