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J. Gregory SteffanPublicationsRefereed Conference PapersVESPA: Portable, Scalable, and Flexible FPGA-Based Vector Processors, (pdf) Peter Yiannacouras, J. Gregory Steffan, and Jonathan Rose, to appear in International Conference on Compilers, Architecture and Synthesis for Embedded Systems, Atlanta, GA, October, 2008.Scaling Soft Processor Systems, (pdf) Martin Labrecque, Peter Yiannacouras and J. Gregory Steffan, IEEE Symposium on Field-Programmable Custom Computing Machines, Palo Alto, CA, April, 2008. JudoSTM: a Dynamic Binary Rewriting Approach to Software Transactional Memory, (pdf) Marek Olszewski, Jeremy Cutler and J. Gregory Steffan, International Conference on Parallel Architectures and Compilation Techniques, Brasov, Romania, September, 2007. Improving Pipelined Soft Processors with Multithreading, (pdf) Martin Labrecque and J. Gregory Steffan, International Conference on Field-Programmable Logic, Reconfigurable Computing, and Applications, Amsterdam, Netherlands, August, 2007. A Probabilistic Pointer Analysis for Speculative Optimizations, (pdf) Jeffrey Da Silva and J. Gregory Steffan, International Conference on Architectural Support for Programming Languages and Operating Systems, pp. 416--425, San Jose, CA, October, 2006. Scaling Task Graphs for Network Processors, Martin Labrecque and J. Gregory Steffan, IFIP International Conference on Network and Parallel Computing, Tokyo, Japan, October, 2006. Tolerating Dependences Between Large Speculative Threads Via Sub-Threads, (pdf) Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, and Todd C. Mowry, International Symposium on Computer Architecture, pp. 216-226, Boston, MA, June, 2006. Improving Cache Locality for Thread-Level Speculation, (pdf) Stanley Fung and J. Gregory Steffan, IEEE International Parallel and Distributed Processing Symposium, pp. 10 pages, Rhodes Island, Greece, April, 2006. Application-Specific Customization of Soft Processor Microarchitecture, (pdf) Peter Yiannacouras, J. Gregory Steffan, and Jonathan Rose, International Symposium on Field-Programmable Gate Arrays, pp. 201--210, Monterey, CA, February, 2006. Optimistic Intra-Transaction Parallelism on Chip Multiprocessors, (pdf) Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, and Todd C. Mowry, International Conference on Very Large Data Bases, pp. 73--84, Trondheim, Norway, September, 2005. The Microarchitecture of FPGA-Based Soft Processors, (pdf) Peter Yiannacouras, Jonathan Rose and J. Gregory Steffan, International Conference on Compilers, Architecture and Synthesis for Embedded Systems, pp. 202--212, San Francisco, CA, September, 2005. Compiler Optimization of Memory-Resident Value Communication Between Speculative Threads, (pdf) Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan, and Todd C. Mowry, International Symposium on Code Generation and Optimization, pp. 39--50, Palo Alto, CA, March, 2004. Compiler Optimization of Scalar Value Communication Between Speculative Threads, (pdf) Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan, and Todd C. Mowry, International Conference on Architectural Support for Programming Languages and Operating Systems, pp. 171--183, San Jose, CA, October, 2002. Improving Value Communication for Thread-Level Speculation, (pdf) J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, and Todd C. Mowry, International Symposium on High-Performance Computer Architecture, pp. 65--75, Cambridge, MA, February, 2002. Generating Network Topologies That Obey Power Laws, (pdf) Christopher R. Palmer and J. Gregory Steffan, Global Internet Symposium, pp. 6 pages, San Francisco, CA, November, 2000.
A Scalable Approach to Thread-Level Speculation, (pdf) J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, and Todd C. Mowry, International Symposium on Computer Architecture, pp. 1--12, Vancouver, BC, June, 2000. The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization, (pdf) J. Gregory Steffan and Todd C. Mowry, International Symposium on High-Performance Computer Architecture, pp. 2--13, Las Vegas, NV, February, 1998.
Refereed Journal ArticlesIncrementally Parallelizing Database Transactions with Thread-Level Speculation, Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, and Todd C. Mowry, To appear in ACM Transactions on Computer Systems, pp. 47 pages, February, 2008.Compiler and Hardware Techniques to Improve Value Communication Between Speculative Threads, Antonia Zhai, J. Gregory Steffan, Christopher B. Colohan, and Todd C. Mowry, To appear in ACM Transactions on Architecture and Code Optimization, 2008. CMP Support for Large and Dependent Speculative Threads, (pdf) Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, and Todd C. Mowry, IEEE Transactions on Parallel and Distributed Systems, 18 (8) August, 2007. Custom Code Generation for Soft Processors, (pdf) Martin Labrecque, Peter Yiannacouras and J. Gregory Steffan, SIGARCH Computer Architecture News, 35 (3) pp. 9--19, June, 2007. Exploration and Customization of FPGA-Based Soft Processors, (pdf) Peter Yiannacouras, J. Gregory Steffan, and Jonathan Rose, IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems---special issue on FPGAs, 26 (2) pp. 266-277, February, 2007. The STAMPede Approach to Thread-Level Speculation, (pdf) J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, and Todd C. Mowry, ACM Transactions on Computer Systems, 23 (3) pp. 253-300, August, 2005.
Refereed WorkshopsImproving Memory System Performance for Soft Vector Processors, Peter Yiannacouras, J. Gregory Steffan, and Jonathan Rose, Workshop on Soft Processor Systems, Toronto, ON, October, 2008.A GPU-Like Soft Processor for High-Throughput Acceleration, Jeffrey Kingyens and J. Gregory Steffan, Workshop on Soft Processor Systems, Toronto, ON, October, 2008. The Potential for Variable-Granularity Access Tracking for Optimistic Parallelism, (pdf) Mihai Burcea, J. Gregory Steffan and Cristiana Amza, to appear in ACM SIGPLAN Workshop on Memory Systems Performance and Correctness (in conjunction with ASPLOS), Seattle, WA, March, 2008. Lengthening Traces to Improve Opportunities for Dynamic Optimization, (pdf) Chuck Zhao, Youfeng Wu, J. Gregory Steffan and Cristiana Amza, to appear in 12th Workshop on Interaction between Compilers and Computer Architectures (in conjuntion with HPCA), Salt Lake City, UT, February, 2008. Custom Code Generation for Soft Processors, (pdf) Martin Labrecque, Peter Yiannacouras and J. Gregory Steffan, Reconfigurable and Adaptive Architecture Workshop (in conjunction with MICRO), Orlando, FA, December, 2006.
Technical ReportsSupporting Large Speculative Threads for Databases and Beyond, (pdf) "Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan and Todd C. Mowry, School of Computer Science, Carnegie Mellon University, (CMU-CS-05-109) July, 2005.Optimistic Intra-Transaction Parallelism on Chip Multiprocessors, (pdf) Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan and Todd C. Mowry, School of Computer Science, Carnegie Mellon University, (CMU-CS-05-118) March, 2005. Secure Sharing with Satan's File System, (pdf) Chris Colohan, Chuck Rosenberg, and J. Gregory Steffan, Selected Reports: Fall 1997 Software Systems Course, G. Gibson (ed.), School of Computer Science, Carnegie Mellon University, (CMU-CS-98-103) pp. 1--16, April, 1998. Architectural Support for Thread-Level Data Speculation, (ps.gz) J. Gregory Steffan, Christopher B. Colohan, and Todd C. Mowry, School of Computer Science, Carnegie Mellon University, (CMU-CS-97-188) pp. 1--42, November, 1997.
Ph.D. ThesesHardware Support for Thread-Level Speculation, (pdf) J. Gregory Steffan, Ph.D. Thesis, School of Computer Science, Carnegie Mellon University, (CMU-CS-03-122) April, 2003.
Masters ThesesA GPU-Inspired Soft Processor for High-Throughput Acceleration, (pdf) Jeffrey Kingyens, Masters Thesis, Department of Electrical and Computer Engineering, University of Toronto, September, 2008.A Dynamic Instrumentation Approach to Software Transactional Memory, (pdf) Marek Olszewski, Masters Thesis, Department of Electrical and Computer Engineering, University of Toronto, October, 2007. A Probabilistic Pointer Analysis for Speculative Optimizations, (pdf) Jeffrey Da Silva, Masters Thesis, Department of Electrical and Computer Engineering, University of Toronto, March, 2006. Towards a Compilation Infrastructure for Network Processors, (pdf) Martin Labrecque, Masters Thesis, Department of Electrical and Computer Engineering, University of Toronto, January, 2006. Improving Cache Locality for Thread-Level Speculation, (pdf) Stanley Fung, Masters Thesis, Department of Electrical and Computer Engineering, University of Toronto, September, 2005. The Microarchitecture of FPGA-Based Soft Processors, (pdf) Peter Yiannacouras, Masters Thesis, Department of Electrical and Computer Engineering, University of Toronto, September, 2005. The Potential for Thread-Level Data Speculation in Tightly-Coupled Multiprocessors, (pdf) J. Gregory Steffan, Masters Thesis, Department of Electrical and Computer Engineering, University of Toronto, February, 1997.
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