Summary of ECE1755 Fall 2005

Computer architectures that exploit thread-level parallelism are becomming increasingly commonplace. This course explores the evolution of modern parallel architectures, and is divided into two phases. The first phase will provide a brief background and history of modern microprocessor architecture. We will then investigate in detail the design and operation of modern parallel architectures, with a brief look at how they are programmed. This phase will include several homeworks which provide hands-on experience with architectural simulation of the mechanisms described in class, and evaluation using real parallel machines.

The second phase of the course will switch gears: we will study current research and development of emerging parallel architectures including simultaneous multithreading, reconfigurable/programmable hybrids, grid processors, network processors, thread-level speculation, and architectures for nanotechnology; in this phase we will read research papers, and through the class project implement and evaluate new ideas. Students are welcome to suggest topics for class discussion and/or projects.