ECE1755 Fall 2008:
Parallel Computer Architecture and Programming

Home Administrivia Lectures/Readings/Reviews/Events Projects BBoard (soon)

Lectures and Other Events

Future events are tentative.
Lecture slides are available in pdf form (requiring acrobat reader).

Phase 1

Date Lecture Readings (due Monday night before corresponding class) Homework/Project Out Homework/Project Due
Sep 10 Lecture 1: Intro, Admin, and Background ( pdf, 2up.pdf, 4up.pdf ); Homework1 out
Sep 17 Lecture 2: Parallel Programming ( pdf, 2up.pdf, 4up.pdf ) Review: Berkeley; Review: Woo; CS 1,2,3;
Sep 24 Lecture 3: Interconnects and Coherence ( pdf, 2up.pdf, 4up.pdf ) Review: Stenstrom CS 5,7.1-2,10.1-4
Oct 1 Lecture 4: Scalable Coherence and Consistency ( pdf, 2up.pdf, 4up.pdf ) Review: Gharachorloo; CS 8.1-4, 9.1 Homework2 out Homework1 in
CS = Parallel Computer Architecture---A Hardware/Software Approach, by Culler, Singh, and Gupta (recommended textbook, )

Phase 2

Date Lecture Readings (due Monday night before corresponding class) Presenters Homework/Project Due
Oct 8 Multicore Organization Review:
1: Exploring the Design Space of Future CMPs;
2: Maximizing CMP Throughput with Mediocre Cores;
3: Single-ISA Heterogeneous Multi-Core Architectures; 		1: Alex C.;;
2: Zhengjun;;
3: Antony
Oct 15 Helper Threads Review:
1: Physical Experimentation with Prefetching Helper Threads on Intels Hyper-Threaded Processors;
2: Speculative Precomputation on Chip Multiprocessors;
3: Dynamic Helper Threaded Prefetching on the Sun UltraSPARC CMP Processor; 		1: Patricia;
2: Maryam;
3: Danyao 		Homework2 in, Project email proposal in
Oct 22 Thread-Level Speculation Review:
1: A Scalable Approach to Thread-Level Speculation;
2: Tolerating Dependences Between Large Speculative Threads Via Sub-Threads;
3: Program Demultiplexing; 		1: Bryce;
2: Syed;
3: Pranit
Oct 29 No Class Today!
Nov 5 Transactional Memory (TM) and Software TM (STM) Review:
1: The Atomos Transactional Programming Language;
2: JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory;
3: Architectural Support for Software Transactional Memory; 		1: Scott;
2: Amer;
3: Vince
Nov 12 Hardware TM (HTM) and Hybrid TM (HyTM) Review:
1: Transactional Coherence and Consistency;
2: Programming with Transactional Coherence and Consistency;
3: Hybrid Transactional Memory; 		1: Nick;
2: Marty;
3: Alex R. 		Project email interim in
Nov 19 Sequential to Parallel Review:
1: Revisiting the Sequential Programming Model for Multi-Core;
2: Automatic Thread Extraction with Decoupled Software Pipelining;
3: Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-Thread Applications; 		1: Michael;
2: Mark;
3: Elias
Nov 26 Domain Computing Review:
1: Optimization Principles and Application Performance Evaluation of a Multithreaded GPU Using CUDA;
2: Larrabee: A Many-Core x86 Architecture for Visual Computing;
3: ParallAX: An Architecture for Real-Time Physics; 		1: Zefu;
2: Kam;
3: Daniel
Dec 3 No Class Today!
Dec 10 No Class Today!
Dec17 Project Presentations project presentations (2:00-5pm)
Dec22 project final report due