%!PS-Adobe-3.0 %%BoundingBox: (atend) %%Pages: (atend) %%PageOrder: (atend) %%DocumentFonts: (atend) %%Creator: Frame 5.1 %%DocumentData: Clean7Bit %%EndComments %%BeginProlog %- %- Frame ps_prolog 5.0, for use with Frame 5.0 products %- This ps_prolog file is Copyright (c) 1986-1996 Adobe Systems, Incoporated. %- All rights reserved. This ps_prolog file may be freely copied and %- distributed in conjunction with documents created using FrameMaker, %- FrameMaker/SGML FrameReader and FrameViewer as long as this %- copyright notice is preserved. %- %- FrameMaker users specify the proper paper size for each print job in the %- "Print" dialog's "Printer Paper Size" "Width" and "Height~ fields. If the %- printer that the PS file is sent to does not support the requested paper %- size, or if there is no paper tray of the proper size currently installed, %- then the job will not be printed. The following flag, if set to true, will %- cause the job to print on the default paper in such cases. /FMAllowPaperSizeMismatch false def %- %- Frame products normally print colors as their true color on a color printer %- or as shades of gray, based on luminance, on a black-and white printer. The %- following flag, if set to true, forces all non-white colors to print as pure %- black. This has no effect on bitmap images. /FMPrintAllColorsAsBlack false def %- %- Frame products can either set their own line screens or use a printer's %- default settings. Three flags below control this separately for no %- separations, spot separations and process separations. If a flag %- is true, then the default printer settings will not be changed. If it is %- false, Frame products will use their own settings from a table based on %- the printer's resolution. /FMUseDefaultNoSeparationScreen true def /FMUseDefaultSpotSeparationScreen true def /FMUseDefaultProcessSeparationScreen false def %- %- For any given PostScript printer resolution, Frame products have two sets of %- screen angles and frequencies for printing process separations, which are %- recomended by Adobe. The following variable chooses the higher frequencies %- when set to true or the lower frequencies when set to false. This is only %- effective if the appropriate FMUseDefault...SeparationScreen flag is false. /FMUseHighFrequencyScreens true def %- %- The following is a set of predefined optimal frequencies and angles for various %- common dpi settings. This is taken from "Advances in Color Separation Using %- PostScript Software Technology," from Adobe Systems (3/13/89 P.N. LPS 0043) %- and corrolated with information which is in various PPD (4.0) files. %- %- The "dpiranges" figure is the minimum dots per inch device resolution which %- can support this setting. The "low" and "high" values are controlled by the %- setting of the FMUseHighFrequencyScreens flag above. The "TDot" flags control %- the use of the "Yellow Triple Dot" feature whereby the frequency id divided by %- three, but the dot function is "trippled" giving a block of 3x3 dots per cell. %- %- PatFreq is a compromise pattern frequency for ps Level 2 printers which is close %- to the ideal WYSIWYG pattern frequency of 9 repetitions/inch but does not beat %- (too badly) against the screen frequencies of any separations for that DPI. % This is computed by taking dpi/9 as the ideal pixels per repetition, and then % computing a tiling size in printer pixels for each of the four separations as % (dpi/screenFreq)*(cos(screenAngle)+sin(screenAngle)) Actually, this is the same % for Cyan and Magenta). Then, we take a "nice" LCM of the tile sizes close to % the desired pattern tile where the beat factor is not more than 2 or 3. % /dpiranges [ 2540 2400 1693 1270 1200 635 600 0 ] def /CMLowFreqs [ 100.402 94.8683 89.2289 100.402 94.8683 66.9349 63.2456 47.4342 ] def /YLowFreqs [ 95.25 90.0 84.65 95.25 90.0 70.5556 66.6667 50.0 ] def /KLowFreqs [ 89.8026 84.8528 79.8088 89.8026 84.8528 74.8355 70.7107 53.033 ] def /CLowAngles [ 71.5651 71.5651 71.5651 71.5651 71.5651 71.5651 71.5651 71.5651 ] def /MLowAngles [ 18.4349 18.4349 18.4349 18.4349 18.4349 18.4349 18.4349 18.4349 ] def /YLowTDot [ true true false true true false false false ] def /CMHighFreqs [ 133.87 126.491 133.843 108.503 102.523 100.402 94.8683 63.2456 ] def /YHighFreqs [ 127.0 120.0 126.975 115.455 109.091 95.25 90.0 60.0 ] def /KHighFreqs [ 119.737 113.137 119.713 128.289 121.218 89.8026 84.8528 63.6395 ] def /CHighAngles [ 71.5651 71.5651 71.5651 70.0169 70.0169 71.5651 71.5651 71.5651 ] def /MHighAngles [ 18.4349 18.4349 18.4349 19.9831 19.9831 18.4349 18.4349 18.4349 ] def /YHighTDot [ false false true false false true true false ] def /PatFreq [ 10.5833 10.0 9.4055 10.5833 10.0 10.5833 10.0 9.375 ] def %- %- PostScript Level 2 printers contain an "Accurate Screens" feature which can %- improve process separation rendering at the expense of compute time. This %- flag is ignored by PostScript Level 1 printers. /FMUseAcccurateScreens true def %- %- The following PostScript procedure defines the spot function that Frame %- products will use for process separations. You may un-comment-out one of %- the alternative functions below, or use your own. %- %- Dot function /FMSpotFunction {abs exch abs 2 copy add 1 gt {1 sub dup mul exch 1 sub dup mul add 1 sub } {dup mul exch dup mul add 1 exch sub }ifelse } def %- %- Line function %- /FMSpotFunction { pop } def %- %- Elipse function %- /FMSpotFunction { dup 5 mul 8 div mul exch dup mul exch add %- sqrt 1 exch sub } def %- %- /FMversion (5.0) def % matches PS_VERSION in fmprintdriver % PostScript Level 1 = true, 2 = false /fMLevel1 /languagelevel where {pop languagelevel} {1} ifelse 2 lt def % Set up Color vs. Black-and-White /FMPColor fMLevel1 { false /colorimage where {pop pop true} if } { % statusdict /processcolors known { % statusdict /processcolors get exec % } {1} ifelse % 1 gt true } ifelse def /FrameDict 400 dict def % should check this value each time changes made % % For NeWS we add a fake errordict, so we can psh files % systemdict /errordict known not {/errordict 10 dict def errordict /rangecheck {stop} put} if %- The readline in PS 23.0 doesn't recognize cr's as nl's on AppleTalk FrameDict /tmprangecheck errordict /rangecheck get put % save old rangecheck errordict /rangecheck {FrameDict /bug true put} put % will flag bug found FrameDict /bug false put % flag bug not found mark % since we're not sure what will happen next %- Some PS machines read past the CR, so keep the following 3 lines together! currentfile 5 string readline 00 0000000000 cleartomark % junk from readline and rangecheck errordict /rangecheck FrameDict /tmprangecheck get put % restore rangecheck FrameDict /bug get { % redefine readline if last one got a rangecheck /readline { /gstring exch def /gfile exch def /gindex 0 def { gfile read pop % get a char dup 10 eq {exit} if % exit if LF dup 13 eq {exit} if % exit if CR gstring exch gindex exch put % store it away /gindex gindex 1 add def % bump index } loop pop % eol character gstring 0 gindex getinterval true % simulate real readline } bind def } if % outer-world defs /FMshowpage /showpage load def /FMquit /quit load def /FMFAILURE { % enter with two error strings on the stack dup = flush % send a copy of the message to the console FMshowpage % msg on a page by itself, so it can't be, say, black on black /Helvetica findfont 12 scalefont setfont 72 200 moveto show 72 220 moveto show FMshowpage % we might be in the middle of some EPS, where "showpage" FMquit % and "quit" are redefined } def % only used once at most, so no bind /FMVERSION { FMversion ne { (Adobe Frame product version does not match ps_prolog! Check installation;) (also check ~/fminit and ./fminit for old versions) FMFAILURE } if } def % only used at startup, so no bind /FMBADEPSF { % Call with bad operator name on stack (as a string) (Adobe's PostScript Language Reference Manual, 2nd Edition, section H.2.4) (says your EPS file is not valid, as it calls X ) dup dup (X) search pop exch pop exch pop length % parmstr errstr errstr indx 5 -1 roll % errstr errstr index parmstr putinterval % errstr FMFAILURE } def % standard concatprocs routine /fmConcatProcs { /proc2 exch cvlit def/proc1 exch cvlit def/newproc proc1 length proc2 length add array def newproc 0 proc1 putinterval newproc proc1 length proc2 putinterval newproc cvx }def % Put all local variables here in alphabetical order. FrameDict begin [ /ALDsave /FMdicttop /FMoptop /FMpointsize /FMsaveobject /b /bitmapsave /blut /bpside /bs /bstring /bwidth /c /cf /cs /cynu /depth /edown /fh /fillvals /fw /fx /fy /g /gfile /gindex /grnt /gryt /gstring /height /hh /i /im /indx /is /k /kk /landscape /lb /len /llx /lly /m /magu /manualfeed /n /offbits /onbits /organgle /orgbangle /orgbfreq /orgbproc /orgbxfer /orgfreq /orggangle /orggfreq /orggproc /orggxfer /orgmatrix /orgproc /orgrangle /orgrfreq /orgrproc /orgrxfer /orgxfer /pagesave /paperheight /papersizedict /paperwidth /pos /pwid /r /rad /redt /sl /str /tran /u /urx /ury /val /width /width /ws /ww /x /x1 /x2 /xindex /xpoint /xscale /xx /y /y1 /y2 /yelu /yindex /ypoint /yscale /yy ] { 0 def } forall % Start of PDF/Acrobat support % Bind def /FmBD {bind def} bind def systemdict /pdfmark known { /fMAcrobat true def % FmPD is a conditional PDFMark /FmPD /pdfmark load def % FmPT is a show text operator which only show up when distiller is active /FmPT /show load def % FmPD2 and FmPA are Acrobat 2.0-specific currentdistillerparams /CoreDistVersion get 2000 ge { % FmPD2 is like FmPD but for Acrobat 2.0-specific PDF /FmPD2 /pdfmark load def % x y/name FmPA % is equivalent to % [/Dest/name/View[/FitH x y FmDC exch pop]/DEST FmPD % It is a shortcut for pagragraph Uinique ID designators whic occurr commonly. /FmPA { mark exch /Dest exch 5 3 roll /View [ /XYZ null 6 -2 roll FmDC exch pop null] /DEST FmPD }FmBD } { % These are No-Ops for Distiller 1.0 /FmPD2 /cleartomark load def /FmPA {pop pop pop}FmBD } ifelse } { % these are the No-Ops for regular PostScript /fMAcrobat false def /FmPD /cleartomark load def /FmPD2 /cleartomark load def /FmPT /pop load def /FmPA {pop pop pop}FmBD } ifelse % This convert a set of X Y coordinates from the current user space to the default % PostScript coordinates needed by some pdfmark variants. We also convert to % integer because the distiller doesn't always like floats! /FmDC { transform fMDefaultMatrix itransform cvi exch cvi exch }FmBD % This converts four numbers into a bounding box making sure the first two are maller than the last two /FmBx { dup 3 index lt {3 1 roll exch} if 1 index 4 index lt {4 -1 roll 3 1 roll exch 4 1 roll} if }FmBD % End of PDF/Acrobat support % % Color separation code % % Constants. /FMnone 0 def /FMcyan 1 def /FMmagenta 2 def /FMyellow 3 def /FMblack 4 def /FMcustom 5 def /fMNegative false def % we are inverting the page % Variables. /FrameSepIs FMnone def % separation we are printing % If FrameSepIs is FMcustom, this is the custom color /FrameSepBlack 0 def /FrameSepYellow 0 def /FrameSepMagenta 0 def /FrameSepCyan 0 def /FrameSepRed 1 def /FrameSepGreen 1 def /FrameSepBlue 1 def /FrameCurGray 1 def /FrameCurPat null def /FrameCurColors [ 0 0 0 1 0 0 0 ] def % c m y k r g b % Utility routines /FrameColorEpsilon .001 def % epsilon by which values can differ and sill be equal /eqepsilon { % v1 v2 eqeps bool sub dup 0 lt {neg} if FrameColorEpsilon le } bind def % are the cmyk and cmykrgb arrays on the stack the same color? /FrameCmpColorsCMYK { % [ c1 m1 y1 k1 ] [ c2 m2 y2 k2 r2 g2 b2] -> bool 2 copy 0 get exch 0 get eqepsilon { 2 copy 1 get exch 1 get eqepsilon { 2 copy 2 get exch 2 get eqepsilon { 3 get exch 3 get eqepsilon } {pop pop false} ifelse }{pop pop false} ifelse } {pop pop false} ifelse } bind def % are the rgb and cmykrgb arrays on the stack the same color? /FrameCmpColorsRGB { % [ r1 g1 b1 ] [ c2 m2 y2 k2 r2 g2 b2] -> bool 2 copy 4 get exch 0 get eqepsilon { 2 copy 5 get exch 1 get eqepsilon { 6 get exch 2 get eqepsilon }{pop pop false} ifelse } {pop pop false} ifelse } bind def % convert r g b to c m y k /RGBtoCMYK { % r g b 1 exch sub % r g y 3 1 roll % y r g 1 exch sub % y r m 3 1 roll % m y r 1 exch sub % m y c 3 1 roll % c m y 3 copy % c m y c m y 2 copy % c m y c m y m y le { pop } { exch pop } ifelse % c m y c min(m,y) 2 copy % c m y c min(m,y) c min(m,y) le { pop } { exch pop } ifelse % c m y min(c, min(m,y)) dup dup dup % c m y k k k k 6 1 roll % c k m y k k k 4 1 roll % c k m k y k k 7 1 roll % k c k m k y k sub % k c k m k y 6 1 roll % y k c k m k sub % y k c k m 5 1 roll % m y k c k sub % m y k c 4 1 roll % c m y k } bind def /CMYKtoRGB { % c m y k CMYKtoRGB r g b dup dup 4 -1 roll add % c m k k y+k 5 1 roll 3 -1 roll add % y+k c k m+k 4 1 roll add % m+k y+k c+k 1 exch sub dup 0 lt {pop 0} if 3 1 roll % r m+k y+k 1 exch sub dup 0 lt {pop 0} if exch % r b m+k 1 exch sub dup 0 lt {pop 0} if exch % r g b } bind def % Public routines % Happens at the top of each page that is a separation /FrameSepInit { 1.0 RealSetgray } bind def % Tell the separation code that this separation is for a custom color /FrameSetSepColor { % c m y k r g b /FrameSepBlue exch def /FrameSepGreen exch def /FrameSepRed exch def /FrameSepBlack exch def /FrameSepYellow exch def /FrameSepMagenta exch def /FrameSepCyan exch def /FrameSepIs FMcustom def setCurrentScreen } bind def % Tell the separation code that this separation is Cyan /FrameSetCyan { /FrameSepBlue 1.0 def /FrameSepGreen 1.0 def /FrameSepRed 0.0 def /FrameSepBlack 0.0 def /FrameSepYellow 0.0 def /FrameSepMagenta 0.0 def /FrameSepCyan 1.0 def /FrameSepIs FMcyan def setCurrentScreen } bind def % Tell the separation code that this separation is Magenta /FrameSetMagenta { /FrameSepBlue 1.0 def /FrameSepGreen 0.0 def /FrameSepRed 1.0 def /FrameSepBlack 0.0 def /FrameSepYellow 0.0 def /FrameSepMagenta 1.0 def /FrameSepCyan 0.0 def /FrameSepIs FMmagenta def setCurrentScreen } bind def % Tell the separation code that this separation is Yellow /FrameSetYellow { /FrameSepBlue 0.0 def /FrameSepGreen 1.0 def /FrameSepRed 1.0 def /FrameSepBlack 0.0 def /FrameSepYellow 1.0 def /FrameSepMagenta 0.0 def /FrameSepCyan 0.0 def /FrameSepIs FMyellow def setCurrentScreen } bind def % Tell the separation code that this separation is Black /FrameSetBlack { /FrameSepBlue 0.0 def /FrameSepGreen 0.0 def /FrameSepRed 0.0 def /FrameSepBlack 1.0 def /FrameSepYellow 0.0 def /FrameSepMagenta 0.0 def /FrameSepCyan 0.0 def /FrameSepIs FMblack def setCurrentScreen } bind def % Tell the separation code we are not doing a separation /FrameNoSep { % /FrameSepIs FMnone def setCurrentScreen } bind def % Initialize the separation code with all the custom colors we are % separating (not process colors) /FrameSetSepColors { % list of arrays of [c m y k r g b] count FrameDict begin [ exch 1 add 1 roll ] /FrameSepColors % array of arrays of colors we are separating exch def end } bind def % is this color array in the array of custom color separations? /FrameColorInSepListCMYK { % [ c m y k ] -> bool FrameSepColors { % color elem-of-array exch dup 3 -1 roll % color color elem FrameCmpColorsCMYK % color bool { pop true exit } if } forall % exits with either [color] or true dup true ne {pop false} if } bind def /FrameColorInSepListRGB { % [ r g b ] -> bool FrameSepColors { % color elem-of-array exch dup 3 -1 roll % color color elem FrameCmpColorsRGB % color bool { pop true exit } if } forall % exits with either [color] or true dup true ne {pop false} if } bind def % Level 1 color operators saved and redefined /RealSetgray /setgray load def /RealSetrgbcolor /setrgbcolor load def /RealSethsbcolor /sethsbcolor load def end % Setgray patch /setgray { % num FrameDict begin FrameSepIs FMnone eq { RealSetgray } { % go to white unless the current sep color is black FrameSepIs FMblack eq { RealSetgray } { FrameSepIs FMcustom eq FrameSepRed 0 eq and FrameSepGreen 0 eq and FrameSepBlue 0 eq and { RealSetgray } { 1 RealSetgray pop } ifelse } ifelse } ifelse end } bind def /setrgbcolor { % r g b FrameDict begin FrameSepIs FMnone eq { RealSetrgbcolor } { 3 copy [ 4 1 roll ] % r g b [ r g b ] FrameColorInSepListRGB { FrameSepBlue eq exch FrameSepGreen eq and exch FrameSepRed eq and { 0 } { 1 } ifelse } { FMPColor { RealSetrgbcolor currentcmykcolor } { RGBtoCMYK } ifelse FrameSepIs FMblack eq {1.0 exch sub 4 1 roll pop pop pop} { FrameSepIs FMyellow eq {pop 1.0 exch sub 3 1 roll pop pop} { FrameSepIs FMmagenta eq {pop pop 1.0 exch sub exch pop } { FrameSepIs FMcyan eq {pop pop pop 1.0 exch sub } {pop pop pop pop 1} ifelse } ifelse } ifelse } ifelse } ifelse RealSetgray } ifelse end } bind def /sethsbcolor { FrameDict begin FrameSepIs FMnone eq { RealSethsbcolor } { RealSethsbcolor % safe since we will overwrite the color state currentrgbcolor % r g b - Let PostsCript to the conversion. setrgbcolor % call our version } ifelse end } bind def FrameDict begin /setcmykcolor where { pop /RealSetcmykcolor /setcmykcolor load def } { /RealSetcmykcolor { 4 1 roll 3 { 3 index add 0 max 1 min 1 exch sub 3 1 roll} repeat RealSetrgbcolor pop } bind def } ifelse userdict /setcmykcolor { % c m y k FrameDict begin FrameSepIs FMnone eq { RealSetcmykcolor } { 4 copy [ 5 1 roll ] FrameColorInSepListCMYK { FrameSepBlack eq exch FrameSepYellow eq and exch FrameSepMagenta eq and exch FrameSepCyan eq and { 0 } { 1 } ifelse } { FrameSepIs FMblack eq {1.0 exch sub 4 1 roll pop pop pop} { FrameSepIs FMyellow eq {pop 1.0 exch sub 3 1 roll pop pop} { FrameSepIs FMmagenta eq {pop pop 1.0 exch sub exch pop } { FrameSepIs FMcyan eq {pop pop pop 1.0 exch sub } {pop pop pop pop 1} ifelse } ifelse } ifelse } ifelse } ifelse RealSetgray } ifelse end } bind put % Set up a prototype pattern for PostScript Level 2 fMLevel1 { % set up screen functions for the patterns in PS level 1 % each entry contains an angle, spot function, flipped spot function, % gray level and frequency multiplier. /patScreenDict 7 dict dup begin <0f1e3c78f0e1c387> [ 45 { pop } {exch pop} .5 2 sqrt] FmBD <0f87c3e1f0783c1e> [ 135 { pop } {exch pop} .5 2 sqrt] FmBD [ 0 { pop } dup .5 2 ] FmBD [ 90 { pop } dup .5 2 ] FmBD <8142241818244281> [ 45 { 2 copy lt {exch} if pop} dup .75 2 sqrt] FmBD <03060c183060c081> [ 45 { pop } {exch pop} .875 2 sqrt] FmBD <8040201008040201> [ 135 { pop } {exch pop} .875 2 sqrt] FmBD end def } { % prototype level 2 pattern dictionary % define some PostScript procedures for known jaggy patterns. /patProcDict 5 dict dup begin <0f1e3c78f0e1c387> { 3 setlinewidth -1 -1 moveto 9 9 lineto stroke 4 -4 moveto 12 4 lineto stroke -4 4 moveto 4 12 lineto stroke} bind def <0f87c3e1f0783c1e> { 3 setlinewidth -1 9 moveto 9 -1 lineto stroke -4 4 moveto 4 -4 lineto stroke 4 12 moveto 12 4 lineto stroke} bind def <8142241818244281> { 1 setlinewidth -1 9 moveto 9 -1 lineto stroke -1 -1 moveto 9 9 lineto stroke } bind def <03060c183060c081> { 1 setlinewidth -1 -1 moveto 9 9 lineto stroke 4 -4 moveto 12 4 lineto stroke -4 4 moveto 4 12 lineto stroke} bind def <8040201008040201> { 1 setlinewidth -1 9 moveto 9 -1 lineto stroke -4 4 moveto 4 -4 lineto stroke 4 12 moveto 12 4 lineto stroke} bind def end def /patDict 15 dict dup begin /PatternType 1 def % Always 1 for PS Level 2 /PaintType 2 def % Uncolored pattern /TilingType 3 def % constant spacing and faster tiling /BBox [ 0 0 8 8 ] def % bounding box /XStep 8 def % X offset /YStep 8 def % Y offset /PaintProc { begin patProcDict bstring known { patProcDict bstring get exec } { 8 8 true [1 0 0 -1 0 8] bstring imagemask } ifelse end } bind def end def } ifelse %combineColor puts together the current gray value (which could also be %a fraction of on bits for a fill pattern and the current color and calls %the appropriate function % /combineColor { FrameSepIs FMnone eq { graymode fMLevel1 or not { % Level 2 pattern [/Pattern [/DeviceCMYK]] setcolorspace FrameCurColors 0 4 getinterval aload pop FrameCurPat setcolor } { FrameCurColors 3 get 1.0 ge { FrameCurGray RealSetgray } { fMAcrobat not FMPColor graymode and and { 0 1 3 { FrameCurColors exch get 1 FrameCurGray sub mul } for RealSetcmykcolor } { 4 1 6 { FrameCurColors exch get graymode { 1 exch sub 1 FrameCurGray sub mul 1 exch sub } { 1.0 lt {FrameCurGray} {1} ifelse } ifelse } for RealSetrgbcolor } ifelse } ifelse } ifelse } { % separation case FrameCurColors 0 4 getinterval aload FrameColorInSepListCMYK { FrameSepBlack eq exch FrameSepYellow eq and exch FrameSepMagenta eq and exch FrameSepCyan eq and FrameSepIs FMcustom eq and { FrameCurGray } { 1 } ifelse } { FrameSepIs FMblack eq {FrameCurGray 1.0 exch sub mul 1.0 exch sub 4 1 roll pop pop pop} { FrameSepIs FMyellow eq {pop FrameCurGray 1.0 exch sub mul 1.0 exch sub 3 1 roll pop pop} { FrameSepIs FMmagenta eq {pop pop FrameCurGray 1.0 exch sub mul 1.0 exch sub exch pop } { FrameSepIs FMcyan eq {pop pop pop FrameCurGray 1.0 exch sub mul 1.0 exch sub } {pop pop pop pop 1} ifelse } ifelse } ifelse } ifelse } ifelse graymode fMLevel1 or not { % Level 2 pattern [/Pattern [/DeviceGray]] setcolorspace FrameCurPat setcolor } { graymode not fMLevel1 and { % Level 1 patterns are either all there or not there at all dup 1 lt {pop FrameCurGray} if } if RealSetgray } ifelse } ifelse } bind def /savematrix { orgmatrix currentmatrix pop } bind def /restorematrix { orgmatrix setmatrix } bind def /fMDefaultMatrix matrix defaultmatrix def /fMatrix2 matrix def /dpi 72 0 fMDefaultMatrix dtransform dup mul exch dup mul add sqrt def % freq and sangle are used for ps Level 1 pattern building. /freq dpi dup 72 div round dup 0 eq {pop 1} if 8 mul div def /sangle 1 0 fMDefaultMatrix dtransform exch atan def sangle fMatrix2 rotate fMDefaultMatrix fMatrix2 concatmatrix dup 0 get /sflipx exch def 3 get /sflipy exch def % % screen index depending on dpi % - screenIndex smallint /screenIndex { 0 1 dpiranges length 1 sub { dup dpiranges exch get 1 sub dpi le {exit} {pop} ifelse } for } bind def % % These routines get the standard Adobe frequencies, angles, and spot functions % depending on the DPI % % - getCyanScreen freq angle spotfunction /getCyanScreen { FMUseHighFrequencyScreens { CHighAngles CMHighFreqs} {CLowAngles CMLowFreqs} ifelse screenIndex dup 3 1 roll get 3 1 roll get /FMSpotFunction load } bind def % % - getMagentaScreen freq angle spotFunction /getMagentaScreen { FMUseHighFrequencyScreens { MHighAngles CMHighFreqs } {MLowAngles CMLowFreqs} ifelse screenIndex dup 3 1 roll get 3 1 roll get /FMSpotFunction load } bind def % % - getYellowScreen freq angle spotFunction % note that some of these use a "tripple dot" function at 1/3 the frequency /getYellowScreen { FMUseHighFrequencyScreens { YHighTDot YHighFreqs} { YLowTDot YLowFreqs } ifelse screenIndex dup 3 1 roll get 3 1 roll get { 3 div {2 { 1 add 2 div 3 mul dup floor sub 2 mul 1 sub exch} repeat FMSpotFunction } } {/FMSpotFunction load } ifelse 0.0 exch } bind def % % - getBlackScreen freq angle spotFunction /getBlackScreen { FMUseHighFrequencyScreens { KHighFreqs } { KLowFreqs } ifelse screenIndex get 45.0 /FMSpotFunction load } bind def % % - getSpotScreen freq angle spotFunction /getSpotScreen { getBlackScreen } bind def % % - getCompositeScreen freq angle spotFunction /getCompositeScreen { getBlackScreen } bind def % FmSetScreen sets the screen for either PostScript Level 1 or Level 2 and optionally % sets the accuratescreens flag in the latter case % freq angle spotfunction FMSetScreen - /FMSetScreen fMLevel1 { /setscreen load }{ { 8 dict begin /HalftoneType 1 def /SpotFunction exch def /Angle exch def /Frequency exch def /AccurateScreens FMUseAcccurateScreens def currentdict end sethalftone } bind } ifelse def % This sets the default screen as was set at the beginning of the job % - setDefaultScreen - /setDefaultScreen { FMPColor { orgrxfer cvx orggxfer cvx orgbxfer cvx orgxfer cvx setcolortransfer } { orgxfer cvx settransfer } ifelse orgfreq organgle orgproc cvx setscreen } bind def % This sets the current screen depending on FrameSepIs % - setCurrentScreen - /setCurrentScreen { FrameSepIs FMnone eq { FMUseDefaultNoSeparationScreen { setDefaultScreen } { getCompositeScreen FMSetScreen } ifelse } { FrameSepIs FMcustom eq { FMUseDefaultSpotSeparationScreen { setDefaultScreen } { getSpotScreen FMSetScreen } ifelse } { FMUseDefaultProcessSeparationScreen { setDefaultScreen } { FrameSepIs FMcyan eq { getCyanScreen FMSetScreen } { FrameSepIs FMmagenta eq { getMagentaScreen FMSetScreen } { FrameSepIs FMyellow eq { getYellowScreen FMSetScreen } { getBlackScreen FMSetScreen } ifelse } ifelse } ifelse } ifelse } ifelse } ifelse } bind def end % End of Color separation code % /FMDOCUMENT { % xscale yscale edown negative paperwidth paperheight manfeed numcopies numfonts array /FMfonts exch def % Why isn't this in FrameDict??? /#copies exch def FrameDict begin 0 ne /manualfeed exch def /paperheight exch def /paperwidth exch def 0 ne /fMNegative exch def % invert page 0 ne /edown exch def % flip page along y axis /yscale exch def /xscale exch def fMLevel1 { manualfeed {setmanualfeed} if /FMdicttop countdictstack 1 add def % some PS's leave junk on dict ... /FMoptop count def % ...or on operand stack... setpapername % This stuff may alter the transfer/screen/angle manualfeed {true} {papersize} ifelse % true->more work to do {manualpapersize} {false} ifelse % true->more work to do {desperatepapersize} {false} ifelse % true->failed completely {papersizefailure} if count -1 FMoptop {pop pop} for countdictstack -1 FMdicttop {pop end} for %...if tray not installed } {2 dict dup /PageSize [paperwidth paperheight] put manualfeed {dup /ManualFeed manualfeed put} if {setpagedevice} stopped {papersizefailure} if } ifelse % fMLevel1 FMPColor { currentcolorscreen cvlit /orgproc exch def /organgle exch def /orgfreq exch def cvlit /orgbproc exch def /orgbangle exch def /orgbfreq exch def cvlit /orggproc exch def /orggangle exch def /orggfreq exch def cvlit /orgrproc exch def /orgrangle exch def /orgrfreq exch def currentcolortransfer fMNegative { 1 1 4 { pop { 1 exch sub } fmConcatProcs 4 1 roll } for 4 copy setcolortransfer } if cvlit /orgxfer exch def cvlit /orgbxfer exch def cvlit /orggxfer exch def cvlit /orgrxfer exch def } { currentscreen cvlit /orgproc exch def /organgle exch def /orgfreq exch def currenttransfer fMNegative { { 1 exch sub } fmConcatProcs dup settransfer } if cvlit /orgxfer exch def } ifelse end % FrameDict } def % only used at startup, so no bind /FMBEGINPAGE { % pagewidth pageheight landscape color-arrays count FrameDict begin % for the whole page... /pagesave save def 3.86 setmiterlimit /landscape exch 0 ne def landscape { % check for landscape 90 rotate 0 exch dup /pwid exch def neg translate pop }{ pop /pwid exch def } ifelse edown { [-1 0 0 1 pwid 0] concat } if % paint the whole page in "white". If the page is inverted, then % this will actually paint our black background 0 0 moveto paperwidth 0 lineto paperwidth paperheight lineto 0 paperheight lineto 0 0 lineto 1 setgray fill xscale yscale scale /orgmatrix matrix def gsave % for CLIP } def % only used infrequently, so no bind /FMENDPAGE { grestore % for CLIP pagesave restore end % FrameDict showpage } def % only used infrequently, so no bind /FMFONTDEFINE { % fontindex nonstd_encoding fontname -- FrameDict begin findfont % fontindex nonstd_encoding font ReEncode % fontindex font' 1 index exch % fontindex fontindex font' definefont % fontindex font" FMfonts 3 1 roll % FMfonts fontindex font" put end % FrameDict } def % only used infrequently, so no bind /FMFILLS { FrameDict begin dup array /fillvals exch def dict /patCache exch def end % framedict } def % Only called once, so no bind /FMFILL { FrameDict begin fillvals 3 1 roll put end % FrameDict } def % only used infrequently, so no bind % Set things to a known, quiescent state, for when we switch to another writer /FMNORMALIZEGRAPHICS { newpath 1 setlinewidth 0 setlinecap 0 0 0 sethsbcolor 0 setgray % Not FMsetgray; only called outside of our environment! } bind def /FMBEGINEPSF { % llx lly urx ury fw fh fx fy end % FrameDict /FMEPSF save def % in userdict /showpage {} def % this def is in userdict %- See Adobe's "PostScript Language Reference Manual, 2nd Edition", page 714. %- "...the following operators MUST NOT be used in an EPS file:" (emphasis ours) /banddevice {(banddevice) FMBADEPSF} def /clear {(clear) FMBADEPSF} def /cleardictstack {(cleardictstack) FMBADEPSF} def % FMBADEPSF knows this is the longest! /copypage {(copypage) FMBADEPSF} def /erasepage {(erasepage) FMBADEPSF} def /exitserver {(exitserver) FMBADEPSF} def /framedevice {(framedevice) FMBADEPSF} def /grestoreall {(grestoreall) FMBADEPSF} def /initclip {(initclip) FMBADEPSF} def /initgraphics {(initgraphics) FMBADEPSF} def % /initmatrix {(initmatrix) FMBADEPSF} def % Aldus Freehand 4.0 epsf uses this harmlessly /quit {(quit) FMBADEPSF} def /renderbands {(renderbands) FMBADEPSF} def /setglobal {(setglobal) FMBADEPSF} def /setpagedevice {(setpagedevice) FMBADEPSF} def /setshared {(setshared) FMBADEPSF} def /startjob {(startjob) FMBADEPSF} def /lettertray {(lettertray) FMBADEPSF} def /letter {(letter) FMBADEPSF} def /lettersmall {(lettersmall) FMBADEPSF} def /11x17tray {(11x17tray) FMBADEPSF} def /11x17 {(11x17) FMBADEPSF} def /ledgertray {(ledgertray) FMBADEPSF} def /ledger {(ledger) FMBADEPSF} def /legaltray {(legaltray) FMBADEPSF} def /legal {(legal) FMBADEPSF} def /statementtray {(statementtray) FMBADEPSF} def /statement {(statement) FMBADEPSF} def /executivetray {(executivetray) FMBADEPSF} def /executive {(executive) FMBADEPSF} def /a3tray {(a3tray) FMBADEPSF} def /a3 {(a3) FMBADEPSF} def /a4tray {(a4tray) FMBADEPSF} def /a4 {(a4) FMBADEPSF} def /a4small {(a4small) FMBADEPSF} def /b4tray {(b4tray) FMBADEPSF} def /b4 {(b4) FMBADEPSF} def /b5tray {(b5tray) FMBADEPSF} def /b5 {(b5) FMBADEPSF} def FMNORMALIZEGRAPHICS % in case we're in a strange state [/fy /fx /fh /fw /ury /urx /lly /llx] {exch def} forall % neat trick fx fw 2 div add fy fh 2 div add translate rotate fw 2 div neg fh 2 div neg translate fw urx llx sub div fh ury lly sub div scale % then scale llx neg lly neg translate % then compensate for LL offset /FMdicttop countdictstack 1 add def % high-water mark of dict stack /FMoptop count def % tricky! "/FMoptop" on stack } bind def /FMENDEPSF { count -1 FMoptop {pop pop} for % clear EPS junk from operand stack countdictstack -1 FMdicttop {pop end} for % ditto for dict stack FMEPSF restore FrameDict begin % for the whole page... } bind def FrameDict begin % put most defs here /setmanualfeed { %%BeginFeature *ManualFeed True statusdict /manualfeed true put %%EndFeature } bind def /max {2 copy lt {exch} if pop} bind def /min {2 copy gt {exch} if pop} bind def /inch {72 mul} def /pagedimen { % name width height paperheight sub abs 16 lt exch % 16pt is an arbitrary slop amount paperwidth sub abs 16 lt and {/papername exch def} {pop} ifelse } bind def /setpapername { % Already set up: paperwidth paperheight and manualfeed /papersizedict 14 dict def % one for /papername, one for /unknown papersizedict begin /papername /unknown def % in case no match /Letter 8.5 inch 11.0 inch pagedimen /LetterSmall 7.68 inch 10.16 inch pagedimen /Tabloid 11.0 inch 17.0 inch pagedimen /Ledger 17.0 inch 11.0 inch pagedimen /Legal 8.5 inch 14.0 inch pagedimen /Statement 5.5 inch 8.5 inch pagedimen /Executive 7.5 inch 10.0 inch pagedimen /A3 11.69 inch 16.5 inch pagedimen /A4 8.26 inch 11.69 inch pagedimen /A4Small 7.47 inch 10.85 inch pagedimen /B4 10.125 inch 14.33 inch pagedimen /B5 7.16 inch 10.125 inch pagedimen end } bind def /papersize { papersizedict begin /Letter {lettertray letter} def /LetterSmall {lettertray lettersmall} def /Tabloid {11x17tray 11x17} def /Ledger {ledgertray ledger} def /Legal {legaltray legal} def /Statement {statementtray statement} def /Executive {executivetray executive} def /A3 {a3tray a3} def /A4 {a4tray a4} def /A4Small {a4tray a4small} def /B4 {b4tray b4} def /B5 {b5tray b5} def /unknown {unknown} def papersizedict dup papername known {papername} {/unknown} ifelse get end statusdict begin stopped end % return true if more work to do } bind def /manualpapersize { papersizedict begin /Letter {letter} def /LetterSmall {lettersmall} def /Tabloid {11x17} def /Ledger {ledger} def /Legal {legal} def /Statement {statement} def /Executive {executive} def /A3 {a3} def /A4 {a4} def /A4Small {a4small} def /B4 {b4} def /B5 {b5} def /unknown {unknown} def papersizedict dup papername known {papername} {/unknown} ifelse get end stopped % return true if more work to do } bind def /desperatepapersize { statusdict /setpageparams known { paperwidth paperheight 0 1 statusdict begin {setpageparams} stopped % return true iff failed end } {true} ifelse % return true iff failed } bind def /papersizefailure { FMAllowPaperSizeMismatch not { (The requested paper size is not available in any currently-installed tray) (Edit the PS file to "FMAllowPaperSizeMismatch true" to use default tray) FMFAILURE } if } def % % Font re-encoding to include diacritics % /DiacriticEncoding [ /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /space /exclam /quotedbl /numbersign /dollar /percent /ampersand /quotesingle /parenleft /parenright /asterisk /plus /comma /hyphen /period /slash /zero /one /two /three /four /five /six /seven /eight /nine /colon /semicolon /less /equal /greater /question /at /A /B /C /D /E /F /G /H /I /J /K /L /M /N /O /P /Q /R /S /T /U /V /W /X /Y /Z /bracketleft /backslash /bracketright /asciicircum /underscore /grave /a /b /c /d /e /f /g /h /i /j /k /l /m /n /o /p /q /r /s /t /u /v /w /x /y /z /braceleft /bar /braceright /asciitilde /.notdef /Adieresis /Aring /Ccedilla /Eacute /Ntilde /Odieresis /Udieresis /aacute /agrave /acircumflex /adieresis /atilde /aring /ccedilla /eacute /egrave /ecircumflex /edieresis /iacute /igrave /icircumflex /idieresis /ntilde /oacute /ograve /ocircumflex /odieresis /otilde /uacute /ugrave /ucircumflex /udieresis /dagger /.notdef /cent /sterling /section /bullet /paragraph /germandbls /registered /copyright /trademark /acute /dieresis /.notdef /AE /Oslash /.notdef /.notdef /.notdef /.notdef /yen /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /ordfeminine /ordmasculine /.notdef /ae /oslash /questiondown /exclamdown /logicalnot /.notdef /florin /.notdef /.notdef /guillemotleft /guillemotright /ellipsis /.notdef /Agrave /Atilde /Otilde /OE /oe /endash /emdash /quotedblleft /quotedblright /quoteleft /quoteright /.notdef /.notdef /ydieresis /Ydieresis /fraction /currency /guilsinglleft /guilsinglright /fi /fl /daggerdbl /periodcentered /quotesinglbase /quotedblbase /perthousand /Acircumflex /Ecircumflex /Aacute /Edieresis /Egrave /Iacute /Icircumflex /Idieresis /Igrave /Oacute /Ocircumflex /.notdef /Ograve /Uacute /Ucircumflex /Ugrave /dotlessi /circumflex /tilde /macron /breve /dotaccent /ring /cedilla /hungarumlaut /ogonek /caron ] def /ReEncode { % nonstd_encoding font -- reencodedfont dup % nonstd_encoding font font length % nonstd_encoding font dictlength dict begin % nonstd_encoding font % currentdict = newdict {% forall % forall is over font to be copied 1 index /FID ne % skip FID {def} % defs go into newfontdict which is currentdict {pop pop} ifelse % copy all keys including /Encoding } forall % nonstd_encoding 0 eq {/Encoding DiacriticEncoding def} if % -- currentdict % push a copy of the copied font dict onto operand stack end % font' % before popping it off dictionary stack } bind def FMPColor % setup procs for color printing { /BEGINBITMAPCOLOR { % iw, ih, width, height, theta, x y BITMAPCOLOR} def /BEGINBITMAPCOLORc { % iw, ih, width, height, theta, x y BITMAPCOLORc} def /BEGINBITMAPTRUECOLOR { BITMAPTRUECOLOR } def /BEGINBITMAPTRUECOLORc { BITMAPTRUECOLORc } def /BEGINBITMAPCMYK { BITMAPCMYK } def /BEGINBITMAPCMYKc { BITMAPCMYKc } def } % setup procs for B&W printing { /BEGINBITMAPCOLOR { % iw, ih, width, height, theta, x y BITMAPGRAY} def /BEGINBITMAPCOLORc { % iw, ih, width, height, theta, x y BITMAPGRAYc} def /BEGINBITMAPTRUECOLOR { BITMAPTRUEGRAY } def /BEGINBITMAPTRUECOLORc { BITMAPTRUEGRAYc } def /BEGINBITMAPCMYK { BITMAPCMYKGRAY } def /BEGINBITMAPCMYKc { BITMAPCMYKGRAYc } def } ifelse /K { % c m y k r g b SEPARATION FMPrintAllColorsAsBlack { dup 1 eq 2 index 1 eq and 3 index 1 eq and not {7 {pop} repeat 0 0 0 1 0 0 0} if } if FrameCurColors astore pop combineColor } bind def % % graymode is true if we are just doing gray fills, this way do not keep calling % setscreen. I don't know what the cost is on calling setscreen with defaults, but % this is easy to keep track of, and we know for sure we aren't wasting cycles. % if graymode is false and fMLevel1 is false, then we are using Level 2 patterns. % /graymode true def % used by level 1 patterns % defaultflip matrixentry fmGetFlit -> eith -1 or 1 fMLevel1 { /fmGetFlip { fMatrix2 exch get mul 0 lt { -1 } { 1 } ifelse } FmBD } if /setPatternMode { fMLevel1 { 2 index patScreenDict exch known { pop pop patScreenDict exch get aload pop % angle spot fspot gray mult freq % freq mul % times multiplier 5 2 roll % angle spot fspot gray mult freq -> gray freq angle spot fspot fMatrix2 currentmatrix 1 get 0 ne { 3 -1 roll 90 add 3 1 roll % landscape sflipx 1 fmGetFlip sflipy 2 fmGetFlip neg mul } { % portrait sflipx 0 fmGetFlip sflipy 3 fmGetFlip mul } ifelse 0 lt {exch pop} {pop} ifelse % take regular or flipped spot function fMNegative { {neg} fmConcatProcs % invert spot function } if bind % we need to bypass any screen filter and go directly to systemdict % to avoid problems with Kodak Precision calibration software % systemdict /setscreen get exec % leave graylevel on stack /FrameCurGray exch def } { /bwidth exch def /bpside exch def /bstring exch def /onbits 0 def /offbits 0 def freq sangle landscape {90 add} if {/ypoint exch def /xpoint exch def /xindex xpoint 1 add 2 div bpside mul cvi def /yindex ypoint 1 add 2 div bpside mul cvi def bstring yindex bwidth mul xindex 8 idiv add get 1 7 xindex 8 mod sub bitshift and 0 ne fMNegative {not} if {/onbits onbits 1 add def 1} {/offbits offbits 1 add def 0} ifelse } setscreen offbits offbits onbits add div fMNegative {1.0 exch sub} if /FrameCurGray exch def } ifelse } { % Level 2 version pop pop dup patCache exch known { patCache exch get } { % not in cache dup patDict /bstring 3 -1 roll put patDict 9 PatFreq screenIndex get div dup matrix scale % 9 orgfreq % organgle sin abs organgle cos abs add div % dup 16 div round dup 0 le {pop 1} if % Unix pattern size % dup 9 div round dup 0 le {pop 1} if % Mac larger (WYSIWYG) size % div div dup matrix scale % This gives Unix pattern size. makepattern dup patCache 4 -1 roll 3 -1 roll put } ifelse /FrameCurGray 0 def /FrameCurPat exch def } ifelse /graymode false def combineColor } bind def /setGrayScaleMode { graymode not { /graymode true def fMLevel1 { setCurrentScreen } if } if /FrameCurGray exch def combineColor } bind def /normalize { transform round exch round exch itransform } bind def /dnormalize { dtransform round exch round exch idtransform } bind def /lnormalize { % line widths are always odd so that arrow heads work 0 dtransform exch cvi 2 idiv 2 mul 1 add exch idtransform pop } bind def /H { % THICK lnormalize setlinewidth } bind def /Z { setlinecap } bind def % This is used to fill or stroke white behind a Level 2 pattern /PFill { graymode fMLevel1 or not { gsave 1 setgray eofill grestore } if } bind def /PStroke { graymode fMLevel1 or not { gsave 1 setgray stroke grestore } if stroke } bind def /X { % TEXTURE fillvals exch get dup type /stringtype eq {8 1 setPatternMode} % Silly to pass parameters here {setGrayScaleMode} ifelse } bind def /V { % FILL PFill gsave eofill grestore } bind def /Vclip { clip } bind def /Vstrk { currentlinewidth exch setlinewidth PStroke setlinewidth } bind def /N { % PEN PStroke } bind def /Nclip { strokepath clip newpath } bind def /Nstrk { currentlinewidth exch setlinewidth PStroke setlinewidth } bind def /M {newpath moveto} bind def /E {lineto} bind def /D {curveto} bind def /O {closepath} bind def /L { % POLYLINE /n exch def newpath normalize moveto 2 1 n {pop normalize lineto} for } bind def /Y { % POLYGON !!! L % POLYLINE closepath } bind def /R { % RECT x1 y1 x2 y2 /y2 exch def /x2 exch def /y1 exch def /x1 exch def x1 y1 x2 y1 x2 y2 x1 y2 4 Y % POLYGON } bind def /rarc % Leaves all sorts of junk on the operand stack for caller to clear off {rad % arcto might fail if we're scaled way down arcto } bind def /RR { % ROUNDRECT x1 y1 x2 y2 r /rad exch def normalize /y2 exch def /x2 exch def normalize /y1 exch def /x1 exch def mark newpath { x1 y1 rad add moveto x1 y2 x2 y2 rarc x2 y2 x2 y1 rarc x2 y1 x1 y1 rarc x1 y1 x1 y2 rarc closepath } stopped {x1 y1 x2 y2 R} if % in case rarc failed for degenerate arcs cleartomark } bind def /RRR { % ROUNDRECT ROTATED xs ys x1 y1 x2 y2 x3 y3 x4 y4 r /rad exch def normalize /y4 exch def /x4 exch def normalize /y3 exch def /x3 exch def normalize /y2 exch def /x2 exch def normalize /y1 exch def /x1 exch def newpath normalize moveto % eats xs ys mark { x2 y2 x3 y3 rarc x3 y3 x4 y4 rarc x4 y4 x1 y1 rarc x1 y1 x2 y2 rarc closepath } stopped {x1 y1 x2 y2 x3 y3 x4 y4 newpath moveto lineto lineto lineto closepath} if cleartomark } bind def /C { % CLIP grestore gsave R % RECT clip setCurrentScreen } bind def /CP { % CLIPPOLY p1x p1y p2x p2y ... n grestore gsave Y % POLYGON clip setCurrentScreen } bind def /F { % FONT FMfonts exch get FMpointsize scalefont setfont } bind def /Q { % POINTSIZE (& font) /FMpointsize exch def F % could be slightly optimized here } bind def /T { % TEXT moveto show } bind def % Callers of RF (rotate/flip) must gsave (or save) first; (g)restore when done /RF { % rotate 0 ne {-1 1 scale} if } bind def /TF { % TEXTFLIPROTATE gsave moveto RF show grestore } bind def /P { % PADTEXT moveto 0 32 3 2 roll widthshow } bind def /PF { % PADTEXTFLIPROTATE gsave moveto RF 0 32 3 2 roll widthshow grestore } bind def /S { % SPREADTEXT moveto 0 exch ashow } bind def /SF { % SPREADTEXTFLIPROTATE gsave moveto RF 0 exch ashow grestore } bind def /B { % PADSPREADTEXT moveto 0 32 4 2 roll 0 exch awidthshow } bind def /BF { % PADSPREADTEXTFLIPROTATE gsave moveto RF 0 32 4 2 roll 0 exch awidthshow grestore } bind def /G { % ARCFILL theta1 theta2 width height x y gsave newpath normalize translate 0.0 0.0 moveto % eats x y dnormalize scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 closepath PFill fill grestore } bind def /Gstrk { savematrix newpath 2 index 2 div add exch 3 index 2 div sub exch % theta1 theta2 width height x y normalize 2 index 2 div sub exch 3 index 2 div add exch % theta1 theta2 width height x y translate scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 restorematrix currentlinewidth exch setlinewidth PStroke setlinewidth } bind def /Gclip { % ARCFILL theta1 theta2 width height x y swid newpath savematrix normalize translate 0.0 0.0 moveto % eats x y dnormalize scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 closepath clip newpath restorematrix } bind def /GG { % ARCFILL ROTATED theta1 theta2 width height angle x y gsave newpath normalize translate 0.0 0.0 moveto % eats x y rotate % eats angle dnormalize scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 closepath PFill fill grestore } bind def /GGclip { % ARCFILL ROTATED theta1 theta2 width height angle x y savematrix newpath normalize translate 0.0 0.0 moveto % eats x y rotate % eats angle dnormalize scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 closepath clip newpath restorematrix } bind def /GGstrk { % ARCFILL ROTATED swid theta1 theta2 width height angle x y savematrix newpath normalize translate 0.0 0.0 moveto % eats x y rotate % eats angle dnormalize scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 closepath restorematrix currentlinewidth exch setlinewidth PStroke setlinewidth } bind def /A { % ARCPEN theta1 theta2 width height x y gsave savematrix newpath 2 index 2 div add exch 3 index 2 div sub exch % theta1 theta2 width height x y normalize 2 index 2 div sub exch 3 index 2 div add exch % theta1 theta2 width height x y translate scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 restorematrix PStroke grestore } bind def /Aclip { newpath savematrix normalize translate 0.0 0.0 moveto % eats x y dnormalize scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 closepath strokepath clip newpath restorematrix } bind def /Astrk { Gstrk } bind def /AA { % ARCPEN ROTATED theta1 theta2 width height angle x y gsave savematrix newpath % theta1 theta2 width height angle x y 3 index 2 div add exch 4 index 2 div sub exch % theta1 theta2 width height angle x y normalize 3 index 2 div sub exch 4 index 2 div add exch translate % eats x y rotate % eats angle scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 restorematrix PStroke grestore } bind def /AAclip { savematrix newpath normalize translate 0.0 0.0 moveto % eats x y rotate % eats angle dnormalize scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 closepath strokepath clip newpath restorematrix } bind def /AAstrk { GGstrk } bind def /BEGINPRINTCODE { % -x -y width height /FMdicttop countdictstack 1 add def % high-water mark of dict stack /FMoptop count 7 sub def % tricky! 7 params on stack, plus "/FMoptop" /FMsaveobject save def userdict begin % insulate user from FrameDict; not in /FMdicttop count /showpage {} def % this def is in userdict FMNORMALIZEGRAPHICS % in case we're in a strange state 3 index neg 3 index neg translate } bind def /ENDPRINTCODE { count -1 FMoptop {pop pop} for % clear user junk from operand stack countdictstack -1 FMdicttop {pop end} for % ditto for dict stack FMsaveobject restore % this is now safe, unless user very malicious } bind def /gn { % get a number in a funny encoding scheme 0 % result on stack { 46 mul % shift old digits cf read pop % get next character 32 sub % zero is the space character dup 46 lt {exit} if % quit if we're the last digit 46 sub add % add in this digit and loop around for next } loop add % result on stack } bind def /cfs { % create a string of length "sl" filled with "val"s /str sl string def % create string as "str" 0 1 sl 1 sub {str exch val put} for % fill array str def % define real array name, too; name is on stack from caller } bind def /ic [ % "case" stmt list of procedures that the image commands should call 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0223 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0223 0 {0 hx} {1 hx} {2 hx} {3 hx} {4 hx} {5 hx} {6 hx} {7 hx} {8 hx} {9 hx} {10 hx} {11 hx} {12 hx} {13 hx} {14 hx} {15 hx} {16 hx} {17 hx} {18 hx} {19 hx} {gn hx} {0} {1} {2} {3} {4} {5} {6} {7} {8} {9} {10} {11} {12} {13} {14} {15} {16} {17} {18} {19} {gn} {0 wh} {1 wh} {2 wh} {3 wh} {4 wh} {5 wh} {6 wh} {7 wh} {8 wh} {9 wh} {10 wh} {11 wh} {12 wh} {13 wh} {14 wh} {gn wh} {0 bl} {1 bl} {2 bl} {3 bl} {4 bl} {5 bl} {6 bl} {7 bl} {8 bl} {9 bl} {10 bl} {11 bl} {12 bl} {13 bl} {14 bl} {gn bl} {0 fl} {1 fl} {2 fl} {3 fl} {4 fl} {5 fl} {6 fl} {7 fl} {8 fl} {9 fl} {10 fl} {11 fl} {12 fl} {13 fl} {14 fl} {gn fl} ] def /ms { % make all the strings /sl exch def % remember length of currently existing strings /val 255 def % that's white /ws cfs % make "ws" a string filled with white /im cfs % and "im" is a complete image scanline /val 0 def % that's black /bs cfs % make "bs" a string filled with black /cs cfs % here's where we'll put complete command lines } bind def 400 ms % make strings that will be plenty long for most applications /ip { % image procedure; reads and executes commands to make scanlines is % leave image string and... 0 % ...image position on stack all through this procedure cf cs readline pop % get a string of commands { ic exch get exec % execute next command add % all commands leave a length on the stack; update pos } forall % step through all commands pop % get rid of image position pointer % image string left on stack, so it's returned to image primitive } bind def /rip { % this is similar to ip above, except for 24 bit images % this takes an extra argument, the width of the image % do red bis ris copy pop % copy blue to red is 0 cf cs readline pop { ic exch get exec add } forall pop pop % remove is and position from stack ris gis copy pop % copy red to green dup is exch % position of green is width bytes into is % do green cf cs readline pop { ic exch get exec add } forall pop pop gis bis copy pop % copy green to blue dup add is exch % position of blue is 2*width bytes into is % do blue cf cs readline pop { ic exch get exec add } forall pop } bind def /rip4 { % this is similar to ip above, except for 32 bit images % this takes an extra argument, the width of the image % do cyan kis cis copy pop % copy black to cyan is 0 cf cs readline pop { ic exch get exec add } forall pop pop % remove is and position from stack cis mis copy pop % copy cyan to magenta dup is exch % position of magenta is width bytes into is % do magenta cf cs readline pop { ic exch get exec add } forall pop pop mis yis copy pop % copy magenta to yellow dup dup add is exch % position of yellow is 2*width bytes into is % do yellow cf cs readline pop { ic exch get exec add } forall pop pop yis kis copy pop % copy yellow to black 3 mul is exch % position of black is 3*width bytes into is % do black cf cs readline pop { ic exch get exec add } forall pop } bind def /wh { % fill a number of bytes with "white" /len exch def % number of bytes to fill /pos exch def % position to put them at ws 0 len getinterval im pos len getinterval copy pop pos len % remember where we got to } bind def /bl { % fill a number of bytes with "black" /len exch def % number of bytes to fill /pos exch def % position to put them at bs 0 len getinterval im pos len getinterval copy pop pos len % remember where we got to } bind def /s1 1 string def /fl { % fill a number of bytes with a specific hex value /len exch def % number of bytes to fill /pos exch def % position to put them at /val cf s1 readhexstring pop 0 get def pos 1 pos len add 1 sub {im exch val put} for pos len % remember where we got to } bind def /hx { % read hex bytes directly; on entry, stack has 3 copy getinterval % stack has cf exch readhexstring pop pop % stack back to } bind def /wbytes { % width depth -> wb find width in bytes given 1, 2, 8 or 24 or 32 dup dup 8 gt { pop 8 idiv mul } { 8 eq {pop} {1 eq {7 add 8 idiv} {3 add 4 idiv} ifelse} ifelse } ifelse } bind def /BEGINBITMAPBWc { % iw, ih, width, height, theta, x y 1 {} COMMONBITMAPc } bind def /BEGINBITMAPGRAYc { % iw, ih, width, height, theta, x y 8 {} COMMONBITMAPc } bind def /BEGINBITMAP2BITc { % iw, ih, width, height, theta, x y 2 {} COMMONBITMAPc } bind def % % Common routine for imaging compressed images % /COMMONBITMAPc { % iw, ih, width, height, theta, x y depth proc % (x,y) is the lower left corner of the image /cvtProc exch def /depth exch def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /lb width depth wbytes def % so "lb" has width in bytes sl lb lt {lb ms} if % maybe make bigger strings /bitmapsave save def % LW+ has a buggy memory leak! cvtProc % run the desired proc after save has occurred /is im 0 lb getinterval def % image substring ws 0 lb getinterval is copy pop % whiten it /cf currentfile def % evaluate "currentfile" only once width height depth [width 0 0 height neg 0 height] % top to bottom {ip} image % zap! bitmapsave restore % avoid occasional disaster on the LW+ grestore } bind def /BEGINBITMAPBW { % iw, ih, width, height, theta, x y 1 {} COMMONBITMAP } bind def /BEGINBITMAPGRAY { % iw, ih, width, height, theta, x y 8 {} COMMONBITMAP } bind def /BEGINBITMAP2BIT { % iw, ih, width, height, theta, x y 2 {} COMMONBITMAP } bind def % % Common routine for uncompressed images % /COMMONBITMAP { % iw, ih, width, height, theta, x y depth proc /cvtProc exch def /depth exch def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /bitmapsave save def % LW+ has a buggy memory leak! cvtProc % run the desired proc after save has occurred /is width depth wbytes string def /cf currentfile def % evaluate "currentfile" only once width height depth [width 0 0 height neg 0 height] % top to bottom {cf is readhexstring pop} image bitmapsave restore % avoid occasional disaster on the LW+ grestore } bind def % % All this hairy color setup stuff gus wrote on the mac, I just copied and % changed the variable names to be humanly readable. /ngrayt 256 array def /nredt 256 array def /nbluet 256 array def /ngreent 256 array def fMLevel1 { /colorsetup { currentcolortransfer /gryt exch def /blut exch def /grnt exch def /redt exch def 0 1 255 { /indx exch def /cynu 1 red indx get 255 div sub def /magu 1 green indx get 255 div sub def /yelu 1 blue indx get 255 div sub def /kk cynu magu min yelu min def % The HP PaintJet XL300 ignores the gray transfer curve but still sets its % default black generation and undercolor removal functions as if it is % used. This causes black colors not to work. Bug#56844 % - We go back to the old (correct?) way of doing this since this code % is now bypassed for PS Level 2 printers in favor of colorSetup2 which % uses PS Level 2 indexed color, which is much cleaner. /u kk currentundercolorremoval exec def %- /u 0 def nredt indx 1 0 cynu u sub max sub redt exec put ngreent indx 1 0 magu u sub max sub grnt exec put nbluet indx 1 0 yelu u sub max sub blut exec put ngrayt indx 1 kk currentblackgeneration exec sub gryt exec put } for {255 mul cvi nredt exch get} {255 mul cvi ngreent exch get} {255 mul cvi nbluet exch get} {255 mul cvi ngrayt exch get} setcolortransfer {pop 0} setundercolorremoval {} setblackgeneration } bind def } { % Here, we set up indexed color for imaging on PS Level 2 without mucking around % with the transfer functions. /colorSetup2 { [ /Indexed /DeviceRGB 255 {dup red exch get 255 div exch dup green exch get 255 div exch blue exch get 255 div} ] setcolorspace } bind def } ifelse % % Setup a transfer function to convert psuedo color values into grayscale % values based on the color lookup tables. % /fakecolorsetup { /tran 256 string def 0 1 255 {/indx exch def tran indx red indx get 77 mul green indx get 151 mul blue indx get 28 mul add add 256 idiv put} for currenttransfer {255 mul cvi tran exch get 255.0 div} exch fmConcatProcs settransfer } bind def % % image a color image % /BITMAPCOLOR { % iw, ih, width, height, theta, x y /depth 8 def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /bitmapsave save def fMLevel1 { colorsetup /is width depth wbytes string def /cf currentfile def % evaluate "currentfile" only once width height depth [width 0 0 height neg 0 height] % top to bottom {cf is readhexstring pop} {is} {is} true 3 colorimage } { colorSetup2 /is width depth wbytes string def /cf currentfile def % evaluate "currentfile" only once 7 dict dup begin /ImageType 1 def /Width width def /Height height def /ImageMatrix [width 0 0 height neg 0 height] def /DataSource {cf is readhexstring pop} bind def /BitsPerComponent depth def /Decode [0 255] def end image } ifelse bitmapsave restore grestore } bind def % % Compressed color image rendering % /BITMAPCOLORc { % iw, ih, width, height, theta, x y /depth 8 def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /lb width depth wbytes def % so "lb" has width in bytes sl lb lt {lb ms} if % maybe make bigger strings /bitmapsave save def fMLevel1 { colorsetup /is im 0 lb getinterval def % image substring ws 0 lb getinterval is copy pop % whiten it /cf currentfile def % evaluate "currentfile" only once width height depth [width 0 0 height neg 0 height] % top to bottom {ip} {is} {is} true 3 colorimage } { colorSetup2 /is im 0 lb getinterval def % image substring ws 0 lb getinterval is copy pop % whiten it /cf currentfile def % evaluate "currentfile" only once 7 dict dup begin /ImageType 1 def /Width width def /Height height def /ImageMatrix [width 0 0 height neg 0 height] def /DataSource {ip} bind def /BitsPerComponent depth def /Decode [0 255] def end image } ifelse bitmapsave restore grestore } bind def /BITMAPTRUECOLORc { /depth 24 def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /lb width depth wbytes def % so "lb" has width in bytes sl lb lt {lb ms} if % maybe make bigger strings /bitmapsave save def /is im 0 lb getinterval def % Whole scanline /ris im 0 width getinterval def % red part of im /gis im width width getinterval def % green part of im /bis im width 2 mul width getinterval def % blue part of im ws 0 lb getinterval is copy pop /cf currentfile def width height 8 [width 0 0 height neg 0 height] {width rip pop ris} {gis} {bis} true 3 colorimage bitmapsave restore grestore } bind def /BITMAPCMYKc { /depth 32 def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /lb width depth wbytes def % so "lb" has width in bytes sl lb lt {lb ms} if % maybe make bigger strings /bitmapsave save def /is im 0 lb getinterval def % Whole scanline /cis im 0 width getinterval def % cyan part of im /mis im width width getinterval def % magenta part of im /yis im width 2 mul width getinterval def % yellow part of im /kis im width 3 mul width getinterval def % black part of im ws 0 lb getinterval is copy pop /cf currentfile def width height 8 [width 0 0 height neg 0 height] {width rip4 pop cis} {mis} {yis} {kis} true 4 colorimage bitmapsave restore grestore } bind def /BITMAPTRUECOLOR { gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /bitmapsave save def /is width string def /gis width string def /bis width string def /cf currentfile def width height 8 [width 0 0 height neg 0 height] { cf is readhexstring pop } { cf gis readhexstring pop } { cf bis readhexstring pop } true 3 colorimage bitmapsave restore grestore } bind def /BITMAPCMYK { gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /bitmapsave save def /is width string def /mis width string def /yis width string def /kis width string def /cf currentfile def width height 8 [width 0 0 height neg 0 height] { cf is readhexstring pop } { cf mis readhexstring pop } { cf yis readhexstring pop } { cf kis readhexstring pop } true 4 colorimage bitmapsave restore grestore } bind def % % image a color image to a b&width device % /BITMAPTRUEGRAYc { /depth 24 def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /lb width depth wbytes def % so "lb" has width in bytes sl lb lt {lb ms} if % maybe make bigger strings /bitmapsave save def /is im 0 lb getinterval def % Whole scanline /ris im 0 width getinterval def % red part of im /gis im width width getinterval def % green part of im /bis im width 2 mul width getinterval def % blue part of im ws 0 lb getinterval is copy pop /cf currentfile def width height 8 [width 0 0 height neg 0 height] {width rip pop ris gis bis width gray} image bitmapsave restore grestore } bind def /BITMAPCMYKGRAYc { /depth 32 def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /lb width depth wbytes def % so "lb" has width in bytes sl lb lt {lb ms} if % maybe make bigger strings /bitmapsave save def /is im 0 lb getinterval def % Whole scanline /cis im 0 width getinterval def % cyan part of im /mis im width width getinterval def % magenta part of im /yis im width 2 mul width getinterval def % yellow part of im /kis im width 3 mul width getinterval def % black part of im ws 0 lb getinterval is copy pop /cf currentfile def width height 8 [width 0 0 height neg 0 height] {width rip pop cis mis yis kis width cgray} image bitmapsave restore grestore } bind def /cgray { % c m y k width /ww exch def /k exch def /y exch def /m exch def /c exch def 0 1 ww 1 sub { /i exch def c i get m i get y i get k i get CMYKtoRGB .144 mul 3 1 roll .587 mul 3 1 roll .299 mul add add c i 3 -1 roll floor cvi put } for c } bind def /gray { % r g b width /ww exch def /b exch def /g exch def /r exch def 0 1 ww 1 sub { /i exch def r i get .299 mul g i get .587 mul b i get .114 mul add add r i 3 -1 roll floor cvi put } for r } bind def /BITMAPTRUEGRAY { gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /bitmapsave save def /is width string def /gis width string def /bis width string def /cf currentfile def width height 8 [width 0 0 height neg 0 height] { cf is readhexstring pop cf gis readhexstring pop cf bis readhexstring pop width gray} image bitmapsave restore grestore } bind def /BITMAPCMYKGRAY { gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /bitmapsave save def /is width string def /yis width string def /mis width string def /kis width string def /cf currentfile def width height 8 [width 0 0 height neg 0 height] { cf is readhexstring pop cf mis readhexstring pop cf yis readhexstring pop cf kis readhexstring pop width cgray} image bitmapsave restore grestore } bind def /BITMAPGRAY { % iw, ih, width, height, theta, x y 8 {fakecolorsetup} COMMONBITMAP } bind def /BITMAPGRAYc { % iw, ih, width, height, theta, x y 8 {fakecolorsetup} COMMONBITMAPc } bind def /ENDBITMAP { } bind def end % of FrameDict definitions % OPI stuff /ALDmatrix matrix def ALDmatrix currentmatrix pop /StartALD { /ALDsave save def savematrix ALDmatrix setmatrix } bind def /InALD { restorematrix } bind def /DoneALD { ALDsave restore } bind def % Dashed lines stuff /I { setdash } bind def /J { [] 0 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1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K J 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 10 Q 0 X 0 0 0 1 0 0 0 K (Abstract) 155.22 645.77 T 1 F 3.76 (Three f) 54 630.77 P 3.76 (actors are dri) 86.81 630.77 P 3.76 (ving the demand for rapid FPGA) 146.28 630.77 P 0.92 (compilation. First, as FPGAs ha) 54 619.77 P 0.92 (v) 185.8 619.77 P 0.92 (e gro) 190.65 619.77 P 0.92 (wn in logic capacity) 211.59 619.77 P 0.92 (,) 294.5 619.77 P 1.24 (the compile computation has gro) 54 608.77 P 1.24 (wn more quickly than the) 189.82 608.77 P 2 (compute po) 54 597.77 P 2 (wer of the a) 102.69 597.77 P 2 (v) 155.99 597.77 P 2 (ailable computers. Second, there) 160.74 597.77 P 0.42 (e) 54 586.78 P 0.42 (xists a subset of users who are willing to pay for v) 58.29 586.78 P 0.42 (ery high) 263.53 586.78 P 2.87 (speed compile with a decrease in quality of result, and) 54 575.78 P -0.12 (accordingly being required to use a lar) 54 564.78 P -0.12 (ger FPGA or use more) 206.94 564.78 P 2.08 (real-estate on a gi) 54 553.78 P 2.08 (v) 130.79 553.78 P 2.08 (en FPGA than is otherwise necessary) 135.63 553.78 P 2.08 (.) 294.5 553.78 P 2.03 (Third, v) 54 542.78 P 2.03 (ery high speed compile has been a long-standing) 88.1 542.78 P 4.95 (desire of those using FPGA-based custom computing) 54 531.78 P 0.08 (machines, as the) 54 520.78 P 0.08 (y w) 119.83 520.78 P 0.08 (ant compile times at least closer to those) 134.52 520.78 P (of re) 54 509.77 T (gular computers.) 72.45 509.77 T 2.65 (This paper focuses on the routing phase of the compile) 54 492.77 P 1.68 (process, and in particular on routability-dri) 54 481.77 P 1.68 (v) 233.8 481.77 P 1.68 (en routing \050as) 238.65 481.77 P 2.83 (opposed to timing-dri) 54 470.77 P 2.83 (v) 146.07 470.77 P 2.83 (en routing\051. W) 150.92 470.77 P 2.83 (e present a routing) 214.37 470.77 P 0.52 (algorithm and routing tool that has three unique capabilities) 54 459.77 P (relating to v) 54 448.77 T (ery high-speed compile:) 102.18 448.77 T (1.) 54 431.77 T 0.45 (F) 72 431.77 P 0.45 (or a \322lo) 77.41 431.77 P 0.45 (w stress\323 routing problem \050which we de\336ne as) 108.05 431.77 P 0.89 (the case where the track supply is at least 10% greater) 72 420.77 P -0.2 (than the minimum number of tracks per channel actually) 72 409.77 P 1 (needed to route a circuit\051 the routing time is v) 72 398.77 P 1 (ery f) 263.89 398.77 P 1 (ast.) 283.39 398.77 P 3.27 (F) 72 387.77 P 3.27 (or e) 77.41 387.77 P 3.27 (xample, the routing phase \050after the netlist is) 95.8 387.77 P -0.18 (parsed and the routing graph is constructed\051 for a 20,000) 72 376.77 P 1.53 (LUT/FF pair circuit with 30% e) 72 365.77 P 1.53 (xtra tracks is only 23) 206.99 365.77 P (seconds on a 300 MHz Sparcstation.) 72 354.77 T (2.) 54 337.77 T -0.13 (F) 72 337.77 P -0.13 (or lo) 77.41 337.77 P -0.13 (w-stress routing problems the routing time is near) 95.64 337.77 P -0.13 (-) 293.67 337.77 P -0.02 (linear in the size of the circuit, and the linearity constant) 72 326.77 P 2.93 (is v) 72 315.77 P 2.93 (ery small: 1.1 ms per LUT/FF pair) 88.95 315.77 P 2.93 (, or roughly) 244.2 315.77 P (55,000 LUT/FF pairs per minute.) 72 304.77 T (3.) 54 287.77 T 2.24 (F) 72 287.77 P 2.24 (or more dif) 77.41 287.77 P 2.24 (\336cult routing problems \050where the track) 126.64 287.77 P 1.28 (supply is close to the minimum needed\051 we pro) 72 276.78 P 1.28 (vide a) 271.55 276.78 P 0.9 (method that) 72 265.78 P 2 F 0.9 (quic) 123.8 265.78 P 0.9 (kly) 140.82 265.78 P 1 F 0.9 ( identi\336es and subdi) 152.48 265.78 P 0.9 (vides this class) 235.2 265.78 P -0.16 (into tw) 72 254.78 P -0.16 (o sub-classes: \050i\051 those circuits which are dif) 99.8 254.78 P -0.16 (\336cult) 276.44 254.78 P 1.01 (\050b) 72 243.78 P 1.01 (ut possible\051 to route and will tak) 80.13 243.78 P 1.01 (e signi\336cantly more) 215.54 243.78 P 2.18 (time than lo) 72 232.78 P 2.18 (w-stress problems, and \050ii\051 those circuits) 123.89 232.78 P 0.7 (which are impossible to route. In the \336rst case the user) 72 221.78 P 0 (can choose to continue or reduce the amount of logic; in) 72 210.78 P 0.51 (the second case the user is forced to reduce the amount) 72 199.78 P (of logic or obtain a lar) 72 188.78 T (ger FPGA.) 160.97 188.78 T 0 F (1. Intr) 315 645.77 T (oduction) 344.81 645.77 T 1 F 2.17 (The success of CPLDs and FPGAs is in part due to the) 315 630.77 P 3.3 (instant manuf) 315 619.77 P 3.3 (acturability of a programmable de) 372.92 619.77 P 3.3 (vice. As) 521.93 619.77 P 2.76 (de) 315 608.77 P 2.76 (vice sizes increase, ho) 324.19 608.77 P 2.76 (we) 421.09 608.77 P 2.76 (v) 432.5 608.77 P 2.76 (er) 437.35 608.77 P 2.76 (, increasing compile times) 444.72 608.77 P 1.65 (ha) 315 597.77 P 1.65 (v) 324.24 597.77 P 1.65 (e reduced the impact of instant manuf) 329.09 597.77 P 1.65 (acturing. This is) 489.98 597.77 P 5.3 (particularly true among impatient hardw) 315 586.78 P 5.3 (are designers,) 497.72 586.78 P 1.98 (emulation/rapid prototyping system users who ha) 315 575.78 P 1.98 (v) 522.16 575.78 P 1.98 (e man) 527.02 575.78 P 1.98 (y) 553 575.78 P 4.24 (FPGAs to compile, and users of FPGA-based custom) 315 564.78 P -0.1 (computing machines who w) 315 553.78 P -0.1 (ant compile times closer to those) 427.1 553.78 P (of their competition, a microprocessor) 315 542.78 T (.) 467.48 542.78 T 3.04 (The complete end-to-end compile time of modern lar) 315 525.78 P 3.04 (ge) 548.56 525.78 P 0.79 (FPGAs \050those with approximately 5000 or more LUT/Flip-) 315 514.78 P -0.11 (\337op pairs\051 is threatening to become so long that it may tak) 315 503.77 P -0.11 (e a) 546.73 503.77 P 1.43 (signi\336cant portion of a day to compile, or e) 315 492.77 P 1.43 (v) 499.21 492.77 P 1.43 (en to declare) 504.06 492.77 P 0.42 (f) 315 481.77 P 0.42 (ailure of compilation. F) 318.23 481.77 P 0.42 (or a subset of designers, these lar) 413.77 481.77 P 0.42 (ge) 548.56 481.77 P 1.87 (compile times may reduce or eliminate the adv) 315 470.77 P 1.87 (antages of) 515.31 470.77 P (FPGAs.) 315 459.77 T 0.96 (In this paper we focus on the routing phase of the compile) 315 442.77 P 1.29 (process, and as a \336rst step, e) 315 431.77 P 1.29 (xplore w) 435.92 431.77 P 1.29 (ays of making a f) 472.39 431.77 P 1.29 (ast) 546.89 431.77 P 0.81 (routability-dri) 315 420.77 P 0.81 (v) 370.86 420.77 P 0.81 (en router) 375.71 420.77 P 0.81 (. Although it is clearly necessary to) 411.79 420.77 P 1.71 (de) 315 409.77 P 1.71 (v) 324.19 409.77 P 1.71 (elop a f) 329.04 409.77 P 1.71 (ast timing-dri) 362.36 409.77 P 1.71 (v) 417.99 409.77 P 1.71 (en router) 422.84 409.77 P 1.71 (, it is \336rst important to) 459.97 409.77 P 1.45 (understand what \322f) 315 398.77 P 1.45 (ast\323 means in the conte) 393.89 398.77 P 1.45 (xt of routability) 492.32 398.77 P (before mo) 315 387.77 T (ving on to timing-dri) 355.67 387.77 T (v) 439.04 387.77 T (en routing.) 443.89 387.77 T 1.55 (W) 315 370.77 P 1.55 (e en) 323.64 370.77 P 1.55 (vision the follo) 341.17 370.77 P 1.55 (wing scenario as the conte) 404.57 370.77 P 1.55 (xt for f) 516.13 370.77 P 1.55 (ast) 546.89 370.77 P 1.3 (compile: the user has just designed a circuit \050to the netlist) 315 359.77 P 0.5 (le) 315 348.77 P 0.5 (v) 321.97 348.77 P 0.5 (el\051 and initially tar) 326.82 348.77 P 0.5 (gets an FPGA of a particular size. He/) 402.3 348.77 P -0.24 (she w) 315 337.77 P -0.24 (ould lik) 337.71 337.77 P -0.24 (e to quickly recei) 368.2 337.77 P -0.24 (v) 436.37 337.77 P -0.24 (e a routing \050and subsequently) 441.22 337.77 P -0.16 (a programming \336le\051 for that FPGA) 315 326.77 P 2 F -0.16 (or) 456.28 326.77 P 1 F -0.16 (be told that the routing) 467.51 326.77 P 0.03 (will tak) 315 315.77 P 0.03 (e signi\336cantly more time \050with a time estimate\051 or be) 345.21 315.77 P -0.17 (told that the routing task is impossible. In the latter tw) 315 304.77 P -0.17 (o cases) 529.57 304.77 P 6.05 (the designer has se) 315 293.77 P 6.05 (v) 408.15 293.77 P 6.05 (eral options, depending on the) 413 293.77 P 0.36 (circumstances. Users of a rapid-prototyping system \050such as) 315 282.77 P 0.11 (the T) 315 271.78 P 0.11 (ransmogri\336er) 335.59 271.78 P 0.11 (-2 [Le) 389.27 271.78 P 0.11 (wi97] or the Aptix System Explorer) 413.84 271.78 P 0.1 ([Apti96]\051 could reduce the size of the design by mo) 315 260.78 P 0.1 (ving part) 522.07 260.78 P 0.05 (of the circuit into a dif) 315 249.78 P 0.05 (ferent FPGA. If the FPGA is designed) 404.69 249.78 P 2.07 (into a sock) 315 238.78 P 2.07 (et that can accept FPGAs with dif) 362.38 238.78 P 2.07 (fering logic) 509.55 238.78 P 0.58 (capacities, then the designer could choose to try routing the) 315 227.78 P 1.16 (circuit on a lar) 315 216.78 P 1.16 (ger FPGA. Alternati) 376.34 216.78 P 1.16 (v) 459.78 216.78 P 1.16 (ely) 464.63 216.78 P 1.16 (, the designer could) 476.2 216.78 P 2.7 (remo) 315 205.78 P 2.7 (v) 335.4 205.78 P 2.7 (e part of the design, making it smaller) 340.25 205.78 P 2.7 (, as this is) 510.43 205.78 P 3.34 (typically possible in the FPGA-based computing w) 315 194.78 P 3.34 (orld,) 539.39 194.78 P 1.02 (where the amount of parallelism \050and hence hardw) 315 183.78 P 1.02 (are\051 can) 525.06 183.78 P 0.29 (be parameterized. Note that this scenario also requires a f) 315 172.78 P 0.29 (ast) 546.89 172.78 P 0.94 (placement tool; another part of the F) 315 161.78 P 0.94 (ast Compile Project at) 466.57 161.78 P (the Uni) 315 150.78 T (v) 344.47 150.78 T (ersity of T) 349.32 150.78 T (oronto is currently at w) 390.18 150.78 T (ork on this issue.) 483.4 150.78 T 1.07 (T) 315 133.78 P 1.07 (o precisely de\336ne the notion of f) 320.31 133.78 P 1.07 (ast compile, we ha) 456.6 133.78 P 1.07 (v) 534.03 133.78 P 1.07 (e set) 538.88 133.78 P -0.07 (the follo) 315 122.78 P -0.07 (wing goal for our router: to be able to route a 20,000) 348.29 122.78 P 4.13 (LUT/\337ip-\337op pair circuit in 10 seconds on a modern) 315 111.78 P 2.32 (processor) 315 100.78 P 2.32 (. W) 352.77 100.78 P 2.32 (e furthermore require a running time that is) 368.73 100.78 P 0.22 (linear in the size of the circuit, with a lo) 315 89.78 P 0.22 (w linearity constant.) 476.17 89.78 P 0.48 (Finally) 315 78.78 P 0.48 (, since some routing problems are inherently dif) 342.69 78.78 P 0.48 (\336cult) 537.44 78.78 P 0 0 0 1 0 0 0 K 54 81.17 297 185.44 C 0 0 612 792 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 54 657.44 558 738 R 7 X 0 0 0 1 0 0 0 K V 0 14 Q 0 X (A F) 161.6 728.67 T (ast Routability-Driven Router f) 183.87 728.67 T (or FPGAs) 385.83 728.67 T 1 10 Q (Jordan S. Sw) 202.84 714.47 T (artz, V) 255.24 714.47 T (aughn Betz, and Jonathan Rose) 281.34 714.47 T (Department of Electrical and Computer Engineering) 199.88 703.47 T (Uni) 261.44 690.47 T (v) 276.19 690.47 T (ersity of T) 281.04 690.47 T (oronto) 321.9 690.47 T (T) 240.96 677.47 T (oronto, ON, Canada M5S 3G4) 246.27 677.47 T ({jssw) 218.57 664.47 T (artz,v) 241.05 664.47 T (aughn,jayar}@eecg.toronto.edu) 263.29 664.47 T FMENDPAGE %%EndPage: "1" 1 %%Page: "2" 2 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q 0 X 0 0 0 1 0 0 0 K 0.51 (or impossible, we require that our router be able to quickly) 53.86 713.33 P (identify both of these cases in order to alert the user) 53.86 702.33 T (.) 260.49 702.33 T 0.34 (Most pre) 53.86 685.33 P 0.34 (vious w) 89.78 685.33 P 0.34 (ork on FPGA routing [Bro) 121.41 685.33 P 0.34 (w92a] [Lemi93]) 228.63 685.33 P 1.48 ([W) 53.86 674.33 P 1.48 (u94] [Betz97] has focussed on achie) 66.13 674.33 P 1.48 (ving routes within) 218.5 674.33 P 0.1 (the fe) 53.86 663.33 P 0.1 (west number of tracks per channel. T) 76.2 663.33 P 0.1 (o our kno) 224.57 663.33 P 0.1 (wledge,) 262.86 663.33 P 0.16 (there is no pre) 53.86 652.33 P 0.16 (vious w) 111 652.33 P 0.16 (ork which has a primary focus on f) 142.45 652.33 P 0.16 (ast) 283.13 652.33 P 5.19 (compile time and f) 53.86 641.33 P 5.19 (ast identi\336cation of hard routing) 144.6 641.33 P 0.68 (problems. There has been v) 53.86 630.33 P 0.68 (arious reports of techniques for) 166.56 630.33 P -0.16 (speeding up maze routing [Alle76] [Souk78] [P) 53.86 619.33 P -0.16 (alc92], some) 243.29 619.33 P (of which we b) 53.86 608.33 T (uild on here.) 110.59 608.33 T 0.84 (This paper is or) 53.86 591.33 P 0.84 (g) 118.69 591.33 P 0.84 (anized as follo) 123.64 591.33 P 0.84 (ws: Section) 183.39 591.33 P 0.84 (2 describes the) 233.12 591.33 P 5.91 (routing algorithm and dif) 53.86 580.33 P 5.91 (\336culty prediction approach.) 172.16 580.33 P 3.8 (Section) 53.86 569.33 P 3.8 (3 compares the speed and quality of the ne) 86.36 569.33 P 3.8 (w) 287.02 569.33 P 3.98 (algorithm with those of VPR [Betz97], and Section) 53.86 558.33 P 3.98 (4) 289.24 558.33 P (concludes.) 53.86 547.33 T 0 F (2. Routing Algorithm) 53.86 530.33 T 1 F -0.17 (In this section we gi) 53.86 515.33 P -0.17 (v) 133.47 515.33 P -0.17 (e a brief o) 138.32 515.33 P -0.17 (v) 177.92 515.33 P -0.17 (ervie) 182.77 515.33 P -0.17 (w of the pre) 202.51 515.33 P -0.17 (vious w) 249.79 515.33 P -0.17 (ork) 280.91 515.33 P 2.68 (upon which our algorithm is b) 53.86 504.33 P 2.68 (uilt. W) 187.91 504.33 P 2.68 (e assume that the) 217.58 504.33 P 2.5 (reader is f) 53.86 493.33 P 2.5 (amiliar with the basic maze routing approach) 98.73 493.33 P 4.3 ([Lee61]. W) 53.86 482.33 P 4.3 (e then describe modi\336cations to the basic) 103.45 482.33 P -0.03 (algorithm to increase its speed and gi) 53.86 471.33 P -0.03 (v) 202.3 471.33 P -0.03 (e a method to classify) 207.15 471.33 P (each routing problem as lo) 53.86 460.33 T (w stress, dif) 160.26 460.33 T (\336cult, or impossible.) 208.06 460.33 T 0 F (2.1 Base Algorithm) 53.86 443.33 T 1 F 0.34 (Our routing algorithm is based on the P) 53.86 429.33 P 0.34 (athFinder algorithm) 214.17 429.33 P 1.43 ([Ebel95], which is an iterati) 53.86 418.33 P 1.43 (v) 170.7 418.33 P 1.43 (e maze-type router [Nair87].) 175.55 418.33 P 0.82 (Nets are routed sequentially) 53.86 407.33 P 0.82 (, and once a track se) 167.58 407.33 P 0.82 (gment has) 252.59 407.33 P 1.61 (been used for one net, other nets) 53.86 396.33 P 2 F 1.61 (ar) 197.32 396.33 P 1.61 (e) 205.84 396.33 P 1 F 1.61 ( allo) 210.28 396.33 P 1.61 (wed to use that) 229.14 396.33 P 2.08 (se) 53.86 385.33 P 2.08 (gment, b) 62.04 385.33 P 2.08 (ut must pay a higher cost. Consequently) 98.92 385.33 P 2.08 (, nets) 271.04 385.33 P 0.44 (tend to a) 53.86 374.33 P 0.44 (v) 88.99 374.33 P 0.44 (oid o) 93.79 374.33 P 0.44 (v) 114.36 374.33 P 0.44 (eruse of a se) 119.21 374.33 P 0.44 (gment unless it is necessary or) 170.09 374.33 P 1 (particularly ef) 53.86 363.33 P 1 (\336cient. At the end of the \336rst iteration \050after) 110.98 363.33 P 2.33 (all nets ha) 53.86 352.33 P 2.33 (v) 98.86 352.33 P 2.33 (e been routed\051, either there are no se) 103.71 352.33 P 2.33 (gments) 265.35 352.33 P 1.53 (o) 53.86 341.33 P 1.53 (v) 58.71 341.33 P 1.53 (erused and the routing is successful, or some se) 63.56 341.33 P 1.53 (gments) 265.35 341.33 P 0.27 (are o) 53.86 330.33 P 0.27 (v) 73.69 330.33 P 0.27 (erused and more routing iterations are e) 78.54 330.33 P 0.27 (x) 238.86 330.33 P 0.27 (ecuted to try) 243.71 330.33 P 2.54 (and resolv) 53.86 319.33 P 2.54 (e the contention. In each of these subsequent) 97.63 319.33 P 2.74 (routing iterations, e) 53.86 308.33 P 2.74 (v) 137.14 308.33 P 2.74 (ery net is ripped up and re-routed.) 141.99 308.33 P 2.63 (Since the cost of o) 53.86 297.33 P 2.63 (v) 138.13 297.33 P 2.63 (er) 142.98 297.33 P 2.63 (-used track se) 150.55 297.33 P 2.63 (gments is increased) 210.65 297.33 P 0.39 (e) 53.86 286.33 P 0.39 (v) 58.05 286.33 P 0.39 (ery routing iteration, the) 62.9 286.33 P 0.39 (y become increasingly e) 161.14 286.33 P 0.39 (xpensi) 259.09 286.33 P 0.39 (v) 284.95 286.33 P 0.39 (e) 289.8 286.33 P 1.32 (and are less lik) 53.86 275.33 P 1.32 (ely to be used by more than one net. This) 117.42 275.33 P 0.83 (gradual reduction in routing violations is a v) 53.86 264.33 P 0.83 (ery successful) 237.03 264.33 P (routing approach.) 53.86 253.33 T 1.36 (In order for the router to ha) 53.86 236.33 P 1.36 (v) 171.22 236.33 P 1.36 (e a v) 176.07 236.33 P 1.36 (ery short run time, tw) 197.52 236.33 P 1.36 (o) 289.24 236.33 P 0.15 (conditions are necessary: all of the nets ha) 53.86 225.33 P 0.15 (v) 223.81 225.33 P 0.15 (e to be routed in) 228.66 225.33 P 5.33 (as fe) 53.86 214.33 P 5.33 (w iterations as possible \050ideally one iteration\051.) 77.54 214.33 P 3.91 (Secondly) 53.86 203.33 P 3.91 (, each net has to be routed as ef) 90.43 203.33 P 3.91 (\336ciently as) 246.71 203.33 P 4.92 (possible, without e) 53.86 192.33 P 4.92 (xploring all of the possible paths) 138.82 192.33 P (e) 53.86 181.33 T (xhausti) 58.15 181.33 T (v) 86.79 181.33 T (ely) 91.64 181.33 T (.) 103.21 181.33 T 0 F (2.2 Speed Enhancements) 53.86 164.33 T 1 F 2.11 (W) 53.86 150.33 P 2.11 (e ha) 62.5 150.33 P 2.11 (v) 80.78 150.33 P 2.11 (e implemented tw) 85.63 150.33 P 2.11 (o enhancements to increase the) 161.4 150.33 P 0.17 (speed of the basic breadth-\336rst search maze router) 53.86 139.33 P 0.17 (. The \336rst) 255.28 139.33 P 0.5 (is to emplo) 53.86 128.33 P 0.5 (y a depth-\336rst search which directs the router to) 99.2 128.33 P 2.1 (head to) 53.86 117.33 P 2.1 (w) 84.87 117.33 P 2.1 (ards speci\336c tar) 91.99 117.33 P 2.1 (gets [Rubi74]. The second is to) 158.76 117.33 P 0.8 (reduce the amount of acti) 53.86 106.33 P 0.8 (vity on the routing e) 158.44 106.33 P 0.8 (xpansion list) 242.6 106.33 P 2.75 (for higher) 53.86 95.33 P 2.75 (-f) 96.11 95.33 P 2.75 (anout nets by only placing se) 102.67 95.33 P 2.75 (gments on the) 232.63 95.33 P (e) 53.86 84.33 T (xpansion list that are in the neighborhood of the tar) 58.15 84.33 T (get.) 262.67 84.33 T 0 F (2.2.1 Directed, Depth-Fir) 317.76 713.33 T (st Sear) 435.42 713.33 T (c) 468.57 713.33 T (h) 474.03 713.33 T 1 F 1.68 (Most basic maze routers use a breadth-\336rst search of the) 317.76 700.33 P 1.42 (routing graph to mak) 317.76 689.33 P 1.42 (e connections. While this guarantees) 406.09 689.33 P 0.74 (the best connections \050for tw) 317.76 678.33 P 0.74 (o-pin nets\051, it means the router) 431.7 678.33 P 3.12 (spends much of its time e) 317.76 667.33 P 3.12 (xploring paths in the wrong) 435.13 667.33 P -0.04 (direction. A depth-\336rst search \050which we will call a) 317.76 656.33 P 2 F -0.04 (dir) 525.74 656.33 P -0.04 (ected) 537.04 656.33 P 1 F 4.64 (search as it is a more e) 317.76 645.33 P 4.64 (v) 435.87 645.33 P 4.64 (ocati) 440.67 645.33 P 4.64 (v) 459.86 645.33 P 4.64 (e term for the tw) 464.71 645.33 P 4.64 (o-) 549.81 645.33 P 0.44 (dimensional routing problem\051 uses a narro) 317.76 634.33 P 0.44 (wer w) 489.4 634.33 P 0.44 (a) 514.45 634.33 P 0.44 (v) 518.69 634.33 P 0.44 (efront in) 523.54 634.33 P 2.42 (order to e) 317.76 623.33 P 2.42 (xpand in the direction of the tar) 360.77 623.33 P 2.42 (get pin to be) 501.17 623.33 P 1.32 (connected. Ideally) 317.76 612.33 P 1.32 (, the directed search will simply start at) 391.74 612.33 P 1.24 (the source of the net and choose successi) 317.76 601.33 P 1.24 (v) 489.73 601.33 P 1.24 (ely closer track) 494.58 601.33 P (se) 317.76 590.33 T (gments until the tar) 325.94 590.33 T (get sink is reached.) 403.26 590.33 T 2.67 (There are tw) 317.76 573.33 P 2.67 (o k) 373.53 573.33 P 2.67 (e) 388.6 573.33 P 2.67 (y issues in the design of this kind of) 392.89 573.33 P 1.72 (directed search: modifying the cost function to direct the) 317.76 562.33 P 2.05 (e) 317.76 551.33 P 2.05 (xpansion from the source to) 322.05 551.33 P 2.05 (w) 441.65 551.33 P 2.05 (ards a speci\336c tar) 448.77 551.33 P 2.05 (get, and) 524.43 551.33 P 1.08 (choosing the correct tar) 317.76 540.33 P 1.08 (get from the choices a) 414.95 540.33 P 1.08 (v) 507.36 540.33 P 1.08 (ailable in a) 512.11 540.33 P (multi-terminal net.) 317.76 529.33 T 0.36 (A form of directed search, kno) 317.76 512.33 P 0.36 (wn as the A* algorithm, w) 442.03 512.33 P 0.36 (as) 549.81 512.33 P 3.09 (tried as part of the P) 317.76 501.33 P 3.09 (ath\336nder algorithm [Ebel95]. Our) 413.89 501.33 P 0.92 (directed search algorithm is similar) 317.76 490.33 P 0.92 (, b) 462.11 490.33 P 0.92 (ut our choice of cost) 472.83 490.33 P 3.27 (function mak) 317.76 479.33 P 3.27 (es our directed search more aggressi) 373.98 479.33 P 3.27 (v) 535.3 479.33 P 3.27 (e in) 540.15 479.33 P (seeking the tar) 317.76 468.33 T (get.) 375.9 468.33 T 2 11 Q (Cost Function) 317.76 449.67 T 1 10 Q 0.19 (The follo) 317.76 436.33 P 0.19 (wing cost function is used to measure the cost of a) 354.64 436.33 P (route from the source node to a speci\336c track se) 317.76 425.33 T (gment:) 508.95 425.33 T (Cost = Cost) 372.33 404.33 T 1 8 Q (pre) 419.64 401.83 T (v) 429.66 401.83 T 1 10 Q ( + C) 433.66 404.33 T 1 8 Q (0) 450.97 401.83 T 1 10 Q ( +) 454.97 404.33 T 3 F (a\050) 465.61 404.33 T (D) 475.25 404.33 T 1 F (D\051) 481.37 404.33 T (\0501\051) 546.48 404.33 T 4 F 1.37 (Cost) 317.76 386.5 P 1 8 Q 1.09 (pre) 337.2 384 P 1.09 (v) 347.22 384 P 1 10 Q 1.37 (is the cost of the pre) 354.31 386.5 P 1.37 (vious track se) 441.72 386.5 P 1.37 (gments on the) 499.3 386.5 P 1.01 (path from the source to this track se) 317.76 373.67 P 1.01 (gment, i.e. the cost of) 467.72 373.67 P (the track se) 317.76 362.67 T (gments used to reach this one.) 363.15 362.67 T 4 F 6.19 (C) 317.76 345.67 P 4 8 Q 4.95 (0) 324.98 343.17 P 1 10 Q 6.19 ( is the base cost of using the se) 328.98 345.67 P 6.19 (gment under) 501.68 345.67 P 0.56 (consideration. The base cost for a track se) 317.76 332.83 P 0.56 (gment is initially) 489.24 332.83 P 1.97 (one, b) 317.76 321.83 P 1.97 (ut is made v) 343.98 321.83 P 1.97 (ery lar) 398.35 321.83 P 1.97 (ge when the track se) 425.96 321.83 P 1.97 (gment has) 515.34 321.83 P 0.71 (already been used. By increasing the base cost quickly) 317.76 310.83 P 0.71 (, we) 540.78 310.83 P -0.1 (reduce the number of router iterations to resolv) 317.76 299.83 P -0.1 (e congestion.) 505.47 299.83 P 0.31 (In the original P) 317.76 288.83 P 0.31 (athFinder algorithm [Ebel95], the base cost) 383.27 288.83 P 2.3 (is increased more gradually) 317.76 277.83 P 2.3 (, requiring more iterations to) 434.25 277.83 P (resolv) 317.76 266.83 T (e congestion.) 342.05 266.83 T 3 F -0.13 (D) 317.76 249.83 P 4 F -0.13 (D) 323.88 249.83 P 1 F -0.13 ( is the change in the Manhattan distance remaining to the) 331.1 249.83 P 0.39 (tar) 317.76 238.83 P 0.39 (get sink for the track se) 328.13 238.83 P 0.39 (gment under consideration. If the) 423.54 238.83 P 0.88 (track se) 317.76 227.83 P 0.88 (gment is closer to the tar) 349.31 227.83 P 0.88 (get sink than the pre) 452.11 227.83 P 0.88 (vious) 536.47 227.83 P -0.18 (track se) 317.76 216.83 P -0.18 (gment, then) 348.26 216.83 P 3 F -0.18 (D) 397.62 216.83 P 1 F -0.18 (D is ne) 403.74 216.83 P -0.18 (g) 431.57 216.83 P -0.18 (ati) 436.52 216.83 P -0.18 (v) 446.27 216.83 P -0.18 (e, reducing the o) 451.12 216.83 P -0.18 (v) 517.09 216.83 P -0.18 (erall cost) 521.94 216.83 P 0.82 (of using the track se) 317.76 205.83 P 0.82 (gment. A track se) 401.44 205.83 P 0.82 (gment that is further) 474.3 205.83 P (from the tar) 317.76 194.83 T (get sink will ha) 364.79 194.83 T (v) 425.98 194.83 T (e a positi) 430.83 194.83 T (v) 466.69 194.83 T (e) 471.54 194.83 T 3 F (D) 478.48 194.83 T 1 F (D.) 484.6 194.83 T 3 F 4.34 (a) 317.76 177.83 P 1 F 4.34 (is called the \322direction f) 330.92 177.83 P 4.34 (actor\323, it determines ho) 444.27 177.83 P 4.34 (w) 550.92 177.83 P 2.71 (aggressi) 317.76 166.83 P 2.71 (v) 350.28 166.83 P 2.71 (ely the router \322dri) 355.13 166.83 P 2.71 (v) 434.39 166.83 P 2.71 (es\323 to) 439.24 166.83 P 2.71 (w) 464.75 166.83 P 2.71 (ards the tar) 471.87 166.83 P 2.71 (get sink.) 521.54 166.83 P 0.14 (W) 317.76 155.83 P 0.14 (ith) 326.8 155.83 P 3 F 0.14 (a) 340.01 155.83 P 1 F 0.14 ( = 0 the search is equi) 346.32 155.83 P 0.14 (v) 434.23 155.83 P 0.14 (alent to a breadth-\336rst search.) 438.98 155.83 P 2.6 (A v) 317.76 144.83 P 2.6 (ery lar) 334.93 144.83 P 2.6 (ge) 363.17 144.83 P 3 F 2.6 (a) 377.71 144.83 P 1 F 2.6 (, on the other hand, will often result in) 384.02 144.83 P -0.06 (e) 317.76 133.83 P -0.06 (xcessi) 322.05 133.83 P -0.06 (v) 346.24 133.83 P -0.06 (ely long connections since the nearness to the tar) 351.09 133.83 P -0.06 (get) 545.92 133.83 P 2.24 (is considered much more important than wirelength. W) 317.76 122.83 P 2.24 (e) 553.7 122.83 P 0.12 (found e) 317.76 111.83 P 0.12 (xperimentally that a direction f) 348 111.83 P 0.12 (actor of 1.5 produced) 472.25 111.83 P 0.1 (the best results for lar) 317.76 100.83 P 0.1 (ge circuits. F) 404.63 100.83 P 0.1 (or) 456.62 100.83 P 3 F 0.1 (a) 467.55 100.83 P 1 F 0.1 ( > 1, the router is not) 473.86 100.83 P 3.68 (guaranteed to \336nd the shortest source-sink connection;) 317.76 89.83 P FMENDPAGE %%EndPage: "2" 2 %%Page: "3" 3 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q 0 X 0 0 0 1 0 0 0 K 0.19 (ho) 53.86 713.33 P 0.19 (we) 63.61 713.33 P 0.19 (v) 75.02 713.33 P 0.19 (er) 79.87 713.33 P 0.19 (, we ha) 87.24 713.33 P 0.19 (v) 116.02 713.33 P 0.19 (e found that setting) 120.87 713.33 P 3 F 0.19 (a) 201.07 713.33 P 1 F 0.19 ( = 1.5 leads to a lar) 207.38 713.33 P 0.19 (ge) 284.8 713.33 P (speedup, with no measurable quality de) 53.86 702.33 T (gradation.) 212.02 702.33 T 2 11 Q (T) 53.86 683.67 T (ar) 58.96 683.67 T (g) 68.33 683.67 T (et Selection) 73.72 683.67 T 1 10 Q 0.56 (The second issue in a directed search is tar) 53.86 670.33 P 0.56 (get selection for) 228.68 670.33 P 3.87 (multi-terminal nets. Since the directed search needs a) 53.86 659.33 P 4.27 (speci\336c tar) 53.86 648.33 P 4.27 (get \050in order to calculate) 101.55 648.33 P 4 F 4.27 (D) 223.13 648.33 P 1 F 4.27 ( in the abo) 230.35 648.33 P 4.27 (v) 284.95 648.33 P 4.27 (e) 289.8 648.33 P 2.57 (equation\051, each sink of the net must be connected in a) 53.86 637.33 P 0.67 (separate routing step. W) 53.86 626.33 P 0.67 (e route to the tar) 152.26 626.33 P 0.67 (gets in order from) 220.3 626.33 P 0.9 (the closest sink to the source, to the f) 53.86 615.33 P 0.9 (arthest sink from the) 209.03 615.33 P 0.78 (source. This a) 53.86 604.33 P 0.78 (v) 111.03 604.33 P 0.78 (oids the creation of long trunks that are not) 115.83 604.33 P 1.19 (well re-used, as illustrated in Figure) 53.86 593.33 P 1.19 (1. Figure) 206.2 593.33 P 1.19 (1 \050a\051 sho) 246 593.33 P 1.19 (ws) 283.13 593.33 P 0.31 (the net routing when the sink closest to the source is routed) 53.86 582.33 P 3.66 (\336rst. The further sink simply e) 53.86 571.33 P 3.66 (xtends the e) 193.68 571.33 P 3.66 (xisting net) 248.62 571.33 P 1.33 (further) 53.86 560.33 P 1.33 (, without using e) 80.67 560.33 P 1.33 (xtra wiring unnecessarily) 151.19 560.33 P 1.33 (. Figure) 254.29 560.33 P 1.33 (1) 289.24 560.33 P 2.33 (\050b\051 sho) 53.86 549.33 P 2.33 (ws what often happens when the furthest sink is) 83.99 549.33 P 0.74 (routed \336rst. The portion of the routing created to reach the) 53.86 538.33 P 4.43 (furthest sink does not pass close by the other sink.) 53.86 527.33 P 0.57 (Consequently) 53.86 516.33 P 0.57 (, the net in \050b\051 uses more track se) 108.21 516.33 P 0.57 (gments than) 245.06 516.33 P (the net in \050a\051.) 53.86 505.33 T 0.91 (Figure) 53.86 488.33 P 0.91 (2 gi) 82.47 488.33 P 0.91 (v) 98.41 488.33 P 0.91 (es the pseudocode for routing a multi-terminal) 103.26 488.33 P 2.23 (net. After a sink is reached, each of the track se) 53.86 477.33 P 2.23 (gments) 265.35 477.33 P 1.17 (already assigned to the net is placed on the e) 53.86 466.33 P 1.17 (xpansion list) 242.23 466.33 P 1.54 (with a cost equal to alpha times its distance to the tar) 53.86 455.33 P 1.54 (get) 282.02 455.33 P 0.04 (sink. This guarantees that the routing will continue from the) 53.86 444.33 P (closest track se) 53.86 433.33 T (gment that is already part of the net.) 114.25 433.33 T 2 11 Q (Net Or) 53.86 414.67 T (der) 83.7 414.67 T 1 10 Q 2.25 (The nets are routed in order of decreasing f) 53.86 401.33 P 2.25 (an out. The) 244.47 401.33 P -0.04 (highest f) 53.86 390.33 P -0.04 (anout nets are routed \336rst because the) 88.43 390.33 P -0.04 (y tend to span) 238.54 390.33 P 0.17 (the whole FPGA and are much easier to route when there is) 53.86 379.33 P -0.24 (no e) 53.86 368.33 P -0.24 (xisting congestion. Lo) 70.41 368.33 P -0.24 (w f) 158.85 368.33 P -0.24 (anout nets tend to be localized,) 171.56 368.33 P 2.87 (so routing them later in the routing process is not too) 53.86 357.33 P (dif) 53.86 346.33 T (\336cult e) 64.72 346.33 T (v) 91.97 346.33 T (en in the presence of congestion.) 96.82 346.33 T 0 F (2.2.2 Reducing Activity on the Expansion List) 317.76 382.48 T 1 F 2.91 (The abo) 317.76 369.48 P 2.91 (v) 353.02 369.48 P 2.91 (e algorithm is some) 357.86 369.48 P 2.91 (what inef) 444.96 369.48 P 2.91 (\336cient because it) 485.11 369.48 P -0.12 (places the entire net routed so f) 317.76 358.48 P -0.12 (ar on the e) 441.94 358.48 P -0.12 (xpansion list when) 483.37 358.48 P 1.96 (starting to route to each sink of a net. This is often un-) 317.76 347.48 P 0.72 (necessary because for higher f) 317.76 336.48 P 0.72 (anout nets most of the net is) 441.6 336.48 P 317.76 324.28 558.14 720 C 0 0 0 1 0 0 0 K 317.76 395.15 558.14 720 C 0 0 0 1 0 0 0 K 385.51 596.27 394.51 605.27 R 0.5 H 2 Z 0 X 0 0 0 1 0 0 0 K N 412.51 596.27 421.51 605.27 R N 439.51 596.27 448.51 605.27 R N 466.51 596.27 475.51 605.27 R N 493.51 596.27 502.51 605.27 R N 385.51 623.27 394.51 632.27 R N 412.51 623.27 421.51 632.27 R N 439.51 623.27 448.51 632.27 R N 466.51 623.27 475.51 632.27 R N 493.51 623.27 502.51 632.27 R N 385.51 650.27 394.51 659.27 R N 412.51 650.27 421.51 659.27 R N 439.51 650.27 448.51 659.27 R N 466.51 650.27 475.51 659.27 R N 493.51 650.27 502.51 659.27 R N 385.51 677.27 394.51 686.27 R N 412.51 677.27 421.51 686.27 R 3 X V 0 X N 439.51 677.27 448.51 686.27 R N 466.51 677.27 475.51 686.27 R N 493.51 677.27 502.51 686.27 R 3 X V 0 X N 385.51 704.27 394.51 713.27 R N 412.51 704.27 421.51 713.27 R N 439.51 704.27 448.51 713.27 R N 466.51 704.27 475.51 713.27 R N 493.51 704.27 502.51 713.27 R N 403.51 600.49 403.51 668.27 2 L 3 H N 403.51 668.27 416.74 668.27 2 L N 416.96 668.27 416.96 677.27 2 L N 419.51 668.27 498.07 668.27 2 L 3 X N 498.29 668.6 498.29 677.6 2 L N 393.07 600.49 403.62 600.49 2 L 0 X N 1 10 Q (\050a\051) 439.51 580.44 T 4 F (Figure 1. Two methods of routing a multi-terminal) 328.27 414.3 T (net: \050a\051 closest sinks first; \050b\051 furthest sinks first) 335.36 402.3 T 385.51 447.1 394.51 456.1 R 0.5 H N 412.51 447.1 421.51 456.1 R N 439.51 447.1 448.51 456.1 R N 466.51 447.1 475.51 456.1 R N 493.51 447.1 502.51 456.1 R N 385.51 474.1 394.51 483.1 R N 412.51 474.1 421.51 483.1 R N 439.51 474.1 448.51 483.1 R N 466.51 474.1 475.51 483.1 R N 493.51 474.1 502.51 483.1 R N 385.51 501.1 394.51 510.1 R N 412.51 501.1 421.51 510.1 R N 439.51 501.1 448.51 510.1 R N 466.51 501.1 475.51 510.1 R N 493.51 501.1 502.51 510.1 R N 385.51 528.09 394.51 537.09 R N 412.51 528.09 421.51 537.09 R 3 X V 0 X N 439.51 528.09 448.51 537.09 R N 466.51 528.09 475.51 537.09 R N 493.51 528.09 502.51 537.09 R 3 X V 0 X N 385.51 555.09 394.51 564.09 R N 412.51 555.09 421.51 564.09 R N 439.51 555.09 448.51 564.09 R N 466.51 555.09 475.51 564.09 R N 493.51 555.09 502.51 564.09 R N 403.51 466.87 403.51 519.09 2 L 3 H 3 X N 403.51 519.09 416.4 519.09 2 L N 416.96 519.09 416.96 528.09 2 L N 498.29 519.43 498.29 528.43 2 L 0 X N 393.07 451.31 403.62 451.31 2 L N 403.51 465.1 484.51 465.1 2 L N 484.51 465.1 484.51 519.09 2 L N 484.51 519.09 498.4 519.09 2 L N 1 F (\050b\051) 436.85 431.27 T 403.51 465.1 403.51 451.31 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (sink 1) 404.67 542.67 T (sink 2) 486.58 543 T (sink 1) 403.92 691.67 T (sink 2) 485.25 691 T (source) 353.33 598.67 T (source) 353.33 449.33 T 0 0 0 1 0 0 0 K 317.76 324.28 558.14 720 C 0 0 612 792 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 10 Q 0 X 0 0 0 1 0 0 0 K (Sort) 86.37 310.11 T 1 F (the sinks in order from closest to furthest from the source) 107.2 310.11 T 4 F (T) 86.37 298.11 T (ar) 92.12 298.11 T (get) 101.46 298.11 T 1 F ( = sink closest to source) 114.23 298.11 T 4 F (Put) 86.37 286.11 T 1 F ( tracks se) 101.37 286.11 T (gments attached to source onto e) 138.43 286.11 T (xpansion list) 269.09 286.11 T 4 F (Remo) 86.37 274.11 T (v) 111.26 274.11 T (e) 116.16 274.11 T 1 F ( lo) 120.6 274.11 T (west cost track se) 130.63 274.11 T (gment from e) 200.74 274.11 T (xpansion list) 254.47 274.11 T 4 F (While) 86.37 262.11 T 1 F (the tar) 114.43 262.11 T (get has not been reached) 139.52 262.11 T 4 F (Put) 122.37 250.11 T 1 F ( neighbors of this track se) 137.37 250.11 T (gment onto e) 240.26 250.11 T (xpansion list with cost gi) 292.33 250.11 T (v) 392.09 250.11 T (en by \0501\051) 396.94 250.11 T 4 F (Remo) 122.37 238.11 T (v) 147.26 238.11 T (e) 152.16 238.11 T 1 F ( lo) 156.6 238.11 T (west cost track se) 166.63 238.11 T (gment from e) 236.74 238.11 T (xpansion list) 290.47 238.11 T 4 F (End) 86.37 226.11 T (while) 104.01 226.11 T (Empty) 86.37 214.11 T 1 F ( the e) 115.26 214.11 T (xpansion list) 136.77 214.11 T 4 F (While) 86.37 202.11 T 1 F ( still more sinks to route for this net) 111.93 202.11 T 4 F (T) 122.37 190.11 T (ar) 128.12 190.11 T (get) 137.46 190.11 T 1 F ( = ne) 150.23 190.11 T (xt closest \050to source\051 unconnected sink.) 170.16 190.11 T 4 F (Put) 122.37 178.11 T 1 F ( the whole net created up to this point onto e) 137.37 178.11 T (xpansion list with cost =) 314.98 178.11 T 3 F (a) 415.35 178.11 T 1 F (D) 421.66 178.11 T 4 F (Remo) 122.37 166.11 T (v) 147.26 166.11 T (e) 152.16 166.11 T 1 F ( lo) 156.6 166.11 T (west cost track se) 166.63 166.11 T (gment from e) 236.74 166.11 T (xpansion list) 290.47 166.11 T 4 F (While) 122.37 154.11 T 1 F (the tar) 150.43 154.11 T (get has not been reached) 175.52 154.11 T 4 F (Put) 157.37 142.11 T 1 F ( neighbors of this track se) 172.37 142.11 T (gment onto e) 275.26 142.11 T (xpansion list) 327.33 142.11 T 4 F (Remo) 157.37 130.11 T (v) 182.26 130.11 T (e) 187.16 130.11 T 1 F ( lo) 191.6 130.11 T (west cost track se) 201.63 130.11 T (gment from e) 271.74 130.11 T (xpansion list) 325.47 130.11 T 4 F (End) 122.37 118.11 T (while) 140.01 118.11 T (Empty) 122.37 106.11 T 1 F ( the e) 151.26 106.11 T (xpansion list) 172.77 106.11 T 4 F (End) 86.37 94.11 T (while) 104.01 94.11 T (Figure 2. Pseudocode for Routing a Multi-terminal Net) 208.86 75.11 T 69.68 68.5 506.9 318.86 R 0.5 H 2 Z N 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "3" 3 %%Page: "4" 4 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q 0 X 0 0 0 1 0 0 0 K 1.74 (unlik) 53.86 713.33 P 1.74 (ely to be in) 74.32 713.33 P 1.74 (v) 123.85 713.33 P 1.74 (olv) 128.65 713.33 P 1.74 (ed in an) 141.28 713.33 P 1.74 (y particular connection. The) 176.27 713.33 P 0.66 (e) 53.86 702.33 P 0.66 (xpansion list is essentially used to sort the track se) 58.15 702.33 P 0.66 (gments) 265.35 702.33 P 1 (in order of increasing distance to the sink, so that the \336rst) 53.86 691.33 P -0.04 (track se) 53.86 680.33 P -0.04 (gment remo) 84.49 680.33 P -0.04 (v) 132.34 680.33 P -0.04 (ed from the e) 137.19 680.33 P -0.04 (xpansion list is the closest) 189.96 680.33 P -0.23 (one to the sink. In the w) 53.86 669.33 P -0.23 (orst case, for an FPGA of containing) 148.73 669.33 P 0.04 (N logic blocks and a net with N sinks, the routing algorithm) 53.86 658.33 P 0.82 (w) 53.86 644.67 P 0.82 (ould e) 60.98 644.67 P 0.82 (xhibit O\050N) 86.36 644.67 P 1 8 Q 0.65 (2) 130.79 648.67 P 1 10 Q 0.82 (\051 beha) 134.79 644.67 P 0.82 (vior) 160.12 644.67 P 0.82 (. Since man) 175.68 644.67 P 0.82 (y circuits ha) 224.1 644.67 P 0.82 (v) 274.41 644.67 P 0.82 (e at) 279.26 644.67 P 0.75 (least a fe) 53.86 633.67 P 0.75 (w e) 90.64 633.67 P 0.75 (xtremely high f) 105.39 633.67 P 0.75 (anout nets, this typically slo) 168.45 633.67 P 0.75 (ws) 283.13 633.67 P (the router signi\336cantly) 53.86 622.67 T (.) 143.76 622.67 T 2.79 (T) 53.86 605.67 P 2.79 (o o) 59.17 605.67 P 2.79 (v) 74.31 605.67 P 2.79 (ercome this ef) 79.16 605.67 P 2.79 (fect, we de) 141.14 605.67 P 2.79 (vised a technique called) 190.06 605.67 P 2 F 1.47 (binning) 53.86 594.67 P 1 F 1.47 (. The k) 84.42 594.67 P 1.47 (e) 115.31 594.67 P 1.47 (y idea is that only the portions of the net) 119.6 594.67 P 1.85 (routed so f) 53.86 583.67 P 1.85 (ar which are closest to the current tar) 100.23 583.67 P 1.85 (get sink) 261 583.67 P -0.11 (need to be placed on the e) 53.86 572.67 P -0.11 (xpansion list. Figure) 156.9 572.67 P -0.11 (3 illustrates a) 241.13 572.67 P 1.37 (simple e) 53.86 561.67 P 1.37 (xample of the binning technique. In this e) 88.69 561.67 P 1.37 (xample) 264.8 561.67 P 0.57 (there are four bins, each containing one quarter of the total) 53.86 550.67 P 0.18 (track se) 53.86 539.67 P 0.18 (gments. A net with f) 84.71 539.67 P 0.18 (anout three is being routed, and) 167.26 539.67 P 2.57 (tw) 53.86 528.67 P 2.57 (o of the three sinks ha) 63.76 528.67 P 2.57 (v) 164.44 528.67 P 2.57 (e already been routed. When) 169.29 528.67 P 0.29 (routing the last sink, instead of placing the entire net on the) 53.86 517.67 P 0.02 (e) 53.86 506.67 P 0.02 (xpansion list, only those parts of the net in bin 4 are placed) 58.15 506.67 P 5.03 (on the e) 53.86 495.67 P 5.03 (xpansion list, thus reducing the number of) 95.43 495.67 P 2.31 (e) 53.86 484.67 P 2.31 (xpansion list operations. F) 58.15 484.67 P 2.31 (or relati) 170.49 484.67 P 2.31 (v) 203.93 484.67 P 2.31 (ely lo) 208.78 484.67 P 2.31 (w f) 233.34 484.67 P 2.31 (anout nets,) 248.6 484.67 P 3.56 (binning does not sa) 53.86 473.67 P 3.56 (v) 141.84 473.67 P 3.56 (e man) 146.69 473.67 P 3.56 (y e) 174.26 473.67 P 3.56 (xpansion list operations.) 189.61 473.67 P 2.78 (Ho) 53.86 462.67 P 2.78 (we) 65.83 462.67 P 2.78 (v) 77.24 462.67 P 2.78 (er) 82.09 462.67 P 2.78 (, when used on v) 89.46 462.67 P 2.78 (ery high f) 167.93 462.67 P 2.78 (anout nets, binning) 212.28 462.67 P 6.94 (signi\336cantly reduces the number of e) 53.86 451.67 P 6.94 (xpansion list) 236.45 451.67 P 1.85 (operations. W) 53.86 440.67 P 1.85 (e determined e) 111 440.67 P 1.85 (xperimentally that binning is) 173.42 440.67 P (most ef) 53.86 429.67 T (fecti) 83.33 429.67 T (v) 100.85 429.67 T (e for nets with f) 105.7 429.67 T (anout greater than 50.) 168.92 429.67 T 1.89 (There are tw) 53.86 218.71 P 1.89 (o k) 108.07 218.71 P 1.89 (e) 122.36 218.71 P 1.89 (y issues that ha) 126.65 218.71 P 1.89 (v) 192.95 218.71 P 1.89 (e to be addressed with) 197.8 218.71 P 1.58 (binning: the size of the bins, and what to do when a bin) 53.86 207.71 P 3 (containing a sink does not contain an) 53.86 196.71 P 3 (y part of a net\325) 220.03 196.71 P 3 (s) 290.35 196.71 P (routing.) 53.86 185.71 T 2 11 Q (Bin Size) 53.86 167.04 T 1 10 Q 2.01 (The bin size is v) 53.86 153.71 P 2.01 (ery important. If it is too small \050in the) 127.31 153.71 P 1.15 (e) 53.86 142.71 P 1.15 (xtreme case the se) 58.15 142.71 P 1.15 (gments in just 1 logic block tile\051, then) 134.49 142.71 P 2.6 (the quality of the routing de) 53.86 131.71 P 2.6 (grades since an insuf) 178.09 131.71 P 2.6 (\336cient) 269.24 131.71 P 2.22 (amount of the prior route is a) 53.86 120.71 P 2.22 (v) 183.66 120.71 P 2.22 (ailable as potential \322start) 188.41 120.71 P 0.61 (points\323 for the connection to the sink in that bin. If the bin) 53.86 109.71 P 0.17 (size is too lar) 53.86 98.71 P 0.17 (ge \050in the e) 107.24 98.71 P 0.17 (xtreme case the entire FPGA\051, then) 152.31 98.71 P 0.54 (unnecessary se) 53.86 87.71 P 0.54 (gments will be put on the e) 113.95 87.71 P 0.54 (xpansion list and) 225.37 87.71 P 1.59 (the routing time will increase. Since the a) 53.86 76.71 P 1.59 (v) 230.88 76.71 P 1.59 (erage distance) 235.73 76.71 P 4.18 (between sinks can v) 317.76 713.33 P 4.18 (ary for dif) 410.31 713.33 P 4.18 (ferent nets, our router) 458.96 713.33 P 0.95 (computes the proper bin size to use for each net. Before a) 317.76 702.33 P 0.83 (net is routed, the a) 317.76 691.33 P 0.83 (v) 394.48 691.33 P 0.83 (erage area per sink is calculated as the) 399.33 691.33 P 0.09 (area of the bounding box of the net terminals di) 317.76 680.33 P 0.09 (vided by the) 508.53 680.33 P 5.09 (number of sinks. W) 317.76 669.33 P 5.09 (e determined e) 411.11 669.33 P 5.09 (xperimentally that) 480 669.33 P 0.75 (choosing a bin size of four times the a) 317.76 658.33 P 0.75 (v) 475.79 658.33 P 0.75 (erage area per sink) 480.64 658.33 P (for each net pro) 317.76 647.33 T (vides the best results.) 380.64 647.33 T 2 11 Q (Empty Bins) 317.76 628.67 T 1 10 Q 0.37 (If the bin containing a sink does not contain an) 317.76 615.33 P 0.37 (y part of the) 508.43 615.33 P 3.46 (route so f) 317.76 604.33 P 3.46 (ar) 362.36 604.33 P 3.46 (, then the portions of the net in its eight) 369.73 604.33 P 3.58 (neighboring bins are added to the e) 317.76 593.33 P 3.58 (xpansion list. The) 479.6 593.33 P 1.35 (neighboring bins may contain parts of the route relati) 317.76 582.33 P 1.35 (v) 541.07 582.33 P 1.35 (ely) 545.92 582.33 P 2.09 (close to the tar) 317.76 571.33 P 2.09 (get sink. If the neighboring bins are also) 382.44 571.33 P 4.45 (empty) 317.76 560.33 P 4.45 (, then the entire e) 342.11 560.33 P 4.45 (xisting net is placed on the) 428.93 560.33 P (e) 317.76 549.33 T (xpansion list.) 322.05 549.33 T 0 F (2.3 Dif\336culty Prediction) 317.76 532.33 T 1 F 0.56 (A k) 317.76 518.33 P 0.56 (e) 332.95 518.33 P 0.56 (y aspect of high-speed routing is the ability to quickly) 337.24 518.33 P 1.21 (predict when the routing problem is v) 317.76 507.33 P 1.21 (ery hard \050and hence) 475.39 507.33 P 0.74 (will tak) 317.76 496.33 P 0.74 (e a longer time to complete\051 or impossible. In both) 348.69 496.33 P 1.65 (of these cases, it is important to inform the user that the) 317.76 485.33 P 1.97 (result will either be a long time coming, or simply isn\325) 317.76 474.33 P 1.97 (t) 555.36 474.33 P 1.82 (possible to achie) 317.76 463.33 P 1.82 (v) 387.82 463.33 P 1.82 (e. In order to predict these cases \050after) 392.67 463.33 P 2.79 (placement\051, we need to correlate routing dif) 317.76 452.33 P 2.79 (\336culty with) 509.51 452.33 P 1.47 (parameters that we can quickly determine from the tar) 317.76 441.33 P 1.47 (get) 545.92 441.33 P 2.82 (FPGA and the user circuit. F) 317.76 430.33 P 2.82 (or a gi) 446.69 430.33 P 2.82 (v) 477.63 430.33 P 2.82 (en circuit, with a) 482.48 430.33 P -0.22 (speci\336c placement, we de\336ne W) 317.76 419.33 P 1 8 Q -0.18 (min) 446.57 416.83 P 1 10 Q -0.22 ( as the minimum number) 459.02 419.33 P 0.5 (of tracks per channel that our router w) 317.76 406.5 P 0.5 (ould require in order) 474.17 406.5 P 1.34 (to successfully route the circuit. Let the number of tracks) 317.76 395.5 P -0.05 (per channel in the FPGA be W) 317.76 384.5 P 1 8 Q -0.04 (FPGA) 440.78 382 P 1 10 Q -0.05 (. T) 461.23 384.5 P -0.05 (able) 471.49 384.5 P -0.05 (1 gi) 490.65 384.5 P -0.05 (v) 505.63 384.5 P -0.05 (es a reliable) 510.48 384.5 P 3.94 (prediction of routing dif) 317.76 371.67 P 3.94 (\336culty in terms of W) 425.72 371.67 P 1 8 Q 3.15 (min) 524.81 369.17 P 1 10 Q 3.94 ( and) 537.26 371.67 P 0.65 (W) 317.76 358.83 P 1 8 Q 0.52 (FPGA) 327.2 356.33 P 1 10 Q 0.65 (. T) 347.65 358.83 P 0.65 (ypically) 358.61 358.83 P 0.65 (, when W) 390.18 358.83 P 1 8 Q 0.52 (FPGA) 430.08 356.33 P 1 10 Q 0.65 ( is 10% greater than W) 450.53 358.83 P 1 8 Q 0.52 (min) 545.69 356.33 P 1 10 Q 0.91 (then the routing problem is not dif) 317.76 346 P 0.91 (\336cult and can be solv) 460.21 346 P 0.91 (ed) 548.7 346 P 2.33 (v) 317.76 335 P 2.33 (ery quickly using the directed search approach. As the) 322.61 335 P 5.61 (number of tracks per channel decreases belo) 317.76 324 P 5.61 (w this) 528.36 324 P 0.05 (threshold, the problem rapidly becomes more dif) 317.76 313 P 0.05 (\336cult. Note) 513.09 313 P -0.01 (that this 10% \336gure is a rough estimate of when the onset of) 317.76 302 P (dif) 317.76 291 T (\336culty occurs, from e) 328.62 291 T (xperimental data.) 414.01 291 T 1.28 (Since W) 317.76 120 P 1 8 Q 1.03 (min) 353.21 117.5 P 1 10 Q 1.28 ( is not kno) 365.66 120 P 1.28 (wn before-hand, we need a method) 411.21 120 P 1.54 (for rapidly estimating W) 317.76 107.17 P 1 8 Q 1.23 (min) 420.99 104.67 P 1 10 Q 1.54 ( to mak) 433.44 107.17 P 1.54 (e an) 466.42 107.17 P 1.54 (y useful dif) 484.2 107.17 P 1.54 (\336culty) 532.58 107.17 P 0.96 (predictions from T) 317.76 94.34 P 0.96 (able) 393.87 94.34 P 0.96 (1. W) 413.03 94.34 P 0.96 (e call W) 432.63 94.34 P 1 8 Q 0.77 (estimate) 467.22 91.84 P 1 10 Q 0.96 ( the estimate of) 493.89 94.34 P 53.86 73.38 294.24 720 C 0 0 0 1 0 0 0 K 53.86 232.38 283.46 426.33 C 0 0 0 1 0 0 0 K 90.64 266.4 99.64 275.4 R 0.5 H 2 Z 0 X 0 0 0 1 0 0 0 K N 117.64 266.4 126.64 275.4 R N 144.64 266.4 153.64 275.4 R N 171.64 266.4 180.64 275.4 R N 198.64 266.4 207.64 275.4 R N 90.64 293.4 99.64 302.4 R N 117.64 293.4 126.64 302.4 R N 144.64 293.4 153.64 302.4 R N 171.64 293.4 180.64 302.4 R N 198.64 293.4 207.64 302.4 R N 90.64 320.4 99.64 329.4 R N 117.64 320.4 126.64 329.4 R N 144.64 320.4 153.64 329.4 R N 171.64 320.4 180.64 329.4 R N 198.64 320.4 207.64 329.4 R N 90.64 347.4 99.64 356.4 R N 117.64 347.4 126.64 356.4 R 3 X V 0 X N 144.64 347.4 153.64 356.4 R N 171.64 347.4 180.64 356.4 R N 198.64 347.4 207.64 356.4 R N 90.64 374.4 99.64 383.4 R N 117.64 374.4 126.64 383.4 R N 144.64 374.4 153.64 383.4 R N 171.64 374.4 180.64 383.4 R N 198.64 374.4 207.64 383.4 R 3 X V 0 X N 90.64 401.4 99.64 410.4 R N 144.64 401.4 153.64 410.4 R N 171.64 401.4 180.64 410.4 R N 198.64 401.4 207.64 410.4 R N 225.64 266.4 234.64 275.4 R N 225.64 293.4 234.64 302.4 R N 225.64 320.4 234.64 329.4 R N 225.64 347.4 234.64 356.4 R N 225.64 374.4 234.64 383.4 R N 225.64 401.4 234.64 410.4 R 3 X V 0 X N J 81.64 336.33 243.64 336.33 243.64 257.4 81.64 257.4 4 Y J 81.64 332.83 81.64 336.33 85.14 336.33 3 L 1 H N [6.739 6.739] 6.739 I 85.14 336.33 240.14 336.33 2 L N J 240.14 336.33 243.64 336.33 243.64 332.83 3 L N [6.539 6.539] 6.539 I 243.64 332.83 243.64 260.9 2 L N J 243.64 260.9 243.64 257.4 240.14 257.4 3 L N [6.739 6.739] 6.739 I 240.14 257.4 85.14 257.4 2 L N J 85.14 257.4 81.64 257.4 81.64 260.9 3 L N [6.539 6.539] 6.539 I 81.64 260.9 81.64 332.83 2 L N J 81.64 419.4 243.64 419.4 243.64 336.33 81.64 336.33 4 Y J 81.64 415.9 81.64 419.4 85.14 419.4 3 L N [6.739 6.739] 6.739 I 85.14 419.4 240.14 419.4 2 L N J 240.14 419.4 243.64 419.4 243.64 415.9 3 L N [6.915 6.915] 6.915 I 243.64 415.9 243.64 339.83 2 L N J 243.64 339.83 243.64 336.33 240.14 336.33 3 L N [6.739 6.739] 6.739 I 240.14 336.33 85.14 336.33 2 L N J 85.14 336.33 81.64 336.33 81.64 339.83 3 L N [6.915 6.915] 6.915 I 81.64 339.83 81.64 415.9 2 L N J 163.75 419 163.75 257 2 L J 163.75 419 163.75 415.5 2 L N [6.739 6.739] 6.739 I 163.75 415.5 163.75 260.5 2 L N J 163.75 260.5 163.75 257 2 L N J 108.64 273.33 108.64 365.71 2 L 3 H N 97.97 270.45 108.53 270.45 2 L N 109.75 365.56 202.86 365.56 2 L N 108.75 351.89 119.31 351.89 2 L N 203.42 375.71 203.42 365.71 2 L N 1 11 Q (Bin 1) 118.83 308.6 T (Bin 2) 200.86 308.82 T (Bin 4) 200.53 389.71 T (Bin 3) 120.75 388.93 T 4 10 Q (Figure 3. The Binning Technique) 80.62 236.78 T 118.33 401.49 127.33 410.49 R 0.5 H N 0 0 0 1 0 0 0 K 53.86 73.38 294.24 720 C 0 0 612 792 C 0 0 0 1 0 0 0 K 4 10 Q 0 X 0 0 0 1 0 0 0 K (De\336nition) 364.73 261 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Pr) 478.66 261 T (edictor) 489.03 261 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Classi\336cation) 333.23 229 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 407.82 241 T (ime) 414.31 241 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (\050seconds\051) 399.12 229 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 446.94 241 T (ypical Range of T) 452.87 241 T (racks) 527.41 241 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (P) 451.86 229 T (er Channel in FPGA) 457.77 229 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 F (Impossible) 339.9 213 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 415.51 213 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 467.86 210.33 T 1 8 Q (FPGA) 477.3 207.83 T 3 14 Q (<) 497.75 210.33 T 1 10 Q ( W) 505.43 210.33 T 1 8 Q (min) 517.37 207.83 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (Dif) 345.02 192.5 T (\336cult) 358.1 192.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (> 60) 409.77 192.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 466.36 189.83 T 1 8 Q (min) 475.8 187.33 T 3 14 Q (\243) 490.25 189.83 T 1 10 Q (W) 501.43 189.83 T 1 8 Q (FPGA) 510.87 187.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 3 14 Q (<) 476.55 174.33 T 1 10 Q ( 1.1W) 484.24 174.33 T 1 8 Q (min) 508.68 171.83 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (Lo) 339.61 156.5 T (w Stress) 350.47 156.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (< 60) 409.77 156.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 460.36 153.83 T 1 8 Q (FPGA) 469.8 151.33 T 3 14 Q (\263) 492.75 153.83 T 1 10 Q ( 1.1W) 500.43 153.83 T 1 8 Q (min) 524.87 151.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 10 Q (T) 361.6 137 T (able 1: De\336nition of Routing Classes) 367.35 137 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 328.84 275.42 328.84 146.92 2 L V 0.5 H 0 Z N 394.84 255.92 394.84 146.42 2 L V N 442.84 275.92 442.84 146.42 2 L V 3 H N 554.84 275.42 554.84 146.92 2 L V 0.5 H N 328.59 275.67 555.09 275.67 2 L V N 328.59 255.67 555.09 255.67 2 L V N 329.09 224.92 554.59 224.92 2 L V N 329.09 222.42 554.59 222.42 2 L V N 328.59 203.17 555.09 203.17 2 L V N 328.59 167.17 555.09 167.17 2 L V N 328.59 146.67 555.09 146.67 2 L V N 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "4" 4 %%Page: "5" 5 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q 0 X 0 0 0 1 0 0 0 K 1.64 (W) 53.86 713.33 P 1 8 Q 1.31 (min) 63.3 710.83 P 1 10 Q 1.64 (. In order to calculate W) 75.75 713.33 P 1 8 Q 1.31 (estimate) 180.49 710.83 P 1 10 Q 1.64 ( we use a placement) 207.15 713.33 P (wirelength model based on the approach of [Chen94].) 53.86 700.5 T 0.88 (The wirelength needed to route each net is estimated from) 53.86 683.5 P 0.57 (the half-perimeter of the bounding box of the net terminals) 53.86 672.5 P 6.17 (multiplied by a f) 53.86 661.5 P 6.17 (anout-based correction f) 138.65 661.5 P 6.17 (actor) 248.08 661.5 P 6.17 (. The) 267.52 661.5 P 0.22 (correction f) 53.86 650.5 P 0.22 (actor compensates for the f) 100.35 650.5 P 0.22 (act that the bounding) 209.42 650.5 P -0.22 (box half-perimeter underestimates wiring for nets with more) 53.86 639.5 P -0.12 (than 3 terminals. The correction f) 53.86 628.5 P -0.12 (actor is 1 for nets with 2 or) 187.03 628.5 P 1.03 (3 terminals and slo) 53.86 617.5 P 1.03 (wly increases with net f) 132.54 617.5 P 1.03 (anout, reaching) 231.55 617.5 P 0.54 (19 for nets with 3000 terminals. W) 53.86 606.5 P 0.54 (e can obtain an estimate) 195.99 606.5 P 0.21 (of the total wirelength by summing the e) 53.86 595.5 P 0.21 (xpected wirelength) 217.66 595.5 P (of each net.) 53.86 584.5 T 0.64 ([Chen94] contains correction f) 53.86 567.5 P 0.64 (actors for nets with up to 50) 178.16 567.5 P 2.06 (terminals; we re-print them in T) 53.86 556.5 P 2.06 (able) 191.38 556.5 P 2.06 (2. T) 210.54 556.5 P 2.06 (o determine the) 227.91 556.5 P 2.75 (correction f) 53.86 545.5 P 2.75 (actors for higher f) 102.88 545.5 P 2.75 (anout nets, we routed the) 182.96 545.5 P 0.79 (lar) 53.86 534.5 P 0.79 (ger MCNC benchmark circuits ignoring congestion, and) 64.23 534.5 P 0.26 (recorded the actual wirelength for each net. By di) 53.86 523.5 P 0.26 (viding the) 253.7 523.5 P 1.39 (actual wirelength by the bounding box half perimeter) 53.86 512.5 P 1.39 (, we) 276.19 512.5 P 0.19 (obtained a) 53.86 501.5 P 0.19 (v) 95.23 501.5 P 0.19 (erage correction f) 100.08 501.5 P 0.19 (actors for nets with up to 3000) 170.88 501.5 P 3.17 (terminals. Instead of storing discrete v) 53.86 490.5 P 3.17 (alues for all the) 222.79 490.5 P 0.47 (correction f) 53.86 479.5 P 0.47 (actors for nets with 50 to 3000 terminals, we \336t) 100.6 479.5 P 1.42 (equations \0502\051 and \0503\051 to the data. In \0502\051 and \0503\051, C is the) 53.86 468.5 P 1.95 (correction f) 53.86 457.5 P 1.95 (actor and k is the number of terminals. W) 102.08 457.5 P 1.95 (ith) 283.68 457.5 P -0.16 (these correction f) 53.86 446.5 P -0.16 (actors, our estimate of total wirelength w) 122.85 446.5 P -0.16 (as) 285.91 446.5 P 0.15 (within 5% of the actual wirelength for all of our benchmark) 53.86 435.5 P 6.78 (circuits. Simply linearly e) 53.86 424.5 P 6.78 (xtrapolating the [Chen94]) 177.37 424.5 P 1.45 (correction f) 53.86 413.5 P 1.45 (actors led to estimates of total wirelength that) 101.58 413.5 P (were up to 25% to high.) 53.86 402.5 T (C\050k\051 = 0.026\341k + 1.49) 86.94 196.5 T (for 50 < k < 85) 189.05 196.5 T (\0502\051) 282.58 196.5 T (C\050k\051 = -0.0000018\341k) 62.25 173.83 T 1 8 Q (2) 144.55 177.83 T 1 10 Q ( + 0.011\341k + 2.79) 148.55 173.83 T (for k) 232.33 173.83 T 3 14 Q (\263) 253.99 173.83 T 1 10 Q ( 85) 261.68 173.83 T (\0503\051) 282.58 173.83 T -0.01 (An FPGA consisting of N logic blocks contains 2\341N\341W) 53.86 156.5 P 1 8 Q -0.01 (FPGA) 273.79 154 P 1 10 Q 0.29 (track se) 53.86 143.67 P 0.29 (gments. Consequently) 84.82 143.67 P 0.29 (, we can estimate the required) 173.36 143.67 P (channel width to route as:) 53.86 132.67 T (W) 68.41 109 T 1 8 Q (estimate) 77.21 106.5 T 1 10 Q ( =) 103.87 109 T 3 14 Q (\351) 114.51 109 T 1 10 Q (total estimated wirelength / \0502\341N\341U\051) 119.89 109 T 3 14 Q (\371) 262.65 109 T 1 10 Q (\0504\051) 282.58 109 T 1.61 (U is the \322track se) 53.86 91.17 P 1.61 (gment utilization\323 -- the fraction of the) 129.03 91.17 P 1.28 (total number of track se) 53.86 80.17 P 1.28 (gments in the FPGA that a router) 153.8 80.17 P 5.26 (can typically use before congestion results in some) 317.76 713.33 P -0.23 (unroutable nets. W) 317.76 702.33 P -0.23 (e ha) 392.33 702.33 P -0.23 (v) 408.28 702.33 P -0.23 (e determined e) 413.13 702.33 P -0.23 (xperimentally that for) 471.39 702.33 P 2.74 (our router tar) 317.76 691.33 P 2.74 (geting the FPGA architecture described in) 375.83 691.33 P (Section) 317.76 680.33 T (3.1, U is 0.56.) 350.26 680.33 T 0.06 (Since we kno) 317.76 663.33 P 0.06 (w W) 371.51 663.33 P 1 8 Q 0.05 (FPGA) 390.73 660.83 P 1 10 Q 0.06 ( before routing a circuit and we ha) 411.18 663.33 P 0.06 (v) 548.85 663.33 P 0.06 (e) 553.7 663.33 P 0.43 (a method to calculate W) 317.76 650.5 P 1 8 Q 0.34 (estimate) 416.04 648 P 1 10 Q 0.43 ( from the placement, we can) 442.7 650.5 P (use T) 317.76 637.67 T (able) 338.9 637.67 T (1 to predict the dif) 358.06 637.67 T (\336culty of a routing problem.) 431.69 637.67 T 0 F (3. Results) 317.76 620.67 T 1 F 1.05 (In this section we describe se) 317.76 605.67 P 1.05 (v) 439.7 605.67 P 1.05 (eral e) 444.55 605.67 P 1.05 (xperiments comparing) 467.38 605.67 P 1 (the ne) 317.76 594.67 P 1 (w router with VPR [Betz97] and illustrate its speed,) 342.67 594.67 P 10.75 (near) 317.76 583.67 P 10.75 (-linear comple) 334.77 583.67 P 10.75 (xity) 403.41 583.67 P 10.75 (, the ef) 418.32 583.67 P 10.75 (fecti) 467.06 583.67 P 10.75 (v) 484.58 583.67 P 10.75 (eness of the) 489.43 583.67 P (enhancements, and dif) 317.76 572.67 T (\336culty prediction.) 407.21 572.67 T 0 F (3.1 FPGA Ar) 317.76 555.67 T (c) 378.69 555.67 T (hitecture) 384.15 555.67 T 1 F 1.34 (W) 317.76 541.67 P 1.34 (e emplo) 326.4 541.67 P 1.34 (yed an island style architecture with unit-length) 359.58 541.67 P 1.15 (track se) 317.76 530.67 P 1.15 (gments, connection block \337e) 349.59 530.67 P 1.15 (xibility F) 467.89 530.67 P 1 8 Q 0.92 (c) 506.01 528.17 P 1 10 Q 1.15 ( = W and a) 509.56 530.67 P -0.15 (switch block \337e) 317.76 517.83 P -0.15 (xibility of F) 380.64 517.83 P 1 8 Q -0.12 (s) 428.14 515.33 P 1 10 Q -0.15 (= 3. The logic block consists of) 433.13 517.83 P 1.59 (a 4-input look-up table and a single D \337ip-\337op [Betz97].) 317.76 505 P 4.35 (The switch block used w) 317.76 494 P 4.35 (as the W) 434.49 494 P 4.35 (ilton switch block) 477.77 494 P 0.92 ([W) 317.76 483 P 0.92 (ilt97], which is a non-planar switch block that pro) 330.13 483 P 0.92 (vides) 537.03 483 P (impro) 317.76 472 T (v) 341.5 472 T (ed routability) 346.35 472 T (.) 399.31 472 T 0 F (3.2 Benc) 317.76 455 T (hmark Cir) 361.57 455 T (cuits) 408.05 455 T 1 F 1.89 (The benchmark circuits used are listed in T) 317.76 441 P 1.89 (able) 503.21 441 P 1.89 (3. These) 522.37 441 P 0.14 (come from three sources, tw) 317.76 430 P 0.14 (o of which are the MCNC suite) 431.79 430 P 1.16 ([Y) 317.76 419 P 1.16 (ang91], and the RA) 327.31 419 P 1.16 (W benchmark suite [Babb97]. Since) 408.23 419 P 0.69 (we are principally interested in lar) 317.76 408 P 0.69 (ge circuits, we also used) 457.92 408 P 0.95 (the synthetic benchmark circuit generator de) 317.76 397 P 0.95 (v) 500.29 397 P 0.95 (eloped at the) 505.14 397 P 0.92 (Uni) 317.76 386 P 0.92 (v) 332.51 386 P 0.92 (ersity of T) 337.36 386 P 0.92 (oronto [Hutt97] to create se) 380.07 386 P 0.92 (v) 494.03 386 P 0.92 (eral v) 498.88 386 P 0.92 (ery lar) 522.14 386 P 0.92 (ge) 548.7 386 P 5.12 (benchmarks. Although the latter circuits are actually) 317.76 375 P 0.84 (some) 317.76 364 P 0.84 (what more dif) 338.62 364 P 0.84 (\336cult than real circuits, we belie) 396.16 364 P 0.84 (v) 528.44 364 P 0.84 (e the) 533.29 364 P 0.84 (y) 553.14 364 P 2.62 (are perfectly reasonable test cases for the compile time) 317.76 353 P (issue.) 317.76 342 T 3.03 (Each of the MCNC and RA) 317.76 325 P 3.03 (W benchmark circuits w) 442.81 325 P 3.03 (as) 549.81 325 P 0.81 (synthesized with the SIS [Sent92] package and technology) 317.76 314 P 0.58 (mapped using Flo) 317.76 303 P 0.58 (wmap [Cong94]. These were pack) 390.36 303 P 0.58 (ed into) 530.06 303 P 0.56 (logic blocks using VP) 317.76 292 P 0.56 (A) 406.59 292 P 0.56 (CK [Betz97]. The synthetic circuits) 413.41 292 P 3.35 (were only pack) 317.76 281 P 3.35 (ed into the logic blocks using VP) 385.46 281 P 3.35 (A) 537.43 281 P 3.35 (CK) 544.25 281 P 0.32 ([Betz97] as the) 317.76 270 P 0.32 (y are generated in technology-mapped form.) 378.8 270 P 1.9 (The circuits range in size from 3,556 logic blocks up to) 317.76 259 P (19,600 logic blocks.) 317.76 248 T 1.08 (Each circuit w) 317.76 231 P 1.08 (as placed using the VPR tool, which uses a) 377.58 231 P 2.52 (simulated-annealing algorithm [Betz97]. T) 317.76 220 P 2.52 (able) 495.61 220 P 2.52 (3 lists the) 514.77 220 P 0.04 (minimum number of tracks per channel required by the ne) 317.76 209 P 0.04 (w) 550.92 209 P 0.47 (router and VPR. F) 317.76 198 P 0.47 (or both placement and routing, VPR w) 392.36 198 P 0.47 (as) 549.81 198 P 0.13 (run using the \322f) 317.76 187 P 0.13 (ast\323 to \337ag reduce the run-time while gi) 380.55 187 P 0.13 (ving) 540.36 187 P -0.14 (up a small amount of quality) 317.76 176 P -0.14 (. VPR currently holds the w) 431.15 176 P -0.14 (orld) 542.03 176 P 0.76 (record for track count on a number of standard benchmark) 317.76 165 P 2.65 (circuits when run without the \322f) 317.76 154 P 2.65 (ast\323 \337ag. Our router is) 458.39 154 P 0.14 (clearly of high quality) 317.76 143 P 0.14 (, since it is on a) 406.13 143 P 0.14 (v) 468.84 143 P 0.14 (erage only 2% w) 473.69 143 P 0.14 (orse) 541.48 143 P (than VPR for minimizing track count.) 317.76 132 T 0 F (3.3 Routing Time) 317.76 115 T 1 F 1.25 (In this section we establish the speed of the router o) 317.76 101 P 1.25 (v) 537.33 101 P 1.25 (er a) 542.18 101 P 0.57 (range of track counts. T) 317.76 90 P 0.57 (able) 414.48 90 P 0.57 (4 lists the track counts and the) 433.64 90 P 0.82 (time it took the ne) 317.76 79 P 0.82 (w router to route each circuit. The track) 393.57 79 P 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 F (Num) 80.88 372.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 69.95 360.5 T (erminals) 75.7 360.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Corr) 125.2 372.5 T (ection) 146.12 372.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (F) 134.4 360.5 T (actor) 140.26 360.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Num) 194.88 372.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 183.95 360.5 T (erminals) 189.7 360.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Corr) 239.2 372.5 T (ection) 260.12 372.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (F) 248.4 360.5 T (actor) 254.26 360.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 F (1 ~ 3) 81.23 344.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (1.00) 139.68 344.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15) 200.43 344.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (1.69) 253.68 344.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (4) 88.93 328.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (1.08) 139.68 328.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (20) 200.43 328.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (1.89) 253.68 328.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (5) 88.93 312.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (1.15) 139.68 312.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (25) 200.43 312.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (2.07) 253.68 312.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (6) 88.93 296.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (1.22) 139.68 296.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (30) 200.43 296.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (2.23) 253.68 296.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (7) 88.93 280.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (1.28) 139.68 280.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (35) 200.43 280.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (2.39) 253.68 280.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (8) 88.93 264.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (1.34) 139.68 264.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (40) 200.43 264.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (2.54) 253.68 264.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (9) 88.93 248.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (1.40) 139.68 248.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (45) 200.43 248.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (2.66) 253.68 248.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (10) 86.43 232.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (1.45) 139.68 232.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (50) 200.43 232.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (2.79) 253.68 232.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 F (T) 79.6 217.5 T (able 2: Corr) 85.35 217.5 T (ection F) 137.38 217.5 T (actors up to 50 [Chen94]) 171.29 217.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 63.94 386.92 63.94 227.42 2 L V 0.5 H 0 Z N 118.93 387.42 118.93 226.92 2 L V N 177.93 387.42 177.93 226.92 2 L V 3 H N 232.93 387.42 232.93 226.92 2 L V 0.5 H N 291.93 386.92 291.93 227.42 2 L V N 63.69 387.17 292.18 387.17 2 L V N 64.18 356.42 291.68 356.42 2 L V N 64.18 353.92 291.68 353.92 2 L V N 63.69 339.17 292.18 339.17 2 L V N 63.69 323.17 292.18 323.17 2 L V N 63.69 307.17 292.18 307.17 2 L V N 63.69 291.17 292.18 291.17 2 L V N 63.69 275.17 292.18 275.17 2 L V N 63.69 259.17 292.18 259.17 2 L V N 63.69 243.17 292.18 243.17 2 L V N 63.69 227.17 292.18 227.17 2 L V N 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "5" 5 %%Page: "6" 6 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q 0 X 0 0 0 1 0 0 0 K 2.38 (counts range from W) 53.86 409.32 P 1 8 Q 1.9 (min) 145.7 406.82 P 1 10 Q 2.38 ( up to W) 158.15 409.32 P 1 8 Q 1.9 (min) 200.01 406.82 P 1 10 Q 2.38 (+) 214.96 409.32 P 2.38 (40%. Recall that) 223.1 409.32 P 2.03 (W) 53.86 396.49 P 1 8 Q 1.62 (min) 63.3 393.99 P 1 10 Q 2.03 ( is the minimum number of tracks per channel our) 75.75 396.49 P 0.25 (router needs to successfully route a circuit. Ex) 53.86 383.66 P 0.25 (ecution times) 240.38 383.66 P 1.78 (were measured on a 300 MHz UltraSP) 317.76 713.32 P 1.78 (ARC 3200 with 1) 481.95 713.32 P 0.5 (GByte of memory) 317.76 702.32 P 0.5 (, and do not include the time to parse the) 390.88 702.32 P 0.08 (netlist and generate the routing graph. F) 317.76 691.32 P 0.08 (or the lar) 477.81 691.32 P 0.08 (gest circuit) 513.9 691.32 P 1.36 (the parse and graph generation time w) 317.76 680.32 P 1.36 (as 20 seconds. The) 478.54 680.32 P (lar) 317.76 669.32 T (gest circuit \050beast20K\051 required 200 MBytes of memory) 328.13 669.32 T (.) 552.72 669.32 T 0.28 (Notice that we ha) 317.76 652.32 P 0.28 (v) 388.68 652.32 P 0.28 (e not yet achie) 393.53 652.32 P 0.28 (v) 452.17 652.32 P 0.28 (ed our informal goal of a) 457.02 652.32 P 0.06 (10 second routing time for a 20,000 logic block circuit, as it) 317.76 641.32 P 0.69 (requires 23 seconds to route the circuit beast20k with 30%) 317.76 630.32 P (e) 317.76 619.32 T (xtra tracks, b) 322.05 619.32 T (ut we\325) 373.78 619.32 T (re getting close.) 398.55 619.32 T 0.61 (It is instructi) 317.76 602.32 P 0.61 (v) 369.3 602.32 P 0.61 (e to observ) 374.15 602.32 P 0.61 (e ho) 419.1 602.32 P 0.61 (w the routing time of the ne) 436.4 602.32 P 0.61 (w) 550.92 602.32 P 4.78 (router changes as the a) 317.76 591.32 P 4.78 (v) 427.78 591.32 P 4.78 (ailable track count, W) 432.53 591.32 P 1 8 Q 3.83 (FPGA) 535.19 588.82 P 1 10 Q 4.78 (,) 555.64 591.32 P 0.29 (increases. Figure) 317.76 578.49 P 0.29 (4 plots the routing time for the ne) 388.31 578.49 P 0.29 (w router) 524.25 578.49 P -0.09 (and VPR v) 317.76 567.49 P -0.09 (ersus the number of tracks a) 361.32 567.49 P -0.09 (v) 473.13 567.49 P -0.09 (ailable, for the 8383) 477.88 567.49 P 2.74 (logic block circuit clma. It is clear that once there are) 317.76 556.49 P 0.05 (suf) 317.76 545.49 P 0.05 (\336cient tracks the ne) 329.73 545.49 P 0.05 (w router completely routes the circuit) 407.66 545.49 P 1.56 (in about 6 seconds, independent of the number of tracks.) 317.76 534.49 P 0.93 (The speedup as W) 317.76 523.49 P 1 8 Q 0.74 (FPGA) 394.13 520.99 P 1 10 Q 0.93 ( increases comes from tw) 414.58 523.49 P 0.93 (o f) 519.83 523.49 P 0.93 (actors:) 531.48 523.49 P 1.36 (fe) 317.76 510.66 P 1.36 (wer routing iterations \050e) 325.28 510.66 P 1.36 (v) 425.49 510.66 P 1.36 (entually) 430.34 510.66 P 1.36 (, only 1\051 are needed to) 461.91 510.66 P -0.2 (resolv) 317.76 499.66 P -0.2 (e congestion; and the directed search can more rapidly) 342.05 499.66 P 2.61 (route each net when there is little congestion to detour) 317.76 488.66 P -0.07 (around. Observ) 317.76 477.66 P -0.07 (e that the VPR router tak) 379.19 477.66 P -0.07 (es a great deal more) 478.45 477.66 P 0.76 (time, and the time increases as W) 317.76 466.66 P 1 8 Q 0.61 (FPGA) 456.46 464.16 P 1 10 Q 0.76 ( increases \050for lar) 476.91 466.66 P 0.76 (ge) 548.7 466.66 P 1.88 (W) 317.76 453.82 P 1 8 Q 1.5 (FPGA) 327.2 451.32 P 1 10 Q 1.88 (\051 because of the breadth-\336rst search nature of the) 347.65 453.82 P (VPR router) 317.76 440.99 T (.) 363.04 440.99 T 0 F (3.4 Experimental Comple) 317.76 423.99 T (xity Measurement) 439.32 423.99 T 1 F 0.77 (A k) 317.76 409.99 P 0.77 (e) 333.16 409.99 P 0.77 (y goal for the high-speed routing project is to achie) 337.45 409.99 P 0.77 (v) 548.85 409.99 P 0.77 (e) 553.7 409.99 P 0.35 (linear time comple) 317.76 398.99 P 0.35 (xity for lo) 393.31 398.99 P 0.35 (w stress situations, with a v) 433.76 398.99 P 0.35 (ery) 545.37 398.99 P -0.11 (small linearity constant. Figure) 317.76 387.99 P -0.11 (5 sho) 444.38 387.99 P -0.11 (ws a graph of the W) 465.42 387.99 P 1 8 Q -0.09 (min) 545.69 385.49 P 1 10 Q 0.66 (+ 40% routing times v) 317.76 375.16 P 0.66 (ersus the number of logic blocks for) 409.77 375.16 P 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Circuit) 67.66 709.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Source) 113.16 709.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Num.) 152.8 709.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K -0.17 (Logic) 152.38 698.32 P 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Blocks) 150.16 687.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Ne) 189.87 709.32 T (w Router) 201.28 709.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Min. T) 191.73 698.32 T (rack) 219.16 698.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Count \050W) 186.3 687.32 T 1 8 Q (min) 226.02 684.82 T 1 10 Q (\051) 238.47 687.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (VPR Min) 250.24 709.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 258.06 698.32 T (rack) 263.82 698.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Count) 257.32 687.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast10k) 63.77 660.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (GEN) 116.77 660.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (9800) 154.05 660.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (22) 209.05 660.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (22) 264.55 660.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast12k) 63.77 644.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (GEN) 116.77 644.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (11760) 151.55 644.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (23) 209.05 644.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (23) 264.55 644.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast14k) 63.77 628.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (GEN) 116.77 628.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (13720) 151.55 628.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (26) 209.05 628.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (24) 264.55 628.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast16k) 63.77 612.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (GEN) 116.77 612.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15680) 151.55 612.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (23) 209.05 612.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (23) 264.55 612.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast18k) 63.77 596.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (GEN) 116.77 596.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (17640) 151.55 596.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (26) 209.05 596.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (25) 264.55 596.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast20k) 63.77 580.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (GEN) 116.77 580.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (19600) 151.55 580.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (30) 209.05 580.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (29) 264.55 580.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (b) 59.29 564.32 T (ubble sort) 64.09 564.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (RA) 115.83 564.32 T (W) 128.82 564.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12293) 151.55 564.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (10) 209.05 564.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (9) 267.05 564.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (clma) 71.83 548.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (MCNC) 112.32 548.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (8383) 154.05 548.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 209.05 548.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 264.55 548.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (elliptic) 67.66 532.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (MCNC) 112.32 532.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (3604) 154.05 532.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 209.05 532.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 264.55 532.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (e) 66.9 516.32 T (x1010) 71.19 516.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (MCNC) 112.32 516.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (4598) 154.05 516.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (14) 209.05 516.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (13) 264.55 516.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (frisc) 72.66 500.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (MCNC) 112.32 500.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (3556) 154.05 500.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 209.05 500.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 264.55 500.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (pdc) 74.33 484.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (MCNC) 112.32 484.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (4575) 154.05 484.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (16) 209.05 484.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (16) 264.55 484.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (s38417) 67.1 468.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (MCNC) 112.32 468.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (6406) 154.05 468.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (8) 211.55 468.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (9) 267.05 468.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (s38584.1) 63.35 452.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (MCNC) 112.32 452.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (6447) 154.05 452.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (9) 211.55 452.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (9) 267.05 452.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (spla) 73.49 436.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (MCNC) 112.32 436.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (3690) 154.05 436.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (14) 209.05 436.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (14) 264.55 436.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 F (T) 100.71 421.32 T (able 3: Benchmark Cir) 106.46 421.32 T (cuits Data) 204.33 421.32 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 55.05 719.74 55.05 431.24 2 L V 0.5 H 0 Z N 108.05 720.24 108.05 430.74 2 L V N 146.05 720.24 146.05 430.74 2 L V N 182.05 720.24 182.05 430.74 2 L V N 246.05 720.24 246.05 430.74 2 L V N 293.05 719.74 293.05 431.24 2 L V N 54.8 719.99 293.3 719.99 2 L V N 55.3 672.24 292.8 672.24 2 L V N 55.3 669.74 292.8 669.74 2 L V N 54.8 654.99 293.3 654.99 2 L V N 54.8 638.99 293.3 638.99 2 L V N 54.8 622.99 293.3 622.99 2 L V N 54.8 606.99 293.3 606.99 2 L V N 54.8 590.99 293.3 590.99 2 L V N 54.8 574.99 293.3 574.99 2 L V N 54.8 558.99 293.3 558.99 2 L V N 54.8 542.99 293.3 542.99 2 L V N 54.8 526.99 293.3 526.99 2 L V N 54.8 510.99 293.3 510.99 2 L V N 54.8 494.99 293.3 494.99 2 L V N 54.8 478.99 293.3 478.99 2 L V N 54.8 462.99 293.3 462.99 2 L V N 54.8 446.99 293.3 446.99 2 L V N 54.8 430.99 293.3 430.99 2 L V N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 F (W) 144.32 354.62 T 1 8 Q (min) 153.76 352.12 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (W) 222.34 354.62 T 1 8 Q (min) 231.77 352.12 T 1 10 Q (+10%) 244.22 354.62 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 312.33 354.62 T 1 8 Q (min) 321.77 352.12 T 1 10 Q (+20%) 334.22 354.62 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 402.33 354.62 T 1 8 Q (min) 411.77 352.12 T 1 10 Q (+30%) 424.22 354.62 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 492.33 354.62 T 1 8 Q (min) 501.77 352.12 T 1 10 Q (+40%) 514.22 354.62 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Circuit) 67.87 336.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 121.28 336.79 T (rack) 127.04 336.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Count) 120.54 325.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 167.38 336.79 T (ime) 173.14 336.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (\050s\051) 172.49 325.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 211.28 336.79 T (rack) 217.04 336.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Count) 210.54 325.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 257.38 336.79 T (ime) 263.14 336.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (\050s\051) 262.49 325.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 301.28 336.79 T (rack) 307.04 336.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Count) 300.54 325.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 347.38 336.79 T (ime) 353.14 336.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (\050s\051) 352.49 325.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 391.28 336.79 T (rack) 397.04 336.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Count) 390.54 325.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 437.38 336.79 T (ime) 443.14 336.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (\050s\051) 442.49 325.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 481.28 336.79 T (rack) 487.04 336.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Count) 480.54 325.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 527.38 336.79 T (ime) 533.14 336.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (\050s\051) 532.49 325.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast10k) 63.99 309.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (22) 127.76 309.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (96) 172.76 309.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (25) 217.76 309.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (30) 262.76 309.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (27) 307.76 309.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (18) 352.76 309.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (29) 397.76 309.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (8) 445.26 309.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (31) 487.76 309.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (9) 535.26 309.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast12k) 63.99 293.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (23) 127.76 293.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (372) 170.26 293.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (26) 217.76 293.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (41) 262.76 293.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (28) 307.76 293.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (24) 352.76 293.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (30) 397.76 293.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 442.76 293.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (33) 487.76 293.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 532.76 293.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast14k) 63.99 277.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (26) 127.76 277.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (175) 170.26 277.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (29) 217.76 277.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (31) 262.76 277.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (32) 307.76 277.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15) 352.76 277.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (34) 397.76 277.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15) 442.76 277.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (37) 487.76 277.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (16) 532.76 277.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast16k) 63.99 261.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (23) 127.76 261.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (291) 170.26 261.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (26) 217.76 261.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (63) 262.76 261.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (28) 307.76 261.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (30) 352.76 261.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (30) 397.76 261.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (14) 442.76 261.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (33) 487.76 261.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (14) 532.76 261.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast18k) 63.99 245.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (26) 127.76 245.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (330) 170.26 245.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (29) 217.76 245.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (39) 262.76 245.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (32) 307.76 245.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (19) 352.76 245.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (34) 397.76 245.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (18) 442.76 245.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (37) 487.76 245.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (20) 532.76 245.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast20k) 63.99 229.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (30) 127.76 229.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (430) 170.26 229.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (33) 217.76 229.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (83) 262.76 229.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (36) 307.76 229.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (50) 352.76 229.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (39) 397.76 229.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (23) 442.76 229.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (42) 487.76 229.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (24) 532.76 229.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (b) 59.5 213.79 T (ubble sort) 64.3 213.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (10) 127.76 213.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (56) 172.76 213.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (11) 217.76 213.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (16) 262.76 213.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 307.76 213.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (10) 352.76 213.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (13) 397.76 213.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (11) 442.76 213.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (14) 487.76 213.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (5) 535.26 213.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (clma) 72.04 197.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 127.76 197.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (909) 170.26 197.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (14) 217.76 197.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (33) 262.76 197.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15) 307.76 197.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (36) 352.76 197.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (16) 397.76 197.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 442.76 197.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (17) 487.76 197.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (6) 535.26 197.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (elliptic) 67.87 181.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 127.76 181.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (34) 172.76 181.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (14) 217.76 181.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (7) 265.26 181.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15) 307.76 181.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (4) 355.26 181.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (16) 397.76 181.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (2) 445.26 181.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (17) 487.76 181.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (2) 535.26 181.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (e) 67.12 165.79 T (x1010) 71.41 165.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (14) 127.76 165.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (31) 172.76 165.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (16) 217.76 165.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (8) 265.26 165.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (17) 307.76 165.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (5) 355.26 165.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (19) 397.76 165.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (2) 445.26 165.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (20) 487.76 165.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (2) 535.26 165.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (frisc) 72.88 149.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 127.76 149.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (173) 170.26 149.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (14) 217.76 149.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15) 262.76 149.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15) 307.76 149.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (7) 355.26 149.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (16) 397.76 149.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (5) 445.26 149.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (17) 487.76 149.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (2) 535.26 149.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (pdc) 74.54 133.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (16) 127.76 133.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (928) 170.26 133.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (18) 217.76 133.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (17) 262.76 133.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (20) 307.76 133.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (8) 355.26 133.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (21) 397.76 133.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (8) 445.26 133.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (23) 487.76 133.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (4) 535.26 133.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (s38417) 67.32 117.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (8) 130.26 117.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (79) 172.76 117.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (9) 220.26 117.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15) 262.76 117.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (10) 307.76 117.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (8) 355.26 117.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (11) 397.76 117.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (5) 445.26 117.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 487.76 117.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (3) 535.26 117.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (s38584.1) 63.57 101.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (9) 130.26 101.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (33) 172.76 101.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (10) 217.76 101.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (16) 262.76 101.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (11) 307.76 101.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (19) 352.76 101.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (12) 397.76 101.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (9) 445.26 101.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (13) 487.76 101.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (4) 535.26 101.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (spla) 73.71 85.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (14) 127.76 85.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (91) 172.76 85.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (16) 217.76 85.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (11) 262.76 85.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (17) 307.76 85.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (5) 355.26 85.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (19) 397.76 85.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (2) 445.26 85.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (20) 487.76 85.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (2) 535.26 85.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 F (T) 256.89 67.79 T (able 4: Routing T) 262.64 67.79 T (imes) 337.19 67.79 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 53.26 365.04 53.26 80.7 2 L V N 110.26 365.54 110.26 80.2 2 L V N 155.26 318.95 155.26 80.2 2 L V N 200.26 365.54 200.26 80.2 2 L V N 245.26 318.95 245.26 80.2 2 L V N 290.26 365.54 290.26 80.2 2 L V N 335.26 318.95 335.26 80.2 2 L V N 380.26 365.54 380.26 80.2 2 L V N 425.26 318.95 425.26 80.2 2 L V N 470.26 365.54 470.26 80.2 2 L V N 515.26 318.95 515.26 80.2 2 L V N 560.26 365.04 560.26 80.7 2 L V N 53.01 365.29 560.51 365.29 2 L V N 53.51 321.7 560.01 321.7 2 L V N 53.51 319.2 560.01 319.2 2 L V N 53.01 304.45 560.51 304.45 2 L V N 53.01 288.45 560.51 288.45 2 L V N 53.01 272.45 560.51 272.45 2 L V N 53.01 256.45 560.51 256.45 2 L V N 53.01 240.45 560.51 240.45 2 L V N 53.01 224.45 560.51 224.45 2 L V N 53.01 208.45 560.51 208.45 2 L V N 53.01 192.45 560.51 192.45 2 L V N 53.01 176.45 560.51 176.45 2 L V N 53.01 160.45 560.51 160.45 2 L V N 53.01 144.45 560.51 144.45 2 L V N 53.01 128.45 560.51 128.45 2 L V N 53.01 112.45 560.51 112.45 2 L V N 53.01 96.45 560.51 96.45 2 L V N 53.01 80.45 560.51 80.45 2 L V N 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "6" 6 %%Page: "7" 7 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q 0 X 0 0 0 1 0 0 0 K 1.74 (all of the benchmark circuits. The dashed line sho) 53.86 437.87 P 1.74 (ws the) 266.67 437.87 P 0.66 (least-squares line that best \336ts the data. The \336tted equation) 53.86 426.87 P (of the line is:) 53.86 415.87 T (run time = 0.0011\341N -1.2) 118.32 394.87 T (\0505\051) 282.58 394.87 T 2.33 (where) 53.86 378.87 P 4 F 2.33 ( N) 78.29 378.87 P 1 F 2.33 ( is the number of logic blocks. The correlation) 90.34 378.87 P 2.04 (coef) 53.86 367.87 P 2.04 (\336cient for this linear approximation is 0.95, strongly) 70.82 367.87 P 1.09 (suggesting that the run time is indeed essentially linear) 53.86 356.87 P 1.09 (. If) 281.48 356.87 P 0.68 (we use the time-constant of \0505\051, 0.0011, we can ef) 53.86 345.87 P 0.68 (fecti) 259.65 345.87 P 0.68 (v) 277.17 345.87 P 0.68 (ely) 282.02 345.87 P (route 55,000 logic blocks per minute.) 53.86 334.87 T 0 F (3.5 Eff) 53.86 317.87 T (ectiveness of Enhancements) 86.55 317.87 T 1 F 2.69 (In order to measure the ef) 53.86 303.87 P 2.69 (fecti) 170.1 303.87 P 2.69 (v) 187.62 303.87 P 2.69 (eness of the tw) 192.47 303.87 P 2.69 (o router) 260.16 303.87 P 2.8 (enhancements, directed search and binning, each of the) 53.86 292.87 P 0.23 (benchmark circuits w) 53.86 281.87 P 0.23 (as routed using three dif) 140.31 281.87 P 0.23 (ferent routers:) 237.63 281.87 P 2.15 (\050i\051 the VPR breadth-\336rst router) 53.86 270.87 P 2.15 (, \050ii\051 the ne) 185.95 270.87 P 2.15 (w router with) 236.04 270.87 P 0.95 (directed search only) 53.86 259.87 P 0.95 (, and \050iii\051 the ne) 135.64 259.87 P 0.95 (w router with directed) 202.79 259.87 P 2.87 (search and binning \050the v) 53.86 248.87 P 2.87 (ersion used to get the timing) 166.28 248.87 P (results in pre) 53.86 237.87 T (vious sections\051.) 105.27 237.87 T 0.33 (The tw) 53.86 220.87 P 0.33 (o metrics used to compare the three routers were the) 82.14 220.87 P -0.16 (minimum track count needed to route the circuit and the lo) 53.86 209.87 P -0.16 (w) 287.02 209.87 P 3.8 (stress routing time. Experimental results, geometrically) 53.86 198.87 P 0.74 (a) 53.86 187.87 P 0.74 (v) 58.1 187.87 P 0.74 (eraged across all \336fteen benchmark circuits, are gi) 62.95 187.87 P 0.74 (v) 268.93 187.87 P 0.74 (en in) 273.78 187.87 P 0.94 (T) 53.86 176.87 P 0.94 (ables 5 and 6. In terms of a) 59.17 176.87 P 0.94 (v) 173.82 176.87 P 0.94 (erage minimum track count,) 178.67 176.87 P 1.02 (all the routers performed almost equally well; the directed) 53.86 165.87 P 3.34 (search with binning requires only 2% e) 53.86 154.87 P 3.34 (xtra tracks per) 230.36 154.87 P 1.99 (channel. The lo) 53.86 143.87 P 1.99 (w stress routing times were measured by) 119.53 143.87 P 1.44 (routing each circuit with W) 53.86 132.87 P 1 8 Q 1.15 (min) 169.58 130.37 P 1 10 Q 1.44 (+) 184.53 132.87 P 1.44 (30% tracks. Most of the) 192.67 132.87 P 1.22 (speedup is obtained from the directed search, which is 52) 53.86 120.04 P 1.7 (times f) 53.86 109.04 P 1.7 (aster than the breadth-\336rst search. The addition of) 82.96 109.04 P 1.75 (binning pro) 53.86 98.04 P 1.75 (vides an e) 101.85 98.04 P 1.75 (xtra speedup of 2 o) 145.19 98.04 P 1.75 (v) 228.69 98.04 P 1.75 (er the directed) 233.54 98.04 P (search.) 53.86 85.7 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 F (3.6 Dif\336culty Prediction) 317.76 196.34 T 1 F 0.24 (The \336nal important feature of the ne) 317.76 182.34 P 0.24 (w router is its ability to) 463.9 182.34 P 0.2 (detect the dif) 317.76 171.34 P 0.2 (\336culty of the routing task. T) 370.12 171.34 P 0.2 (o test the dif) 482.52 171.34 P 0.2 (\336culty) 532.58 171.34 P 0.63 (prediction scheme, we ran the router for each circuit to get) 317.76 160.34 P 1.63 (the estimated tracks per channel using \0504\051. W) 317.76 149.34 P 1 8 Q 1.3 (estimate) 509.57 146.84 P 1 10 Q 1.63 ( took) 536.24 149.34 P 1.5 (less than less than one second to calculate for the lar) 317.76 136.5 P 1.5 (gest) 542.03 136.5 P 0.52 (benchmark circuit, pro) 317.76 125.5 P 0.52 (viding the user with feedback on the) 409.47 125.5 P 0.88 (problem classi\336cation v) 317.76 114.5 P 0.88 (ery quickly) 414.93 114.5 P 0.88 (. T) 460.43 114.5 P 0.88 (able) 471.62 114.5 P 0.88 (7 lists the actual) 490.78 114.5 P 1.51 (minimum tracks per channel and the estimated tracks per) 317.76 103.5 P (channel for each benchmark circuit.) 317.76 92.5 T 53.86 81.7 294.24 720 C 0 0 0 1 0 0 0 K 57.9 444.54 290.2 720 C 0 0 0 1 0 0 0 K 4 10 Q 0 X 0 0 0 1 0 0 0 K (Figure 4. Routing Time vs. Available Tracks for) 73.43 465.55 T (clma \0508383 Logic Blocks\051) 123.57 453.55 T 104.22 500.77 104.22 712.44 265.49 712.44 265.49 500.77 104.22 500.77 5 L 0.5 H 1 Z N 104.22 500.77 104.22 501.92 2 L N 131.12 500.77 131.12 501.92 2 L N 157.99 500.77 157.99 501.92 2 L N 184.86 500.77 184.86 501.92 2 L N 211.75 500.77 211.75 501.92 2 L N 238.62 500.77 238.62 501.92 2 L N 265.49 500.77 265.49 501.92 2 L N 104.22 712.44 104.22 711.29 2 L N 131.12 712.44 131.12 711.29 2 L N 157.99 712.44 157.99 711.29 2 L N 184.86 712.44 184.86 711.29 2 L N 211.75 712.44 211.75 711.29 2 L N 238.62 712.44 238.62 711.29 2 L N 265.49 712.44 265.49 711.29 2 L N 104.22 500.77 104.22 503.07 2 L N 157.99 500.77 157.99 503.07 2 L N 211.75 500.77 211.75 503.07 2 L N 265.49 500.77 265.49 503.07 2 L N 104.22 712.44 104.22 710.13 2 L N 157.99 712.44 157.99 710.13 2 L N 211.75 712.44 211.75 710.13 2 L N 0 0 0 1 0 0 0 K 5 F (10) 98.66 491.63 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15) 152.43 491.63 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (20) 206.19 491.63 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (25) 259.93 491.63 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Tracks per Channel \050W) 118.19 480.92 T 0 0 0 1 0 0 0 K 5 8 Q (FPGA) 220.99 478.42 T 0 0 0 1 0 0 0 K 5 10 Q (\051) 242.77 480.92 T 0 0 0 1 0 0 0 K 265.49 712.44 265.49 710.13 2 L N 104.22 500.77 105.37 500.77 2 L N 104.22 527.2 105.37 527.2 2 L N 104.22 553.67 105.37 553.67 2 L N 104.22 580.14 105.37 580.14 2 L N 104.22 606.6 105.37 606.6 2 L N 104.22 633.04 105.37 633.04 2 L N 104.22 659.51 105.37 659.51 2 L N 104.22 685.97 105.37 685.97 2 L N 104.22 712.44 105.37 712.44 2 L N 265.49 500.77 264.34 500.77 2 L N 265.49 527.2 264.34 527.2 2 L N 265.49 553.67 264.34 553.67 2 L N 265.49 580.14 264.34 580.14 2 L N 265.49 606.6 264.34 606.6 2 L N 265.49 633.04 264.34 633.04 2 L N 265.49 659.51 264.34 659.51 2 L N 265.49 685.97 264.34 685.97 2 L N 265.49 712.44 264.34 712.44 2 L N 104.22 500.77 106.52 500.77 2 L N 104.22 553.67 106.52 553.67 2 L N 104.22 606.6 106.52 606.6 2 L N 104.22 659.51 106.52 659.51 2 L N 104.22 712.44 106.52 712.44 2 L N 265.49 500.77 263.19 500.77 2 L N 265.49 553.67 263.19 553.67 2 L N 265.49 606.6 263.19 606.6 2 L N 265.49 659.51 263.19 659.51 2 L N 0 0 0 1 0 0 0 K (0) 94.95 496.47 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (500) 83.83 549.37 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (1000) 78.27 602.3 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (1500) 78.27 655.21 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (2000) 78.27 708.14 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Time \050seconds\051) 0 -270 72.78 565.93 TF 0 0 0 1 0 0 0 K 265.49 712.44 263.19 712.44 2 L N 125.73 598.65 136.48 521.27 147.24 504.25 157.99 504.66 168.73 502.04 179.5 502.12 190.24 501.4 201.01 501.4 211.75 501.4 222.5 501.4 233.27 501.4 244.01 501.4 254.75 501.4 265.49 501.49 14 L N 0 1 1 0 1 0 0 K J 125.73 696.77 136.48 597.39 147.24 620.77 157.99 592.29 168.73 607.32 179.5 562.97 190.24 570.17 201.01 570.49 211.75 578.55 222.5 579.5 233.27 587.11 244.01 586.9 254.75 597.16 265.49 595.49 14 L J 125.73 696.77 126.14 693.04 2 L 0 1 1 0 1 0 0 K N [7.663 6.641] 7.663 I 126.14 693.04 136.07 601.12 2 L N J 136.07 601.12 136.48 597.39 138.04 600.79 3 L N [6.675 5.785] 6.675 I 138.04 600.79 145.68 617.36 2 L N J 145.68 617.36 147.24 620.77 148.57 617.26 3 L N [8.393 7.274] 8.393 I 148.57 617.26 156.66 595.8 2 L N J 156.66 595.8 157.99 592.29 160.17 595.34 3 L N [12.665 10.976] 12.665 I 160.17 595.34 166.55 604.27 2 L N J 166.55 604.27 168.73 607.32 169.61 603.68 3 L N [8.291 7.186] 8.291 I 169.61 603.68 178.62 566.62 2 L N J 178.62 566.62 179.5 562.97 182.62 565.06 3 L N [6.267 5.431] 6.267 I 182.62 565.06 187.13 568.09 2 L N J 187.13 568.09 190.24 570.17 193.99 570.28 3 L N [3.779 3.275] 3.779 I 193.99 570.28 197.26 570.38 2 L N J 197.26 570.38 201.01 570.49 204.01 572.74 3 L N [6.844 5.932] 6.844 I 204.01 572.74 208.76 576.3 2 L N J 208.76 576.3 211.75 578.55 215.49 578.88 3 L N [3.789 3.284] 3.789 I 215.49 578.88 218.76 579.17 2 L N J 218.76 579.17 222.5 579.5 225.56 581.67 3 L N [6.558 5.684] 6.558 I 225.56 581.67 230.2 584.94 2 L N J 230.2 584.94 233.27 587.11 237.02 587.04 3 L N [3.743 3.244] 3.743 I 237.02 587.04 240.26 586.97 2 L N J 240.26 586.97 244.01 586.9 246.72 589.49 3 L N [8.48 7.349] 8.48 I 246.72 589.49 252.04 594.57 2 L N J 252.04 594.57 254.75 597.16 258.46 596.58 3 L N [3.889 3.371] 3.889 I 258.46 596.58 261.79 596.06 2 L N J 261.79 596.06 265.49 595.49 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (New Router) 206.6 674.27 T 0 0 0 1 0 0 0 K J 189.61 678.57 203.2 678.57 2 L N 0 1 1 0 1 0 0 K J 188.66 665.22 202.25 665.22 2 L J 188.66 665.22 192.41 665.22 2 L 0 1 1 0 1 0 0 K N [7.03 6.093] 7.03 I 192.41 665.22 198.5 665.22 2 L N J 198.5 665.22 202.25 665.22 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (VPR) 205.65 660.92 T J 53.86 81.7 294.24 720 C 0 0 612 792 C 0 0 0 1 0 0 0 K 1 10 Q 0 X 0 0 0 1 0 0 0 K (Algorithm) 373.12 428.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (A) 466.21 428.34 T (v) 472.69 428.34 T (erage Minimum) 477.54 428.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 478.99 417.34 T (rack Count) 484.75 417.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Breadth-\336rst Search) 353.82 397.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15.5) 495.2 397.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Directed Search) 361.88 377.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15.5) 495.2 377.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Directed Search with Binning) 334.38 357.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15.8) 495.2 357.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 F (T) 334.34 337.34 T (able 5: A) 340.09 337.34 T (v) 377.42 337.34 T (erage Minimum T) 382.32 337.34 T (rack Count Results) 459.35 337.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 F (Algorithm) 363.62 309.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (A) 477.17 309.34 T (v) 483.65 309.34 T (erage Lo) 488.5 309.34 T (w) 523.51 309.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Stress Routing T) 456.49 298.34 T (ime \050s\051) 523.37 298.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Breadth-\336rst Search) 344.32 278.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (731) 496.45 278.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Directed Search) 352.38 258.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (14) 498.95 258.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Directed Search with Binning) 324.88 238.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (7) 501.45 238.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 F (T) 330.17 218.34 T (able 6: A) 335.92 218.34 T (v) 373.25 218.34 T (erage Lo) 378.15 218.34 T (w Str) 415.54 218.34 T (ess Routing T) 438.41 218.34 T (ime Results) 496.57 218.34 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 327.95 440.75 327.95 350.25 2 L V 0.5 H 0 Z N 459.95 441.25 459.95 349.75 2 L V N 547.95 440.75 547.95 350.25 2 L V N 327.7 441 548.2 441 2 L V N 328.2 411.25 547.7 411.25 2 L V N 328.2 408.75 547.7 408.75 2 L V N 327.7 390 548.2 390 2 L V N 327.7 370 548.2 370 2 L V N 327.7 350 548.2 350 2 L V N 318.45 321.75 318.45 231.25 2 L V N 450.45 322.25 450.45 230.75 2 L V N 557.45 321.75 557.45 231.25 2 L V N 318.2 322 557.7 322 2 L V N 318.7 292.25 557.2 292.25 2 L V N 318.7 289.75 557.2 289.75 2 L V N 318.2 271 557.7 271 2 L V N 318.2 251 557.7 251 2 L V N 318.2 231 557.7 231 2 L V N 317.76 81.7 558.14 720 C 0 0 0 1 0 0 0 K 318.59 453 558.14 720 C 0 0 0 1 0 0 0 K 4 10 Q 0 X 0 0 0 1 0 0 0 K (Figure 5. Compile Time vs. Circuit Size) 352.98 460.55 T 363.39 496.24 363.39 707.91 524.67 707.91 524.67 496.24 363.39 496.24 5 L 0.5 H 1 Z N 363.39 496.24 363.39 497.39 2 L N 383.55 496.24 383.55 497.39 2 L N 403.68 496.24 403.68 497.39 2 L N 423.87 496.24 423.87 497.39 2 L N 444.03 496.24 444.03 497.39 2 L N 464.16 496.24 464.16 497.39 2 L N 484.32 496.24 484.32 497.39 2 L N 504.51 496.24 504.51 497.39 2 L N 524.67 496.24 524.67 497.39 2 L N 363.39 707.91 363.39 706.76 2 L N 383.55 707.91 383.55 706.76 2 L N 403.68 707.91 403.68 706.76 2 L N 423.87 707.91 423.87 706.76 2 L N 444.03 707.91 444.03 706.76 2 L N 464.16 707.91 464.16 706.76 2 L N 484.32 707.91 484.32 706.76 2 L N 504.51 707.91 504.51 706.76 2 L N 524.67 707.91 524.67 706.76 2 L N 363.39 496.24 363.39 498.54 2 L N 403.68 496.24 403.68 498.54 2 L N 444.03 496.24 444.03 498.54 2 L N 484.32 496.24 484.32 498.54 2 L N 524.67 496.24 524.67 498.54 2 L N 363.39 707.91 363.39 705.6 2 L N 403.68 707.91 403.68 705.6 2 L N 444.03 707.91 444.03 705.6 2 L N 484.32 707.91 484.32 705.6 2 L N 0 0 0 1 0 0 0 K 5 F (0) 360.61 487.1 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (5000) 392.56 487.1 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (10000) 430.13 487.1 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15000) 470.42 487.1 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (20000) 510.77 487.1 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Number of Logic Blocks) 389.18 475.42 T 0 0 0 1 0 0 0 K 524.67 707.91 524.67 705.6 2 L N 363.39 496.24 364.55 496.24 2 L N 363.39 531.52 364.55 531.52 2 L N 363.39 566.77 364.55 566.77 2 L N 363.39 602.07 364.55 602.07 2 L N 363.39 637.32 364.55 637.32 2 L N 363.39 672.6 364.55 672.6 2 L N 363.39 707.91 364.55 707.91 2 L N 524.67 496.24 523.51 496.24 2 L N 524.67 531.52 523.51 531.52 2 L N 524.67 566.77 523.51 566.77 2 L N 524.67 602.07 523.51 602.07 2 L N 524.67 637.32 523.51 637.32 2 L N 524.67 672.6 523.51 672.6 2 L N 524.67 707.91 523.51 707.91 2 L N 363.39 496.24 365.7 496.24 2 L N 363.39 566.77 365.7 566.77 2 L N 363.39 637.32 365.7 637.32 2 L N 363.39 707.91 365.7 707.91 2 L N 524.67 496.24 522.36 496.24 2 L N 524.67 566.77 522.36 566.77 2 L N 524.67 637.32 522.36 637.32 2 L N 0 0 0 1 0 0 0 K (0) 354.12 491.94 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (10) 348.56 562.47 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (20) 348.56 633.02 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (30) 348.56 703.61 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Compilation Time \050seconds\051) 0 -270 344.85 535.54 TF 0 0 0 1 0 0 0 K 524.67 707.91 522.36 707.91 2 L N 393.14 510.35 393.63 531.52 394.41 510.35 400.63 517.38 400.72 517.38 416.12 517.38 418.11 552.68 432.14 538.57 442.42 552.68 458.2 580.88 462.52 580.88 474.01 609.13 489.82 602.07 505.63 630.27 521.44 665.57 15 L N 0 1 1 0 1 0 0 K J 377.3 496.24 379.49 498.51 387.59 506.98 395.65 515.42 403.68 523.89 411.78 532.32 419.81 540.79 427.88 549.23 435.94 557.7 444.03 566.13 452.07 574.6 460.16 583.07 468.22 591.5 476.26 599.97 484.32 608.41 492.41 616.88 500.48 625.31 508.51 633.78 516.6 642.22 524.67 650.68 20 L J 377.3 496.24 379.49 498.51 382.08 501.23 3 L 0 1 1 0 1 0 0 K N [4.86 4.212] 4.86 I 382.08 501.23 384.99 504.27 2 L N J 384.99 504.27 387.59 506.98 390.18 509.69 3 L N [4.813 4.171] 4.813 I 390.18 509.69 393.06 512.71 2 L N J 393.06 512.71 395.65 515.42 398.23 518.14 3 L N [4.814 4.172] 4.814 I 398.23 518.14 401.1 521.17 2 L N J 401.1 521.17 403.68 523.89 406.28 526.59 3 L N [4.836 4.191] 4.836 I 406.28 526.59 409.18 529.62 2 L N J 409.18 529.62 411.78 532.32 414.36 535.04 3 L N [4.814 4.172] 4.814 I 414.36 535.04 417.23 538.07 2 L N J 417.23 538.07 419.81 540.79 422.4 543.5 3 L N [4.813 4.171] 4.813 I 422.4 543.5 425.28 546.52 2 L N J 425.28 546.52 427.88 549.23 430.46 551.94 3 L N [4.837 4.192] 4.837 I 430.46 551.94 433.35 554.98 2 L N J 433.35 554.98 435.94 557.7 438.53 560.4 3 L N [4.836 4.191] 4.836 I 438.53 560.4 441.43 563.43 2 L N J 441.43 563.43 444.03 566.13 446.61 568.85 3 L N [4.814 4.172] 4.814 I 446.61 568.85 449.48 571.88 2 L N J 449.48 571.88 452.07 574.6 454.66 577.31 3 L N [4.86 4.212] 4.86 I 454.66 577.31 457.57 580.35 2 L N J 457.57 580.35 460.16 583.07 462.75 585.78 3 L N [4.813 4.171] 4.813 I 462.75 585.78 465.63 588.79 2 L N J 465.63 588.79 468.22 591.5 470.8 594.22 3 L N [4.814 4.172] 4.814 I 470.8 594.22 473.67 597.25 2 L N J 473.67 597.25 476.26 599.97 478.85 602.68 3 L N [4.813 4.171] 4.813 I 478.85 602.68 481.73 605.7 2 L N J 481.73 605.7 484.32 608.41 486.91 611.12 3 L N [4.86 4.212] 4.86 I 486.91 611.12 489.82 614.16 2 L N J 489.82 614.16 492.41 616.88 495 619.59 3 L N [4.813 4.171] 4.813 I 495 619.59 497.89 622.6 2 L N J 497.89 622.6 500.48 625.31 503.06 628.03 3 L N [4.814 4.172] 4.814 I 503.06 628.03 505.93 631.06 2 L N J 505.93 631.06 508.51 633.78 511.11 636.49 3 L N [4.836 4.191] 4.836 I 511.11 636.49 514.01 639.51 2 L N J 514.01 639.51 516.6 642.22 519.19 644.93 3 L N [4.837 4.192] 4.837 I 519.19 644.93 522.08 647.97 2 L N J 522.08 647.97 524.67 650.68 2 L N 0 0 0 1 0 0 0 K J 317.76 81.7 558.14 720 C 0 0 612 792 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "7" 7 %%Page: "8" 8 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q 0 X 0 0 0 1 0 0 0 K 1.64 (The last column in T) 53.86 427.6 P 1.64 (able) 142.95 427.6 P 1.64 (7 sho) 162.11 427.6 P 1.64 (ws the dif) 184.89 427.6 P 1.64 (ference between) 227.36 427.6 P 4.64 (W) 53.86 416.6 P 1 8 Q 3.71 (estimate) 62.66 414.1 P 1 10 Q 4.64 ( and W) 89.32 416.6 P 1 8 Q 3.71 (min) 127.47 414.1 P 1 10 Q 4.64 (. F) 139.92 416.6 P 4.64 (or thirteen of the circuits, the) 154.97 416.6 P 4.68 (estimates were within) 53.86 403.76 P 3 F 4.68 (\261) 157.61 403.76 P 1 F 4.68 (1 track per channel, for the) 163.1 403.76 P 2.37 (remaining tw) 53.86 392.76 P 2.37 (o circuits the estimates were under by tw) 109.18 392.76 P 2.37 (o) 289.24 392.76 P 1.27 (tracks per channel. These inaccuracies will result in some) 53.86 381.76 P (mistak) 53.86 370.76 T (es by the prediction scheme of T) 80.43 370.76 T (able) 210.16 370.76 T (1.) 229.32 370.76 T 3.69 (In order to illustrate the ef) 317.76 713.43 P 3.69 (fect of the inaccuracies in) 440.65 713.43 P 1.03 (predicting dif) 317.76 702.43 P 1.03 (\336culty) 372.71 702.43 P 1.03 (, we ran the router on each benchmark) 397.62 702.43 P 3.84 (circuit using \336v) 317.76 691.43 P 3.84 (e dif) 388.07 691.43 P 3.84 (ferent track counts: the minimum) 409.71 691.43 P (required by the circuit W) 317.76 680.43 T 1 8 Q (min) 418.29 677.93 T 1 10 Q (, W) 430.74 680.43 T 1 8 Q (min) 445.18 677.93 T 1 10 Q (+1, W) 457.63 680.43 T 1 8 Q (min) 482.71 677.93 T 1 10 Q (-1, W) 495.15 680.43 T 1 8 Q (min) 517.92 677.93 T 1 10 Q (-2, and) 530.37 680.43 T 2.17 (W) 317.76 667.6 P 1 8 Q 1.74 (min) 327.2 665.1 P 1 10 Q 2.17 (-3. W) 339.65 667.6 P 2.17 (e chose these v) 363.8 667.6 P 2.17 (alues because it is within this) 430.33 667.6 P -0.18 (range that inaccuracies in W) 317.76 654.76 P 1 8 Q -0.15 (estimate) 430.25 652.26 P 1 10 Q -0.18 ( will af) 456.91 654.76 P -0.18 (fect the routability) 484.63 654.76 P 1.82 (predictor) 317.76 641.93 P 1.82 (. T) 353.31 641.93 P 1.82 (able) 365.45 641.93 P 1.82 (8 lists for each circuit: the correct \050Crct\051) 384.61 641.93 P 0.46 (dif) 317.76 630.93 P 0.46 (\336culty le) 328.62 630.93 P 0.46 (v) 364.11 630.93 P 0.46 (el for each circuit based on the de\336nition from) 368.96 630.93 P 2.2 (T) 317.76 619.93 P 2.2 (able) 323.07 619.93 P 2.2 (1, the reported \050Rpt\051 dif) 342.23 619.93 P 2.2 (\336culty by the router using) 446.03 619.93 P 1.14 (W) 317.76 608.93 P 1 8 Q 0.91 (estimate) 326.56 606.43 P 1 10 Q 1.14 ( and applying the predictor from T) 353.23 608.93 P 1.14 (able) 497.55 608.93 P 1.14 (1, and the) 516.71 608.93 P 2.28 (routing time. The follo) 317.76 596.1 P 2.28 (wing k) 415.47 596.1 P 2.28 (e) 445.16 596.1 P 2.28 (y is used: LS=lo) 449.45 596.1 P 2.28 (w stress,) 521.42 596.1 P (DF=dif) 317.76 585.1 T (\336cult, and IM=impossible.) 347.04 585.1 T -0.01 (There are tw) 317.76 568.1 P -0.01 (o types of errors in T) 368.17 568.1 P -0.01 (able) 451.45 568.1 P -0.01 (8, dif) 470.61 568.1 P -0.01 (\336cult/impossible) 491.46 568.1 P 4.13 (errors and lo) 317.76 557.1 P 4.13 (w-stress/dif) 376.32 557.1 P 4.13 (\336cult errors. W) 422.73 557.1 P 4.13 (e only concern) 491.01 557.1 P 1.36 (ourselv) 317.76 546.1 P 1.36 (es with the dif) 347.05 546.1 P 1.36 (\336cult/impossible errors because the) 407.83 546.1 P 1.36 (y) 553.14 546.1 P 1.07 (can cause the user to think that their circuit can be routed) 317.76 535.1 P 0.81 (e) 317.76 524.1 P 0.81 (v) 321.95 524.1 P 0.81 (en though it is impossible. The w) 326.8 524.1 P 0.81 (orst outcome of a lo) 464.62 524.1 P 0.81 (w-) 547.59 524.1 P 1.16 (stress/dif) 317.76 513.1 P 1.16 (\336cult error is that the user ends up w) 353.62 513.1 P 1.16 (aiting a fe) 508.87 513.1 P 1.16 (w) 550.92 513.1 P 3.48 (minutes for a circuit to route, e) 317.76 502.1 P 3.48 (v) 462.02 502.1 P 3.48 (en though the router) 466.87 502.1 P -0.11 (classi\336ed the problem as lo) 317.76 491.1 P -0.11 (w stress. The dif) 425.95 491.1 P -0.11 (\336cult/impossible) 491.46 491.1 P 0.01 (errors are highlighted with shading in T) 317.76 480.1 P 0.01 (able) 475.89 480.1 P 0.01 (8. Out of the 75) 495.05 480.1 P 1.4 (test cases, 11 were dif) 317.76 469.1 P 1.4 (\336cult/impossible errors, resulting in) 411.15 469.1 P (an accurac) 317.76 458.1 T (y of 84%.) 360.08 458.1 T 0.23 (W) 317.76 441.1 P 0.23 (e can reduce the se) 326.4 441.1 P 0.23 (v) 402.61 441.1 P 0.23 (erity of the dif) 407.46 441.1 P 0.23 (\336cult/impossible errors) 465.41 441.1 P 0.1 (by pro) 317.76 430.1 P 0.1 (viding the user with fuzzy feedback when W) 343.54 430.1 P 1 8 Q 0.08 (estimate) 522.73 427.6 P 1 10 Q 0.1 (is) 551.47 430.1 P 0.04 (within -1 to +2 tracks per channel of W) 317.76 417.26 P 1 8 Q 0.03 (FPGA) 475.9 414.76 P 1 10 Q 0.04 (. T) 496.35 417.26 P 0.04 (able) 506.69 417.26 P 0.04 (9 sho) 525.85 417.26 P 0.04 (ws) 547.03 417.26 P -0.13 (ho) 317.76 404.43 P -0.13 (w we can rede\336ne our dif) 327.51 404.43 P -0.13 (\336culty prediction scheme. When) 428.54 404.43 P 3.22 (W) 317.76 393.43 P 1 8 Q 2.57 (FPGA) 327.2 390.93 P 1 10 Q 3.22 ( is less than W) 347.65 393.43 P 1 8 Q 2.57 (estimate) 418.21 390.93 P 1 10 Q 3.22 (-1, we can say with near) 444.87 393.43 P (certainty that the problem is impossible. When W) 317.76 380.6 T 1 8 Q (FPGA) 516.63 378.1 T 1 10 Q ( is) 537.08 380.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Circuit) 91.66 709.43 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 140.1 709.43 T 1 8 Q (min) 149.54 706.93 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (W) 174.32 709.43 T 1 8 Q (estimate) 183.12 706.93 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (Dif) 222.3 709.43 T (ference) 235.38 709.43 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast10k) 87.77 691.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (22) 146.55 692.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (22) 187.05 691.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (0) 241.05 691.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast12k) 87.77 675.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (23) 146.55 676.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (24) 187.05 675.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (1) 241.05 675.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast14k) 87.77 659.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (26) 146.55 660.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (25) 187.05 659.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (-1) 239.38 659.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast16k) 87.77 643.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (23) 146.55 644.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (23) 187.05 643.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (0) 241.05 643.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast18k) 87.77 627.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (26) 146.55 628.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (26) 187.05 627.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (0) 241.05 627.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast20k) 87.77 611.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (30) 146.55 612.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (29) 187.05 611.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (-1) 239.38 611.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (b) 83.29 595.6 T (ubble sort) 88.09 595.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (10) 146.55 596.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (8) 189.55 595.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (-2) 239.38 595.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (clma) 95.83 579.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (12) 146.55 580.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (13) 187.05 579.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (+1) 238.23 579.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (elliptic) 91.66 563.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (12) 146.55 564.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (11) 187.05 563.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (-1) 239.38 563.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (e) 90.9 547.6 T (x1010) 95.19 547.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (14) 146.55 548.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (12) 187.05 547.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (-2) 239.38 547.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (frisc) 96.66 531.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (12) 146.55 532.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (13) 187.05 531.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (+1) 238.23 531.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (pdc) 98.33 515.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (16) 146.55 516.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (16) 187.05 515.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (0) 241.05 515.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (s38417) 91.1 499.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (8) 148.8 500.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (8) 189.55 499.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (0) 241.05 499.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (s38584.1) 87.35 483.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (9) 148.8 484.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (8) 189.55 483.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (-1) 239.38 483.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (spla) 97.49 467.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q (14) 146.55 468.26 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (14) 187.05 467.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (0) 241.05 467.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 F (T) 106.27 449.6 T (able 7: T) 112.02 449.6 T (rack Count Estimates) 149.06 449.6 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 77.05 719.85 77.05 462.51 2 L V 0.5 H 0 Z N 134.05 720.35 134.05 462.01 2 L V N 168.05 720.35 168.05 462.01 2 L V N 216.05 720.35 216.05 462.01 2 L V N 271.05 719.85 271.05 462.51 2 L V N 76.8 720.1 271.3 720.1 2 L V N 77.3 703.51 270.8 703.51 2 L V N 77.3 701.01 270.8 701.01 2 L V N 76.8 686.26 271.3 686.26 2 L V N 76.8 670.26 271.3 670.26 2 L V N 76.8 654.26 271.3 654.26 2 L V N 76.8 638.26 271.3 638.26 2 L V N 76.8 622.26 271.3 622.26 2 L V N 76.8 606.26 271.3 606.26 2 L V N 76.8 590.26 271.3 590.26 2 L V N 76.8 574.26 271.3 574.26 2 L V N 76.8 558.26 271.3 558.26 2 L V N 76.8 542.26 271.3 542.26 2 L V N 76.8 526.26 271.3 526.26 2 L V N 76.8 510.26 271.3 510.26 2 L V N 76.8 494.26 271.3 494.26 2 L V N 76.8 478.26 271.3 478.26 2 L V N 76.8 462.26 271.3 462.26 2 L V N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K J 0 0 0 1 0 0 0 K 1 F (Circuit) 64.99 347.9 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 134.62 347.9 T 1 8 Q (min) 144.06 345.4 T 1 10 Q (+1) 156.51 347.9 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 230.94 347.9 T 1 8 Q (min) 240.38 345.4 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (W) 317.77 347.9 T 1 8 Q (min) 327.21 345.4 T 1 10 Q (-1) 339.66 347.9 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 408.77 347.9 T 1 8 Q (min) 418.21 345.4 T 1 10 Q (-2) 430.66 347.9 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 499.77 347.9 T 1 8 Q (min) 509.21 345.4 T 1 10 Q (-3) 521.66 347.9 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Crct) 109.77 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Rpt) 135.66 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 158.48 330.07 T (ime \050s\051) 164.24 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Crct) 200.77 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Rpt) 226.66 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 249.48 330.07 T (ime \050s\051) 255.24 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Crct) 291.77 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Rpt) 317.66 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 340.48 330.07 T (ime \050s\051) 346.24 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Crct) 382.77 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Rpt) 408.66 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 431.48 330.07 T (ime \050s\051) 437.24 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Crct) 473.77 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Rpt) 499.66 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 522.48 330.07 T (ime \050s\051) 528.24 330.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast10k) 61.11 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 112.55 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 136.49 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (57) 170.38 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 202.99 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 227.49 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (96) 261.38 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 294.27 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 318.77 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 385.27 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 409.77 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 314.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast12k) 61.11 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 111.99 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 136.49 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (61) 170.38 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 197.88 292.99 222.13 308.49 R 3 X V 0 X (DF) 202.99 298.07 T 222.63 292.99 245.13 308.49 R 3 X V 0 X (IM) 227.77 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (372) 258.88 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 294.27 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 318.77 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 385.27 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 409.77 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 298.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast14k) 61.11 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 111.99 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 136.49 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (140) 167.88 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 202.99 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 227.49 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (175) 258.88 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 288.88 276.99 313.13 292.49 R 3 X V 0 X (IM) 294.27 282.07 T 313.63 276.99 336.13 292.49 R 3 X V 0 X (DF) 318.49 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 385.27 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 409.77 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 282.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast16k) 61.11 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 111.99 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 136.49 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (95) 170.38 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 202.99 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 227.49 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (291) 258.88 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 294.27 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 318.77 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 385.27 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 409.77 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 266.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast18k) 61.11 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 111.99 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 136.49 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (181) 167.88 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 202.99 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 227.49 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (330) 258.88 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 294.27 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 318.77 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 385.27 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 409.77 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 250.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (beast20k) 61.11 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 111.99 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 136.49 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (326) 167.88 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 202.99 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 227.49 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (430) 258.88 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 288.88 228.99 313.13 244.49 R 3 X V 0 X (IM) 294.27 234.07 T 313.63 228.99 336.13 244.49 R 3 X V 0 X (DF) 318.49 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 385.27 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 409.77 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 234.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (b) 56.62 218.07 T (ubble sort) 61.42 218.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 112.55 218.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 137.05 218.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (16) 170.38 218.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 203.55 218.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 228.05 218.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (56) 261.38 218.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 288.88 212.99 313.13 228.49 R 3 X V 0 X (IM) 294.27 218.07 T 313.63 212.99 336.13 228.49 R 3 X V 0 X (DF) 318.49 218.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 218.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 379.88 212.99 404.13 228.49 R 3 X V 0 X (IM) 385.27 218.07 T 404.63 212.99 427.13 228.49 R 3 X V 0 X (DF) 409.49 218.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 218.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 218.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 218.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 218.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (clma) 69.16 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 111.99 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 136.49 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (191) 167.88 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 197.88 196.99 222.13 212.49 R 3 X V 0 X (DF) 202.99 202.07 T 222.63 196.99 245.13 212.49 R 3 X V 0 X (IM) 227.77 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (909) 258.88 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 294.27 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 318.77 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 385.27 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 409.77 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 202.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (elliptic) 64.99 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 112.55 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 137.05 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (25) 170.38 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 203.55 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 227.49 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (34) 261.38 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 288.88 180.99 313.13 196.49 R 3 X V 0 X (IM) 294.27 186.07 T 313.63 180.99 336.13 196.49 R 3 X V 0 X (DF) 318.49 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 385.27 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 409.77 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 186.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (e) 64.24 170.07 T (x1010) 68.53 170.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 112.55 170.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 137.05 170.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (5) 172.88 170.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 203.55 170.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 228.05 170.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (31) 261.38 170.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 288.88 164.99 313.13 180.49 R 3 X V 0 X (IM) 294.27 170.07 T 313.63 164.99 336.13 180.49 R 3 X V 0 X (DF) 318.49 170.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 170.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 379.88 164.99 404.13 180.49 R 3 X V 0 X (IM) 385.27 170.07 T 404.63 164.99 427.13 180.49 R 3 X V 0 X (DF) 409.49 170.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 170.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 170.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 170.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 170.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (frisc) 70 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 112.55 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 136.49 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (39) 170.38 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 197.88 148.99 222.13 164.49 R 3 X V 0 X (DF) 202.99 154.07 T 222.63 148.99 245.13 164.49 R 3 X V 0 X (IM) 227.77 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (173) 258.88 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 294.27 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 318.77 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 385.27 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 409.77 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 154.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (pdc) 71.66 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 111.99 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 136.49 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (99) 170.38 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 202.99 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 227.49 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (928) 258.88 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 294.27 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 318.77 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 385.27 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 409.77 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 138.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (s38417) 64.44 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 112.55 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 137.05 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (15) 170.38 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 202.99 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 227.49 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (79) 261.38 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 294.27 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 318.77 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 385.27 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 409.77 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 122.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (s38584.1) 60.69 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 112.55 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 137.05 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (16) 170.38 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 203.55 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 228.05 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (33) 261.38 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 288.88 100.99 313.13 116.49 R 3 X V 0 X (IM) 294.27 106.07 T 313.63 100.99 336.13 116.49 R 3 X V 0 X (DF) 318.49 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 385.27 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 409.77 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 106.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (spla) 70.83 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (LS) 112.55 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 136.49 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (22) 170.38 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 202.99 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (DF) 227.49 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (91) 261.38 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 294.27 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 318.77 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 354.05 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 385.27 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 409.77 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 445.05 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 476.27 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (IM) 500.77 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 536.05 90.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 F (T) 122.28 72.07 T (able 8: Corr) 128.03 72.07 T (ect and Reported Dif\336culty \050LS=lo) 180.06 72.07 T (w str) 327.32 72.07 T (ess, DF=dif\336cult, IM=impossible\051) 348.52 72.07 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 52.38 358.32 52.38 84.99 2 L V N 105.38 358.82 105.38 84.49 2 L V 3 H N 131.38 323.24 131.38 84.49 2 L V 0.5 H N 154.38 323.24 154.38 84.49 2 L V N 196.38 358.82 196.38 84.49 2 L V 3 H N 222.38 323.24 222.38 84.49 2 L V 0.5 H N 245.38 323.24 245.38 84.49 2 L V N 287.38 358.82 287.38 84.49 2 L V 3 H N 313.38 323.24 313.38 84.49 2 L V 0.5 H N 336.38 323.24 336.38 84.49 2 L V N 378.38 358.82 378.38 84.49 2 L V 3 H N 404.38 323.24 404.38 84.49 2 L V 0.5 H N 427.38 323.24 427.38 84.49 2 L V N 469.38 358.82 469.38 84.49 2 L V 3 H N 495.38 323.24 495.38 84.49 2 L V 0.5 H N 518.38 323.24 518.38 84.49 2 L V N 560.38 358.32 560.38 84.99 2 L V N 52.13 358.57 560.63 358.57 2 L V N 52.63 325.99 560.13 325.99 2 L V N 52.63 323.49 560.13 323.49 2 L V N 52.13 308.74 560.63 308.74 2 L V N 52.13 292.74 560.63 292.74 2 L V N 52.13 276.74 560.63 276.74 2 L V N 52.13 260.74 560.63 260.74 2 L V N 52.13 244.74 560.63 244.74 2 L V N 52.13 228.74 560.63 228.74 2 L V N 52.13 212.74 560.63 212.74 2 L V N 52.13 196.74 560.63 196.74 2 L V N 52.13 180.74 560.63 180.74 2 L V N 52.13 164.74 560.63 164.74 2 L V N 52.13 148.74 560.63 148.74 2 L V N 52.13 132.74 560.63 132.74 2 L V N 52.13 116.74 560.63 116.74 2 L V N 52.13 100.74 560.63 100.74 2 L V N 52.13 84.74 560.63 84.74 2 L V N 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "8" 8 %%Page: "9" 9 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q 0 X 0 0 0 1 0 0 0 K 4.33 (equal to W) 53.86 713.33 P 1 8 Q 3.47 (estimate) 105.77 710.83 P 1 10 Q 4.33 (-1, we can classify the problem as) 132.43 713.33 P 1.79 (impossible, b) 53.86 700.5 P 1.79 (ut inform the user that the problem may be) 108.79 700.5 P 0.3 (dif) 53.86 689.5 P 0.3 (\336cult. When W) 64.72 689.5 P 1 8 Q 0.24 (FPGA) 126.7 687 P 1 10 Q 0.3 ( is at least equal to W) 147.14 689.5 P 1 8 Q 0.24 (estimate) 234.4 687 P 1 10 Q 0.3 ( b) 261.06 689.5 P 0.3 (ut less) 268.66 689.5 P 1.33 (than W) 53.86 676.67 P 1 8 Q 1.07 (estimate) 83.71 674.17 P 1 10 Q 1.33 (+2, we can classify the problem as dif) 110.38 676.67 P 1.33 (\336cult,) 271.18 676.67 P (b) 53.86 662.5 T (ut w) 58.66 662.5 T (arn the user that the problem may be impossible.) 76.06 662.5 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0.28 (When a routing problem is gi) 53.86 392.83 P 0.28 (v) 172.47 392.83 P 0.28 (en a fuzzy classi\336cation, it is) 177.32 392.83 P 0.5 (up to the user to decide whether to try and route the circuit) 53.86 381.83 P 1.39 (or to stop and change the circuit or the tar) 53.86 370.83 P 1.39 (get FPGA. W) 233.1 370.83 P 1.39 (e) 289.8 370.83 P 0.77 (e) 53.86 359.83 P 0.77 (xpect that in most cases W) 58.15 359.83 P 1 8 Q 0.62 (min) 168.95 357.33 P 1 10 Q 0.77 ( will lie some) 181.4 359.83 P 0.77 (where outside) 237.64 359.83 P 1.31 (the fuzzy prediction re) 53.86 347 P 1.31 (gion. In such cases, where W) 147.88 347 P 1 8 Q 1.04 (min) 271.31 344.5 P 1 10 Q 1.31 ( is) 283.76 347 P 0.24 (considerably greater than or less than W) 53.86 334.17 P 1 8 Q 0.19 (FPGA) 216.38 331.67 P 1 10 Q 0.24 (, our predictor) 236.82 334.17 P (is highly accurate.) 53.86 321.33 T 0 F (4. Conc) 53.86 304.33 T (lusions and Future W) 92.56 304.33 T (ork) 193.64 304.33 T 1 F 4.07 (W) 53.86 289.33 P 4.07 (e ha) 62.5 289.33 P 4.07 (v) 82.75 289.33 P 4.07 (e presented a f) 87.6 289.33 P 4.07 (ast routability-dri) 157.73 289.33 P 4.07 (v) 231.27 289.33 P 4.07 (en router for) 236.12 289.33 P 0.35 (FPGAs. The router is of particular interest to users who are) 53.86 278.33 P 0.86 (willing to accept slightly lo) 53.86 267.33 P 0.86 (wer quality results in e) 166.51 267.33 P 0.86 (xchange) 260.92 267.33 P -0.1 (for e) 53.86 256.33 P -0.1 (xtremely short routing times. The routing algorithm has) 72.2 256.33 P 0.37 (three distinguishing capabilities. \050i\051 In lo) 53.86 245.33 P 0.37 (w stress situations,) 218.22 245.33 P 1.71 (where the channel width is at least 10% greater than the) 53.86 234.33 P 0.59 (minimum channel width actually needed, the router is v) 53.86 223.33 P 0.59 (ery) 281.47 223.33 P -0.13 (f) 53.86 212.33 P -0.13 (ast. F) 57.09 212.33 P -0.13 (or e) 78.48 212.33 P -0.13 (xample, it can route a 20,000 logic block circuit in) 93.47 212.33 P 1.05 (23 seconds on a 300 MHz sparcstation. \050ii\051 F) 53.86 201.33 P 1.05 (or lo) 241.83 201.33 P 1.05 (w stress) 261.24 201.33 P 2.88 (routing problems, the routing time scales v) 53.86 190.33 P 2.88 (ery close to) 242.37 190.33 P -0.14 (linearly with circuit size, with a linearity constant of 0.0011.) 53.86 179.33 P 2.43 (\050iii\051 F) 53.86 168.33 P 2.43 (or dif) 79.2 168.33 P 2.43 (\336cult routing problems, the router is able to) 103.32 168.33 P (predict that the problem is dif) 53.86 157.33 T (\336cult, with high accurac) 172.21 157.33 T (y) 268.71 157.33 T (.) 273.06 157.33 T -0.23 (In the future we plan to try our router with se) 53.86 140.33 P -0.23 (gmented FPGA) 231.96 140.33 P 1.43 (architectures. W) 53.86 129.33 P 1.43 (e are also going to de) 120.01 129.33 P 1.43 (v) 212.16 129.33 P 1.43 (elop a f) 217.01 129.33 P 1.43 (ast timing-) 249.75 129.33 P (dri) 53.86 118.33 T (v) 64.72 118.33 T (en router) 69.57 118.33 T (.) 104.84 118.33 T 0 F (5. Ac) 53.86 101.33 T (kno) 80.34 101.33 T (wledgments) 97.97 101.33 T 1 F 4.54 (The authors w) 53.86 86.33 P 4.54 (ould lik) 120.04 86.33 P 4.54 (e to thank Russell T) 155.32 86.33 P 4.54 (essier for) 252.77 86.33 P 0.86 (pro) 53.86 75.34 P 0.86 (viding the b) 67.04 75.34 P 0.86 (ubble sort benchmark circuit. W) 116.33 75.34 P 0.86 (e also wish) 248.09 75.34 P 3.19 (to ackno) 317.76 713.33 P 3.19 (wledge funding from Lucent T) 354.86 713.33 P 3.19 (echnologies and) 490.24 713.33 P (MICR) 317.76 702.33 T (ONET) 342.92 702.33 T (.) 368.84 702.33 T 0 F (6. Ref) 317.76 685.33 T (erences) 347.67 685.33 T 1 F ([Alle76]) 317.76 670.33 T 1.54 (J. R. Allen, \322) 354.14 670.33 P 1.54 (A T) 410.18 670.33 P 1.54 (opologically Adaptable Cellular) 426.75 670.33 P (Router) 335.62 659.33 T (,) 362.44 659.33 T (\323) 364.24 659.33 T 2 F (D) 371.18 659.33 T (A) 378.05 659.33 T (C,) 383.86 659.33 T 1 F ( 1976, pp. 161-167.) 393.03 659.33 T ([Apti96]) 317.76 645.33 T 3.89 (Aptix Corporation,) 354.7 645.33 P 2 F 3.89 (Pr) 441.1 645.33 P 3.89 (oduct Brief: The System) 450.65 645.33 P 2.44 (Explor) 335.62 634.33 P 2.44 (er MP4) 362.47 634.33 P 1 F 2.44 (, 1996. This and other documents are) 395.18 634.33 P (a) 335.62 623.33 T (v) 339.86 623.33 T (ailable on the Aptix web site: http://www) 344.61 623.33 T (.aptix.com.) 509.51 623.33 T ([Babb97]) 317.76 609.33 T -0.49 (J. Babb, M. Frank, E. W) 358.03 609.33 P -0.49 (aingold, R. Barua, M. T) 452.57 609.33 P -0.49 (ay-) 545.37 609.33 P 0.09 (lor) 335.62 598.33 P 0.09 (, J. Kim, S. De) 346.33 598.33 P 0.09 (v) 405.33 598.33 P 0.09 (abhaktuni, P) 410.08 598.33 P 0.09 (. Finch, and A. Ag) 459.06 598.33 P 0.09 (arw) 533.53 598.33 P 0.09 (al,) 548.42 598.33 P 1.08 (\322The RA) 335.62 587.33 P 1.08 (W Benchmark Suite: Computation Structures) 372.18 587.33 P 2.58 (for General Purpose Computing,) 335.62 576.33 P 2.58 (\323) 473.19 576.33 P 2 F 2.58 (FCCM) 482.71 576.33 P 1 F 2.58 (, 1997, pp.) 510.49 576.33 P (161-171.) 335.62 565.33 T ([Betz97]) 317.76 551.33 T -0.18 ( V) 352.75 551.33 P -0.18 (. Betz and J. Rose, \322VPR: A Ne) 361.01 551.33 P -0.18 (w P) 486.72 551.33 P -0.18 (acking, Place-) 501.67 551.33 P (ment and Routing T) 335.62 540.33 T (ool for) 415.1 540.33 T 11.52 (FPGA Research,) 444.54 540.33 P 11.52 (\323 Int\325) 522.57 540.33 P 11.52 (l) 555.36 540.33 P (W) 335.62 529.33 T (orkshop on) 344.26 529.33 T 2 F (FPL) 391.48 529.33 T 1 F (, 1997, pp. 213-222.) 409.26 529.33 T ([Bro) 317.76 515.33 T (w92]) 335.84 515.33 T 1.33 (S. Bro) 358.89 515.33 P 1.33 (wn, R. Francis, J. Rose, and Z. Vranesic,) 385.53 515.33 P 2 F 2.29 (F) 335.62 504.33 P 2.29 (ield-Pr) 341.28 504.33 P 2.29 (o) 369.16 504.33 P 2.29 (gr) 374.06 504.33 P 2.29 (ammable Gate Arr) 382.8 504.33 P 2.29 (ays) 462.21 504.33 P 1 F 2.29 (, Kluwer Academic) 475.54 504.33 P (Publishers, 1992.) 335.62 493.33 T ([Bro) 317.76 479.33 T (w92a]) 335.84 479.33 T 3.34 (S. Bro) 363.33 479.33 P 3.34 (wn, J. Rose, and Z. G. Vranesic, \322) 391.98 479.33 P 3.34 (A) 550.92 479.33 P 0.43 (Detailed Router for Field-Programmable Gate Arrays,) 335.62 468.33 P 0.43 (\323) 553.7 468.33 P 2 F (IEEE T) 335.62 457.33 T (r) 364.79 457.33 T (ans. on CAD) 368.53 457.33 T 1 F (, May 1992, pp. 620-628.) 419.92 457.33 T ([Chen94]) 317.76 443.33 T 3.43 ( C. E. Cheng, \322RISA: Accurate and Ef) 355.53 443.33 P 3.43 (\336cient) 533.14 443.33 P 1.78 (Placement Routability Modeling\323, ICCAD, 1994, pp.) 335.62 432.33 P (690-695.) 335.62 421.33 T ([Cong94]) 317.76 407.33 T 2.69 (J. Cong and Y) 358.59 407.33 P 2.69 (. Ding, \322Flo) 422.61 407.33 P 2.69 (wmap: An Optimal) 475.53 407.33 P 1.82 (T) 335.62 396.33 P 1.82 (echnology Mapping Algorithm for Delay Optimiza-) 341.03 396.33 P 2.94 (tion in Lookup-T) 335.62 385.33 P 2.94 (able Based FPGA Designs,) 409.6 385.33 P 2.94 (\323) 526.6 385.33 P 2 F 2.94 (IEEE) 536.48 385.33 P (T) 335.62 374.33 T (r) 340.63 374.33 T (ans. on CAD) 344.37 374.33 T 1 F (, Jan. 1994, pp. 1-12.) 395.76 374.33 T ([Corm90]) 317.76 360.33 T 0.46 ( T) 357.2 360.33 P 0.46 (. H. Cormen, C. E. Leiserson, and R. L. Ri) 365.53 360.33 P 0.46 (v) 539.68 360.33 P 0.46 (est,) 544.53 360.33 P 2 F -0.07 (Intr) 335.62 349.33 P -0.07 (oduction to Algorithms) 350.17 349.33 P 1 F -0.07 (, The Massachusetts Institute) 442.26 349.33 P (of T) 335.62 338.33 T (echnology) 351.86 338.33 T (, 1990, pp. 469-485.) 392.87 338.33 T ([Ebel95]) 317.76 324.33 T 1.43 ( C. Ebeling, L. McMurchie, S. A. Hauck, and S.) 352.75 324.33 P 0.84 (Burns, \322Placement and Routing T) 335.62 313.33 P 0.84 (ools for the T) 473.47 313.33 P 0.84 (riptych) 529.81 313.33 P (FPGA,) 335.62 302.33 T (\323) 362.98 302.33 T 2 F (IEEE T) 369.92 302.33 T (r) 399.09 302.33 T (ans. on VLSI,) 402.83 302.33 T 1 F ( Dec. 1995, pp. 473-482.) 456.72 302.33 T ([Hutt97]) 317.76 288.33 T -0.11 ( M. Hutton, J. Rose, and D. Corneil, \322Generation of) 352.2 288.33 P 5.11 (Synthetic Sequential Benchmark Circuits,) 335.62 277.33 P 5.11 (\323) 518.04 277.33 P 2 F 5.11 (FPGA) 530.09 277.33 P 1 F 5.11 (,) 555.64 277.33 P (1997, pp. 149-155.) 335.62 266.33 T 4.32 ([K) 317.76 252.33 P 4.32 (orn82] R. K) 327.96 252.33 P 4.32 (orn, \322) 384.3 252.33 P 4.32 (An Ef) 410.59 252.33 P 4.32 (\336cient V) 438.82 252.33 P 4.32 (ariable Cost Maze) 476.74 252.33 P (Router\323, Proc. 19th D) 335.62 241.33 T (A) 422.71 241.33 T (C, June 1992.) 429.53 241.33 T ([Lee61]) 317.76 227.33 T -0.01 ( C. Y) 349.41 227.33 P -0.01 (. Lee, \322) 369.49 227.33 P -0.01 (An Algorithm for P) 398.09 227.33 P -0.01 (ath Connections and) 476.51 227.33 P 0.04 (its Applications,) 335.62 216.33 P 0.04 (\323) 400.52 216.33 P 2 F 0.04 (IRE T) 407.49 216.33 P 0.04 (r) 430.59 216.33 P 0.04 (ansactions on Electr) 434.33 216.33 P 0.04 (onic Com-) 516.17 216.33 P (puter) 335.62 205.33 T (s) 356.63 205.33 T 1 F (, V) 360.52 205.33 T (ol. EC=10, 1961, pp. 346-365.) 371.45 205.33 T ([Lemi93]) 317.76 191.33 T -0.09 (G. Lemieux and S. Bro) 358.03 191.33 P -0.09 (wn, \322) 450.18 191.33 P -0.09 (A Detailed Router for) 470.94 191.33 P 2.14 (Allocating W) 335.62 180.33 P 2.14 (ire Se) 391.52 180.33 P 2.14 (gments in FPGAs,) 416.56 180.33 P 2.14 (\323 A) 493.75 180.33 P 2.14 (CM/SIGD) 509.65 180.33 P 2.14 (A) 550.92 180.33 P (Ph) 335.62 169.33 T (ysical Design W) 346.13 169.33 T (orkshop, 1993, pp. 215-226.) 411.43 169.33 T ([Le) 317.76 155.33 T (wi97]) 331.39 155.33 T 1.08 ( D. M. Le) 354.72 155.33 P 1.08 (wis, D. R. Gallo) 396.87 155.33 P 1.08 (w) 464.85 155.33 P 1.08 (ay) 471.97 155.33 P 1.08 (, M. v) 480.76 155.33 P 1.08 (an Ierssel, J.) 506.56 155.33 P 0.05 (Rose, and P) 335.62 144.33 P 0.05 (. Cho) 382.1 144.33 P 0.05 (w) 403.57 144.33 P 0.05 (, \322The T) 410.14 144.33 P 0.05 (ransmogri\336er) 443.48 144.33 P 0.05 (-2: A 1 Million) 497.16 144.33 P 0.42 (Gate Rapid Prototyping System,) 335.62 133.33 P 0.42 (\323) 465.64 133.33 P 2 F 0.42 (FPGA) 473 133.33 P 1 F 0.42 (, 1997, pp. 53-) 498.55 133.33 P (61.) 335.62 122.33 T ([Nair87]) 317.76 108.33 T 1.89 ( R. Nair) 352.19 108.33 P 1.89 (, \322) 387.51 108.33 P 1.89 (A Simple Y) 398.04 108.33 P 1.89 (et Ef) 448.59 108.33 P 1.89 (fecti) 469.39 108.33 P 1.89 (v) 486.91 108.33 P 1.89 (e T) 491.76 108.33 P 1.89 (echnique for) 505.99 108.33 P 5.07 (Global W) 335.62 97.33 P 5.07 (iring,) 379.46 97.33 P 5.07 (\323) 400.15 97.33 P 2 F 5.07 (IEEE T) 412.16 97.33 P 5.07 (r) 446.4 97.33 P 5.07 (ans. on Computer) 450.14 97.33 P 5.07 (-Aided) 531.48 97.33 P (Design) 335.62 86.33 T 1 F (, v) 363.95 86.33 T (ol. CAD-6, no. 6, March 1987, pp. 165-172.) 373.75 86.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 F (De\336nition) 97.52 631.83 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Pr) 215.95 631.83 T (edictor) 226.32 631.83 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Classi\336cation) 66.02 599.83 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 140.61 611.83 T (ime) 147.1 611.83 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (\050seconds\051) 131.91 599.83 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (T) 184.23 611.83 T (ypical Range of T) 190.16 611.83 T (racks) 264.7 611.83 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (P) 189.15 599.83 T (er Channel in FPGA) 195.06 599.83 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 F (Impossible) 72.69 583.83 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 148.3 583.83 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 188.37 581.17 T 1 8 Q (FPGA) 197.81 578.67 T 3 14 Q (<) 218.26 581.17 T 1 10 Q ( \050W) 225.94 581.17 T 1 8 Q (estimate) 240.57 578.67 T 1 10 Q ( - 1\051) 267.24 581.17 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Probably) 76.58 563.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (impossible,) 71.71 552.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (b) 70.01 541.33 T (ut could be) 74.81 541.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (dif) 77.67 530.33 T (\336cult.) 88.53 530.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (--) 148.3 563.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 188.8 563.33 T 1 8 Q (FPGA) 198.24 560.83 T 3 10 Q (=) 220.69 563.33 T 1 F ( \050W) 226.18 563.33 T 1 8 Q (estimate) 240.81 560.83 T 1 10 Q ( - 1) 267.47 563.33 T 1 8 Q (\051) 280.8 560.83 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q (Probably dif-) 68.11 514.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (\336cult, b) 75.56 503.33 T (ut) 105.92 503.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (could be) 77.55 492.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (impossible) 72.96 481.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (> 60) 142.56 514.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 197.12 511.67 T 1 8 Q (estimate) 205.92 509.17 T 3 14 Q (\243) 235.08 511.67 T 1 10 Q ( W) 242.76 511.67 T 1 8 Q (FPGA) 254.71 509.17 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 3 14 Q (<) 202.16 496.17 T 1 10 Q ( \050W) 209.85 496.17 T 1 8 Q (estimate) 224.48 493.67 T 1 10 Q ( + 2\051) 251.14 496.17 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Dif) 77.81 465.33 T (\336cult) 90.89 465.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (> 60) 142.56 465.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (\050W) 185.47 462.67 T 1 8 Q (estimate) 197.6 460.17 T 1 10 Q ( + 2\051) 224.26 462.67 T 3 14 Q ( \243) 243.23 462.67 T 1 10 Q ( W) 254.41 462.67 T 1 8 Q (FPGA) 266.36 460.17 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 3 14 Q (<) 195.91 447.17 T 1 10 Q ( 1.1\050W) 203.6 447.17 T 1 8 Q (estimate) 230.73 444.67 T 1 10 Q ( + 2\051) 257.39 447.17 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (Lo) 72.4 429.33 T (w Stress) 83.26 429.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (< 60) 142.56 429.33 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K (W) 179.72 426.67 T 1 8 Q (FPGA) 189.16 424.17 T 3 14 Q (\263) 212.1 426.67 T 1 10 Q ( 1.1\050W) 219.79 426.67 T 1 8 Q (estimate) 246.92 424.17 T 1 10 Q ( + 2\051) 273.58 426.67 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 F (T) 84.87 409.83 T (able 9: Fuzzy De\336nition of Routing Classes) 90.62 409.83 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 61.63 646.25 61.63 419.75 2 L V 0.5 H 0 Z N 127.63 626.75 127.63 419.25 2 L V N 175.63 646.75 175.63 419.25 2 L V 3 H N 296.63 646.25 296.63 419.75 2 L V 0.5 H N 61.38 646.5 296.88 646.5 2 L V N 61.38 626.5 296.88 626.5 2 L V N 61.88 595.75 296.38 595.75 2 L V N 61.88 593.25 296.38 593.25 2 L V N 61.38 574 296.88 574 2 L V N 61.38 525 296.88 525 2 L V N 61.38 476 296.88 476 2 L V N 61.38 440 296.88 440 2 L V N 61.38 419.5 296.88 419.5 2 L V N 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "9" 9 %%Page: "10" 10 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 10 Q 0 X 0 0 0 1 0 0 0 K ([P) 53.86 713.33 T (alc92]) 62.6 713.33 T 1.11 (M. P) 90.09 713.33 P 1.11 (alcze) 110.5 713.33 P 1.11 (wski, \322Plane P) 130.79 713.33 P 1.11 (arallel A* Router and its) 191.47 713.33 P (Application to FPGAs,) 71.72 702.33 T (\323) 162.97 702.33 T 2 F (D) 169.91 702.33 T (A) 176.78 702.33 T (C) 182.59 702.33 T 1 F (, 1992, pp. 691-697.) 189.26 702.33 T 0.75 ([Rubi74] F) 53.86 688.33 P 0.75 (. Rubin, \322The Lee P) 97.97 688.33 P 0.75 (ath Connection Algorithm\323,) 180.8 688.33 P (IEEE T) 71.72 677.33 T (rans. Computers, v) 101.64 677.33 T (ol c-23, no. 9, Sept. 1974.) 176.99 677.33 T ([Sent92]) 53.86 663.33 T -0.11 ( E. M. Sento) 88.3 663.33 P -0.11 (vich et. al, \322SIS: A System for Sequen-) 138.09 663.33 P -0.1 (tial Circuit Analysis,) 71.72 652.33 P -0.1 (\323) 153.87 652.33 P 2 F -0.1 (T) 160.71 652.33 P -0.1 (ec) 165.35 652.33 P -0.1 (h. Report No. UCB/ERL M92/) 174.08 652.33 P (41,) 71.72 641.33 T 1 F ( Uni) 84.22 641.33 T (v) 101.47 641.33 T (ersity of California, Berk) 106.32 641.33 T (ele) 206.76 641.33 T (y) 218.27 641.33 T (, 1992.) 222.62 641.33 T ([Souk78]) 53.86 627.33 T -0.01 ( J. Soukup, \322F) 91.08 627.33 P -0.01 (ast Maze Router) 147.83 627.33 P -0.01 (,) 212.94 627.33 P -0.01 (\323) 214.74 627.33 P 2 F -0.01 (Pr) 221.67 627.33 P -0.01 (oc. 15th Design) 231.22 627.33 P (A) 71.72 616.33 T (utomation Conf) 77.63 616.33 T (.) 139.99 616.33 T 1 F (, June 1978, pp. 100-102.) 142.49 616.33 T ([W) 317.76 713.33 T (ilt97]) 330.13 713.33 T 4.04 ( S. W) 351.8 713.33 P 4.04 (ilton, \322) 381.98 713.33 P 4.04 (Architectures and Algorithms for) 413 713.33 P 5.78 (Field-Programmable Gate Arrays with Embedded) 335.62 702.33 P 0.78 (Memories,) 335.62 691.33 P 0.78 (\323) 377.97 691.33 P 2 F 0.78 (Ph.D. Dissertation) 385.69 691.33 P 1 F 0.78 (, Uni) 461.74 691.33 P 0.78 (v) 482.27 691.33 P 0.78 (ersity of T) 487.12 691.33 P 0.78 (oronto,) 529.53 691.33 P (1997.) 335.62 680.33 T ([W) 317.76 666.33 T (u94]) 330.03 666.33 T 1.96 ( Y) 348.36 666.33 P 1.96 (.-L. W) 358.76 666.33 P 1.96 (u and M. Marek-Sado) 386.6 666.33 P 1.96 (wka, \322) 480 666.33 P 1.96 (An Ef) 507.27 666.33 P 1.96 (\336cient) 533.14 666.33 P 4.1 (Router for 2-D Field-Programmable Gate Arrays,) 335.62 655.33 P 4.1 (\323) 553.7 655.33 P 2 F (ED) 335.62 644.33 T (A) 348.6 644.33 T (C) 354.41 644.33 T 1 F (, 1994, pp. 412-416.) 361.08 644.33 T ([Y) 317.76 630.33 T (ang91]) 327.31 630.33 T 4.7 (S. Y) 357.58 630.33 P 4.7 (ang, \322Logic Synthesis and Optimization) 379.07 630.33 P 2.76 (Benchmarks, V) 335.62 619.33 P 2.76 (ersion 3.0,) 399.48 619.33 P 2.76 (\323) 443.47 619.33 P 2 F 2.76 (T) 453.17 619.33 P 2.76 (ec) 457.81 619.33 P 2.76 (h. Report) 466.54 619.33 P 1 F 2.76 (, Microelec-) 506.52 619.33 P (tronics Centre of North Carolina, 1991.) 335.62 608.33 T 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "10" 10 %%Trailer %%BoundingBox: 0 0 612 792 %%PageOrder: Ascend %%Pages: 10 %%DocumentFonts: Helvetica-Bold %%+ Times-Roman %%+ Times-Italic %%+ Symbol %%+ Times-Bold %%+ Helvetica %%EOF