%!PS-Adobe-3.0 %%BoundingBox: (atend) %%Pages: (atend) %%PageOrder: (atend) %%DocumentFonts: (atend) %%Creator: Frame 5.1 %%DocumentData: Clean7Bit %%EndComments %%BeginProlog %- %- Frame ps_prolog 5.0, for use with Frame 5.0 products %- This ps_prolog file is Copyright (c) 1986-1996 Adobe Systems, Incoporated. %- All rights reserved. This ps_prolog file may be freely copied and %- distributed in conjunction with documents created using FrameMaker, %- FrameMaker/SGML FrameReader and FrameViewer as long as this %- copyright notice is preserved. %- %- FrameMaker users specify the proper paper size for each print job in the %- "Print" dialog's "Printer Paper Size" "Width" and "Height~ fields. If the %- printer that the PS file is sent to does not support the requested paper %- size, or if there is no paper tray of the proper size currently installed, %- then the job will not be printed. The following flag, if set to true, will %- cause the job to print on the default paper in such cases. /FMAllowPaperSizeMismatch false def %- %- Frame products normally print colors as their true color on a color printer %- or as shades of gray, based on luminance, on a black-and white printer. The %- following flag, if set to true, forces all non-white colors to print as pure %- black. This has no effect on bitmap images. /FMPrintAllColorsAsBlack false def %- %- Frame products can either set their own line screens or use a printer's %- default settings. Three flags below control this separately for no %- separations, spot separations and process separations. If a flag %- is true, then the default printer settings will not be changed. If it is %- false, Frame products will use their own settings from a table based on %- the printer's resolution. /FMUseDefaultNoSeparationScreen true def /FMUseDefaultSpotSeparationScreen true def /FMUseDefaultProcessSeparationScreen false def %- %- For any given PostScript printer resolution, Frame products have two sets of %- screen angles and frequencies for printing process separations, which are %- recomended by Adobe. The following variable chooses the higher frequencies %- when set to true or the lower frequencies when set to false. This is only %- effective if the appropriate FMUseDefault...SeparationScreen flag is false. /FMUseHighFrequencyScreens true def %- %- The following is a set of predefined optimal frequencies and angles for various %- common dpi settings. This is taken from "Advances in Color Separation Using %- PostScript Software Technology," from Adobe Systems (3/13/89 P.N. LPS 0043) %- and corrolated with information which is in various PPD (4.0) files. %- %- The "dpiranges" figure is the minimum dots per inch device resolution which %- can support this setting. The "low" and "high" values are controlled by the %- setting of the FMUseHighFrequencyScreens flag above. The "TDot" flags control %- the use of the "Yellow Triple Dot" feature whereby the frequency id divided by %- three, but the dot function is "trippled" giving a block of 3x3 dots per cell. %- %- PatFreq is a compromise pattern frequency for ps Level 2 printers which is close %- to the ideal WYSIWYG pattern frequency of 9 repetitions/inch but does not beat %- (too badly) against the screen frequencies of any separations for that DPI. % This is computed by taking dpi/9 as the ideal pixels per repetition, and then % computing a tiling size in printer pixels for each of the four separations as % (dpi/screenFreq)*(cos(screenAngle)+sin(screenAngle)) Actually, this is the same % for Cyan and Magenta). Then, we take a "nice" LCM of the tile sizes close to % the desired pattern tile where the beat factor is not more than 2 or 3. % /dpiranges [ 2540 2400 1693 1270 1200 635 600 0 ] def /CMLowFreqs [ 100.402 94.8683 89.2289 100.402 94.8683 66.9349 63.2456 47.4342 ] def /YLowFreqs [ 95.25 90.0 84.65 95.25 90.0 70.5556 66.6667 50.0 ] def /KLowFreqs [ 89.8026 84.8528 79.8088 89.8026 84.8528 74.8355 70.7107 53.033 ] def /CLowAngles [ 71.5651 71.5651 71.5651 71.5651 71.5651 71.5651 71.5651 71.5651 ] def /MLowAngles [ 18.4349 18.4349 18.4349 18.4349 18.4349 18.4349 18.4349 18.4349 ] def /YLowTDot [ true true false true true false false false ] def /CMHighFreqs [ 133.87 126.491 133.843 108.503 102.523 100.402 94.8683 63.2456 ] def /YHighFreqs [ 127.0 120.0 126.975 115.455 109.091 95.25 90.0 60.0 ] def /KHighFreqs [ 119.737 113.137 119.713 128.289 121.218 89.8026 84.8528 63.6395 ] def /CHighAngles [ 71.5651 71.5651 71.5651 70.0169 70.0169 71.5651 71.5651 71.5651 ] def /MHighAngles [ 18.4349 18.4349 18.4349 19.9831 19.9831 18.4349 18.4349 18.4349 ] def /YHighTDot [ false false true false false true true false ] def /PatFreq [ 10.5833 10.0 9.4055 10.5833 10.0 10.5833 10.0 9.375 ] def %- %- PostScript Level 2 printers contain an "Accurate Screens" feature which can %- improve process separation rendering at the expense of compute time. This %- flag is ignored by PostScript Level 1 printers. /FMUseAcccurateScreens true def %- %- The following PostScript procedure defines the spot function that Frame %- products will use for process separations. You may un-comment-out one of %- the alternative functions below, or use your own. %- %- Dot function /FMSpotFunction {abs exch abs 2 copy add 1 gt {1 sub dup mul exch 1 sub dup mul add 1 sub } {dup mul exch dup mul add 1 exch sub }ifelse } def %- %- Line function %- /FMSpotFunction { pop } def %- %- Elipse function %- /FMSpotFunction { dup 5 mul 8 div mul exch dup mul exch add %- sqrt 1 exch sub } def %- %- /FMversion (5.0) def % matches PS_VERSION in fmprintdriver % PostScript Level 1 = true, 2 = false /fMLevel1 /languagelevel where {pop languagelevel} {1} ifelse 2 lt def % Set up Color vs. Black-and-White /FMPColor fMLevel1 { false /colorimage where {pop pop true} if } { % statusdict /processcolors known { % statusdict /processcolors get exec % } {1} ifelse % 1 gt true } ifelse def /FrameDict 400 dict def % should check this value each time changes made % % For NeWS we add a fake errordict, so we can psh files % systemdict /errordict known not {/errordict 10 dict def errordict /rangecheck {stop} put} if %- The readline in PS 23.0 doesn't recognize cr's as nl's on AppleTalk FrameDict /tmprangecheck errordict /rangecheck get put % save old rangecheck errordict /rangecheck {FrameDict /bug true put} put % will flag bug found FrameDict /bug false put % flag bug not found mark % since we're not sure what will happen next %- Some PS machines read past the CR, so keep the following 3 lines together! currentfile 5 string readline 00 0000000000 cleartomark % junk from readline and rangecheck errordict /rangecheck FrameDict /tmprangecheck get put % restore rangecheck FrameDict /bug get { % redefine readline if last one got a rangecheck /readline { /gstring exch def /gfile exch def /gindex 0 def { gfile read pop % get a char dup 10 eq {exit} if % exit if LF dup 13 eq {exit} if % exit if CR gstring exch gindex exch put % store it away /gindex gindex 1 add def % bump index } loop pop % eol character gstring 0 gindex getinterval true % simulate real readline } bind def } if % outer-world defs /FMshowpage /showpage load def /FMquit /quit load def /FMFAILURE { % enter with two error strings on the stack dup = flush % send a copy of the message to the console FMshowpage % msg on a page by itself, so it can't be, say, black on black /Helvetica findfont 12 scalefont setfont 72 200 moveto show 72 220 moveto show FMshowpage % we might be in the middle of some EPS, where "showpage" FMquit % and "quit" are redefined } def % only used once at most, so no bind /FMVERSION { FMversion ne { (Adobe Frame product version does not match ps_prolog! Check installation;) (also check ~/fminit and ./fminit for old versions) FMFAILURE } if } def % only used at startup, so no bind /FMBADEPSF { % Call with bad operator name on stack (as a string) (Adobe's PostScript Language Reference Manual, 2nd Edition, section H.2.4) (says your EPS file is not valid, as it calls X ) dup dup (X) search pop exch pop exch pop length % parmstr errstr errstr indx 5 -1 roll % errstr errstr index parmstr putinterval % errstr FMFAILURE } def % standard concatprocs routine /fmConcatProcs { /proc2 exch cvlit def/proc1 exch cvlit def/newproc proc1 length proc2 length add array def newproc 0 proc1 putinterval newproc proc1 length proc2 putinterval newproc cvx }def % Put all local variables here in alphabetical order. FrameDict begin [ /ALDsave /FMdicttop /FMoptop /FMpointsize /FMsaveobject /b /bitmapsave /blut /bpside /bs /bstring /bwidth /c /cf /cs /cynu /depth /edown /fh /fillvals /fw /fx /fy /g /gfile /gindex /grnt /gryt /gstring /height /hh /i /im /indx /is /k /kk /landscape /lb /len /llx /lly /m /magu /manualfeed /n /offbits /onbits /organgle /orgbangle /orgbfreq /orgbproc /orgbxfer /orgfreq /orggangle /orggfreq /orggproc /orggxfer /orgmatrix /orgproc /orgrangle /orgrfreq /orgrproc /orgrxfer /orgxfer /pagesave /paperheight /papersizedict /paperwidth /pos /pwid /r /rad /redt /sl /str /tran /u /urx /ury /val /width /width /ws /ww /x /x1 /x2 /xindex /xpoint /xscale /xx /y /y1 /y2 /yelu /yindex /ypoint /yscale /yy ] { 0 def } forall % Start of PDF/Acrobat support % Bind def /FmBD {bind def} bind def systemdict /pdfmark known { /fMAcrobat true def % FmPD is a conditional PDFMark /FmPD /pdfmark load def % FmPT is a show text operator which only show up when distiller is active /FmPT /show load def % FmPD2 and FmPA are Acrobat 2.0-specific currentdistillerparams /CoreDistVersion get 2000 ge { % FmPD2 is like FmPD but for Acrobat 2.0-specific PDF /FmPD2 /pdfmark load def % x y/name FmPA % is equivalent to % [/Dest/name/View[/FitH x y FmDC exch pop]/DEST FmPD % It is a shortcut for pagragraph Uinique ID designators whic occurr commonly. /FmPA { mark exch /Dest exch 5 3 roll /View [ /XYZ null 6 -2 roll FmDC exch pop null] /DEST FmPD }FmBD } { % These are No-Ops for Distiller 1.0 /FmPD2 /cleartomark load def /FmPA {pop pop pop}FmBD } ifelse } { % these are the No-Ops for regular PostScript /fMAcrobat false def /FmPD /cleartomark load def /FmPD2 /cleartomark load def /FmPT /pop load def /FmPA {pop pop pop}FmBD } ifelse % This convert a set of X Y coordinates from the current user space to the default % PostScript coordinates needed by some pdfmark variants. We also convert to % integer because the distiller doesn't always like floats! /FmDC { transform fMDefaultMatrix itransform cvi exch cvi exch }FmBD % This converts four numbers into a bounding box making sure the first two are maller than the last two /FmBx { dup 3 index lt {3 1 roll exch} if 1 index 4 index lt {4 -1 roll 3 1 roll exch 4 1 roll} if }FmBD % End of PDF/Acrobat support % % Color separation code % % Constants. /FMnone 0 def /FMcyan 1 def /FMmagenta 2 def /FMyellow 3 def /FMblack 4 def /FMcustom 5 def /fMNegative false def % we are inverting the page % Variables. /FrameSepIs FMnone def % separation we are printing % If FrameSepIs is FMcustom, this is the custom color /FrameSepBlack 0 def /FrameSepYellow 0 def /FrameSepMagenta 0 def /FrameSepCyan 0 def /FrameSepRed 1 def /FrameSepGreen 1 def /FrameSepBlue 1 def /FrameCurGray 1 def /FrameCurPat null def /FrameCurColors [ 0 0 0 1 0 0 0 ] def % c m y k r g b % Utility routines /FrameColorEpsilon .001 def % epsilon by which values can differ and sill be equal /eqepsilon { % v1 v2 eqeps bool sub dup 0 lt {neg} if FrameColorEpsilon le } bind def % are the cmyk and cmykrgb arrays on the stack the same color? /FrameCmpColorsCMYK { % [ c1 m1 y1 k1 ] [ c2 m2 y2 k2 r2 g2 b2] -> bool 2 copy 0 get exch 0 get eqepsilon { 2 copy 1 get exch 1 get eqepsilon { 2 copy 2 get exch 2 get eqepsilon { 3 get exch 3 get eqepsilon } {pop pop false} ifelse }{pop pop false} ifelse } {pop pop false} ifelse } bind def % are the rgb and cmykrgb arrays on the stack the same color? /FrameCmpColorsRGB { % [ r1 g1 b1 ] [ c2 m2 y2 k2 r2 g2 b2] -> bool 2 copy 4 get exch 0 get eqepsilon { 2 copy 5 get exch 1 get eqepsilon { 6 get exch 2 get eqepsilon }{pop pop false} ifelse } {pop pop false} ifelse } bind def % convert r g b to c m y k /RGBtoCMYK { % r g b 1 exch sub % r g y 3 1 roll % y r g 1 exch sub % y r m 3 1 roll % m y r 1 exch sub % m y c 3 1 roll % c m y 3 copy % c m y c m y 2 copy % c m y c m y m y le { pop } { exch pop } ifelse % c m y c min(m,y) 2 copy % c m y c min(m,y) c min(m,y) le { pop } { exch pop } ifelse % c m y min(c, min(m,y)) dup dup dup % c m y k k k k 6 1 roll % c k m y k k k 4 1 roll % c k m k y k k 7 1 roll % k c k m k y k sub % k c k m k y 6 1 roll % y k c k m k sub % y k c k m 5 1 roll % m y k c k sub % m y k c 4 1 roll % c m y k } bind def /CMYKtoRGB { % c m y k CMYKtoRGB r g b dup dup 4 -1 roll add % c m k k y+k 5 1 roll 3 -1 roll add % y+k c k m+k 4 1 roll add % m+k y+k c+k 1 exch sub dup 0 lt {pop 0} if 3 1 roll % r m+k y+k 1 exch sub dup 0 lt {pop 0} if exch % r b m+k 1 exch sub dup 0 lt {pop 0} if exch % r g b } bind def % Public routines % Happens at the top of each page that is a separation /FrameSepInit { 1.0 RealSetgray } bind def % Tell the separation code that this separation is for a custom color /FrameSetSepColor { % c m y k r g b /FrameSepBlue exch def /FrameSepGreen exch def /FrameSepRed exch def /FrameSepBlack exch def /FrameSepYellow exch def /FrameSepMagenta exch def /FrameSepCyan exch def /FrameSepIs FMcustom def setCurrentScreen } bind def % Tell the separation code that this separation is Cyan /FrameSetCyan { /FrameSepBlue 1.0 def /FrameSepGreen 1.0 def /FrameSepRed 0.0 def /FrameSepBlack 0.0 def /FrameSepYellow 0.0 def /FrameSepMagenta 0.0 def /FrameSepCyan 1.0 def /FrameSepIs FMcyan def setCurrentScreen } bind def % Tell the separation code that this separation is Magenta /FrameSetMagenta { /FrameSepBlue 1.0 def /FrameSepGreen 0.0 def /FrameSepRed 1.0 def /FrameSepBlack 0.0 def /FrameSepYellow 0.0 def /FrameSepMagenta 1.0 def /FrameSepCyan 0.0 def /FrameSepIs FMmagenta def setCurrentScreen } bind def % Tell the separation code that this separation is Yellow /FrameSetYellow { /FrameSepBlue 0.0 def /FrameSepGreen 1.0 def /FrameSepRed 1.0 def /FrameSepBlack 0.0 def /FrameSepYellow 1.0 def /FrameSepMagenta 0.0 def /FrameSepCyan 0.0 def /FrameSepIs FMyellow def setCurrentScreen } bind def % Tell the separation code that this separation is Black /FrameSetBlack { /FrameSepBlue 0.0 def /FrameSepGreen 0.0 def /FrameSepRed 0.0 def /FrameSepBlack 1.0 def /FrameSepYellow 0.0 def /FrameSepMagenta 0.0 def /FrameSepCyan 0.0 def /FrameSepIs FMblack def setCurrentScreen } bind def % Tell the separation code we are not doing a separation /FrameNoSep { % /FrameSepIs FMnone def setCurrentScreen } bind def % Initialize the separation code with all the custom colors we are % separating (not process colors) /FrameSetSepColors { % list of arrays of [c m y k r g b] count FrameDict begin [ exch 1 add 1 roll ] /FrameSepColors % array of arrays of colors we are separating exch def end } bind def % is this color array in the array of custom color separations? /FrameColorInSepListCMYK { % [ c m y k ] -> bool FrameSepColors { % color elem-of-array exch dup 3 -1 roll % color color elem FrameCmpColorsCMYK % color bool { pop true exit } if } forall % exits with either [color] or true dup true ne {pop false} if } bind def /FrameColorInSepListRGB { % [ r g b ] -> bool FrameSepColors { % color elem-of-array exch dup 3 -1 roll % color color elem FrameCmpColorsRGB % color bool { pop true exit } if } forall % exits with either [color] or true dup true ne {pop false} if } bind def % Level 1 color operators saved and redefined /RealSetgray /setgray load def /RealSetrgbcolor /setrgbcolor load def /RealSethsbcolor /sethsbcolor load def end % Setgray patch /setgray { % num FrameDict begin FrameSepIs FMnone eq { RealSetgray } { % go to white unless the current sep color is black FrameSepIs FMblack eq { RealSetgray } { FrameSepIs FMcustom eq FrameSepRed 0 eq and FrameSepGreen 0 eq and FrameSepBlue 0 eq and { RealSetgray } { 1 RealSetgray pop } ifelse } ifelse } ifelse end } bind def /setrgbcolor { % r g b FrameDict begin FrameSepIs FMnone eq { RealSetrgbcolor } { 3 copy [ 4 1 roll ] % r g b [ r g b ] FrameColorInSepListRGB { FrameSepBlue eq exch FrameSepGreen eq and exch FrameSepRed eq and { 0 } { 1 } ifelse } { FMPColor { RealSetrgbcolor currentcmykcolor } { RGBtoCMYK } ifelse FrameSepIs FMblack eq {1.0 exch sub 4 1 roll pop pop pop} { FrameSepIs FMyellow eq {pop 1.0 exch sub 3 1 roll pop pop} { FrameSepIs FMmagenta eq {pop pop 1.0 exch sub exch pop } { FrameSepIs FMcyan eq {pop pop pop 1.0 exch sub } {pop pop pop pop 1} ifelse } ifelse } ifelse } ifelse } ifelse RealSetgray } ifelse end } bind def /sethsbcolor { FrameDict begin FrameSepIs FMnone eq { RealSethsbcolor } { RealSethsbcolor % safe since we will overwrite the color state currentrgbcolor % r g b - Let PostsCript to the conversion. setrgbcolor % call our version } ifelse end } bind def FrameDict begin /setcmykcolor where { pop /RealSetcmykcolor /setcmykcolor load def } { /RealSetcmykcolor { 4 1 roll 3 { 3 index add 0 max 1 min 1 exch sub 3 1 roll} repeat RealSetrgbcolor pop } bind def } ifelse userdict /setcmykcolor { % c m y k FrameDict begin FrameSepIs FMnone eq { RealSetcmykcolor } { 4 copy [ 5 1 roll ] FrameColorInSepListCMYK { FrameSepBlack eq exch FrameSepYellow eq and exch FrameSepMagenta eq and exch FrameSepCyan eq and { 0 } { 1 } ifelse } { FrameSepIs FMblack eq {1.0 exch sub 4 1 roll pop pop pop} { FrameSepIs FMyellow eq {pop 1.0 exch sub 3 1 roll pop pop} { FrameSepIs FMmagenta eq {pop pop 1.0 exch sub exch pop } { FrameSepIs FMcyan eq {pop pop pop 1.0 exch sub } {pop pop pop pop 1} ifelse } ifelse } ifelse } ifelse } ifelse RealSetgray } ifelse end } bind put % Set up a prototype pattern for PostScript Level 2 fMLevel1 { % set up screen functions for the patterns in PS level 1 % each entry contains an angle, spot function, flipped spot function, % gray level and frequency multiplier. /patScreenDict 7 dict dup begin <0f1e3c78f0e1c387> [ 45 { pop } {exch pop} .5 2 sqrt] FmBD <0f87c3e1f0783c1e> [ 135 { pop } {exch pop} .5 2 sqrt] FmBD [ 0 { pop } dup .5 2 ] FmBD [ 90 { pop } dup .5 2 ] FmBD <8142241818244281> [ 45 { 2 copy lt {exch} if pop} dup .75 2 sqrt] FmBD <03060c183060c081> [ 45 { pop } {exch pop} .875 2 sqrt] FmBD <8040201008040201> [ 135 { pop } {exch pop} .875 2 sqrt] FmBD end def } { % prototype level 2 pattern dictionary % define some PostScript procedures for known jaggy patterns. /patProcDict 5 dict dup begin <0f1e3c78f0e1c387> { 3 setlinewidth -1 -1 moveto 9 9 lineto stroke 4 -4 moveto 12 4 lineto stroke -4 4 moveto 4 12 lineto stroke} bind def <0f87c3e1f0783c1e> { 3 setlinewidth -1 9 moveto 9 -1 lineto stroke -4 4 moveto 4 -4 lineto stroke 4 12 moveto 12 4 lineto stroke} bind def <8142241818244281> { 1 setlinewidth -1 9 moveto 9 -1 lineto stroke -1 -1 moveto 9 9 lineto stroke } bind def <03060c183060c081> { 1 setlinewidth -1 -1 moveto 9 9 lineto stroke 4 -4 moveto 12 4 lineto stroke -4 4 moveto 4 12 lineto stroke} bind def <8040201008040201> { 1 setlinewidth -1 9 moveto 9 -1 lineto stroke -4 4 moveto 4 -4 lineto stroke 4 12 moveto 12 4 lineto stroke} bind def end def /patDict 15 dict dup begin /PatternType 1 def % Always 1 for PS Level 2 /PaintType 2 def % Uncolored pattern /TilingType 3 def % constant spacing and faster tiling /BBox [ 0 0 8 8 ] def % bounding box /XStep 8 def % X offset /YStep 8 def % Y offset /PaintProc { begin patProcDict bstring known { patProcDict bstring get exec } { 8 8 true [1 0 0 -1 0 8] bstring imagemask } ifelse end } bind def end def } ifelse %combineColor puts together the current gray value (which could also be %a fraction of on bits for a fill pattern and the current color and calls %the appropriate function % /combineColor { FrameSepIs FMnone eq { graymode fMLevel1 or not { % Level 2 pattern [/Pattern [/DeviceCMYK]] setcolorspace FrameCurColors 0 4 getinterval aload pop FrameCurPat setcolor } { FrameCurColors 3 get 1.0 ge { FrameCurGray RealSetgray } { fMAcrobat not FMPColor graymode and and { 0 1 3 { FrameCurColors exch get 1 FrameCurGray sub mul } for RealSetcmykcolor } { 4 1 6 { FrameCurColors exch get graymode { 1 exch sub 1 FrameCurGray sub mul 1 exch sub } { 1.0 lt {FrameCurGray} {1} ifelse } ifelse } for RealSetrgbcolor } ifelse } ifelse } ifelse } { % separation case FrameCurColors 0 4 getinterval aload FrameColorInSepListCMYK { FrameSepBlack eq exch FrameSepYellow eq and exch FrameSepMagenta eq and exch FrameSepCyan eq and FrameSepIs FMcustom eq and { FrameCurGray } { 1 } ifelse } { FrameSepIs FMblack eq {FrameCurGray 1.0 exch sub mul 1.0 exch sub 4 1 roll pop pop pop} { FrameSepIs FMyellow eq {pop FrameCurGray 1.0 exch sub mul 1.0 exch sub 3 1 roll pop pop} { FrameSepIs FMmagenta eq {pop pop FrameCurGray 1.0 exch sub mul 1.0 exch sub exch pop } { FrameSepIs FMcyan eq {pop pop pop FrameCurGray 1.0 exch sub mul 1.0 exch sub } {pop pop pop pop 1} ifelse } ifelse } ifelse } ifelse } ifelse graymode fMLevel1 or not { % Level 2 pattern [/Pattern [/DeviceGray]] setcolorspace FrameCurPat setcolor } { graymode not fMLevel1 and { % Level 1 patterns are either all there or not there at all dup 1 lt {pop FrameCurGray} if } if RealSetgray } ifelse } ifelse } bind def /savematrix { orgmatrix currentmatrix pop } bind def /restorematrix { orgmatrix setmatrix } bind def /fMDefaultMatrix matrix defaultmatrix def /fMatrix2 matrix def /dpi 72 0 fMDefaultMatrix dtransform dup mul exch dup mul add sqrt def % freq and sangle are used for ps Level 1 pattern building. /freq dpi dup 72 div round dup 0 eq {pop 1} if 8 mul div def /sangle 1 0 fMDefaultMatrix dtransform exch atan def sangle fMatrix2 rotate fMDefaultMatrix fMatrix2 concatmatrix dup 0 get /sflipx exch def 3 get /sflipy exch def % % screen index depending on dpi % - screenIndex smallint /screenIndex { 0 1 dpiranges length 1 sub { dup dpiranges exch get 1 sub dpi le {exit} {pop} ifelse } for } bind def % % These routines get the standard Adobe frequencies, angles, and spot functions % depending on the DPI % % - getCyanScreen freq angle spotfunction /getCyanScreen { FMUseHighFrequencyScreens { CHighAngles CMHighFreqs} {CLowAngles CMLowFreqs} ifelse screenIndex dup 3 1 roll get 3 1 roll get /FMSpotFunction load } bind def % % - getMagentaScreen freq angle spotFunction /getMagentaScreen { FMUseHighFrequencyScreens { MHighAngles CMHighFreqs } {MLowAngles CMLowFreqs} ifelse screenIndex dup 3 1 roll get 3 1 roll get /FMSpotFunction load } bind def % % - getYellowScreen freq angle spotFunction % note that some of these use a "tripple dot" function at 1/3 the frequency /getYellowScreen { FMUseHighFrequencyScreens { YHighTDot YHighFreqs} { YLowTDot YLowFreqs } ifelse screenIndex dup 3 1 roll get 3 1 roll get { 3 div {2 { 1 add 2 div 3 mul dup floor sub 2 mul 1 sub exch} repeat FMSpotFunction } } {/FMSpotFunction load } ifelse 0.0 exch } bind def % % - getBlackScreen freq angle spotFunction /getBlackScreen { FMUseHighFrequencyScreens { KHighFreqs } { KLowFreqs } ifelse screenIndex get 45.0 /FMSpotFunction load } bind def % % - getSpotScreen freq angle spotFunction /getSpotScreen { getBlackScreen } bind def % % - getCompositeScreen freq angle spotFunction /getCompositeScreen { getBlackScreen } bind def % FmSetScreen sets the screen for either PostScript Level 1 or Level 2 and optionally % sets the accuratescreens flag in the latter case % freq angle spotfunction FMSetScreen - /FMSetScreen fMLevel1 { /setscreen load }{ { 8 dict begin /HalftoneType 1 def /SpotFunction exch def /Angle exch def /Frequency exch def /AccurateScreens FMUseAcccurateScreens def currentdict end sethalftone } bind } ifelse def % This sets the default screen as was set at the beginning of the job % - setDefaultScreen - /setDefaultScreen { FMPColor { orgrxfer cvx orggxfer cvx orgbxfer cvx orgxfer cvx setcolortransfer } { orgxfer cvx settransfer } ifelse orgfreq organgle orgproc cvx setscreen } bind def % This sets the current screen depending on FrameSepIs % - setCurrentScreen - /setCurrentScreen { FrameSepIs FMnone eq { FMUseDefaultNoSeparationScreen { setDefaultScreen } { getCompositeScreen FMSetScreen } ifelse } { FrameSepIs FMcustom eq { FMUseDefaultSpotSeparationScreen { setDefaultScreen } { getSpotScreen FMSetScreen } ifelse } { FMUseDefaultProcessSeparationScreen { setDefaultScreen } { FrameSepIs FMcyan eq { getCyanScreen FMSetScreen } { FrameSepIs FMmagenta eq { getMagentaScreen FMSetScreen } { FrameSepIs FMyellow eq { getYellowScreen FMSetScreen } { getBlackScreen FMSetScreen } ifelse } ifelse } ifelse } ifelse } ifelse } ifelse } bind def end % End of Color separation code % /FMDOCUMENT { % xscale yscale edown negative paperwidth paperheight manfeed numcopies numfonts array /FMfonts exch def % Why isn't this in FrameDict??? /#copies exch def FrameDict begin 0 ne /manualfeed exch def /paperheight exch def /paperwidth exch def 0 ne /fMNegative exch def % invert page 0 ne /edown exch def % flip page along y axis /yscale exch def /xscale exch def fMLevel1 { manualfeed {setmanualfeed} if /FMdicttop countdictstack 1 add def % some PS's leave junk on dict ... /FMoptop count def % ...or on operand stack... setpapername % This stuff may alter the transfer/screen/angle manualfeed {true} {papersize} ifelse % true->more work to do {manualpapersize} {false} ifelse % true->more work to do {desperatepapersize} {false} ifelse % true->failed completely {papersizefailure} if count -1 FMoptop {pop pop} for countdictstack -1 FMdicttop {pop end} for %...if tray not installed } {2 dict dup /PageSize [paperwidth paperheight] put manualfeed {dup /ManualFeed manualfeed put} if {setpagedevice} stopped {papersizefailure} if } ifelse % fMLevel1 FMPColor { currentcolorscreen cvlit /orgproc exch def /organgle exch def /orgfreq exch def cvlit /orgbproc exch def /orgbangle exch def /orgbfreq exch def cvlit /orggproc exch def /orggangle exch def /orggfreq exch def cvlit /orgrproc exch def /orgrangle exch def /orgrfreq exch def currentcolortransfer fMNegative { 1 1 4 { pop { 1 exch sub } fmConcatProcs 4 1 roll } for 4 copy setcolortransfer } if cvlit /orgxfer exch def cvlit /orgbxfer exch def cvlit /orggxfer exch def cvlit /orgrxfer exch def } { currentscreen cvlit /orgproc exch def /organgle exch def /orgfreq exch def currenttransfer fMNegative { { 1 exch sub } fmConcatProcs dup settransfer } if cvlit /orgxfer exch def } ifelse end % FrameDict } def % only used at startup, so no bind /FMBEGINPAGE { % pagewidth pageheight landscape color-arrays count FrameDict begin % for the whole page... /pagesave save def 3.86 setmiterlimit /landscape exch 0 ne def landscape { % check for landscape 90 rotate 0 exch dup /pwid exch def neg translate pop }{ pop /pwid exch def } ifelse edown { [-1 0 0 1 pwid 0] concat } if % paint the whole page in "white". If the page is inverted, then % this will actually paint our black background 0 0 moveto paperwidth 0 lineto paperwidth paperheight lineto 0 paperheight lineto 0 0 lineto 1 setgray fill xscale yscale scale /orgmatrix matrix def gsave % for CLIP } def % only used infrequently, so no bind /FMENDPAGE { grestore % for CLIP pagesave restore end % FrameDict showpage } def % only used infrequently, so no bind /FMFONTDEFINE { % fontindex nonstd_encoding fontname -- FrameDict begin findfont % fontindex nonstd_encoding font ReEncode % fontindex font' 1 index exch % fontindex fontindex font' definefont % fontindex font" FMfonts 3 1 roll % FMfonts fontindex font" put end % FrameDict } def % only used infrequently, so no bind /FMFILLS { FrameDict begin dup array /fillvals exch def dict /patCache exch def end % framedict } def % Only called once, so no bind /FMFILL { FrameDict begin fillvals 3 1 roll put end % FrameDict } def % only used infrequently, so no bind % Set things to a known, quiescent state, for when we switch to another writer /FMNORMALIZEGRAPHICS { newpath 1 setlinewidth 0 setlinecap 0 0 0 sethsbcolor 0 setgray % Not FMsetgray; only called outside of our environment! } bind def /FMBEGINEPSF { % llx lly urx ury fw fh fx fy end % FrameDict /FMEPSF save def % in userdict /showpage {} def % this def is in userdict %- See Adobe's "PostScript Language Reference Manual, 2nd Edition", page 714. %- "...the following operators MUST NOT be used in an EPS file:" (emphasis ours) /banddevice {(banddevice) FMBADEPSF} def /clear {(clear) FMBADEPSF} def /cleardictstack {(cleardictstack) FMBADEPSF} def % FMBADEPSF knows this is the longest! /copypage {(copypage) FMBADEPSF} def /erasepage {(erasepage) FMBADEPSF} def /exitserver {(exitserver) FMBADEPSF} def /framedevice {(framedevice) FMBADEPSF} def /grestoreall {(grestoreall) FMBADEPSF} def /initclip {(initclip) FMBADEPSF} def /initgraphics {(initgraphics) FMBADEPSF} def % /initmatrix {(initmatrix) FMBADEPSF} def % Aldus Freehand 4.0 epsf uses this harmlessly /quit {(quit) FMBADEPSF} def /renderbands {(renderbands) FMBADEPSF} def /setglobal {(setglobal) FMBADEPSF} def /setpagedevice {(setpagedevice) FMBADEPSF} def /setshared {(setshared) FMBADEPSF} def /startjob {(startjob) FMBADEPSF} def /lettertray {(lettertray) FMBADEPSF} def /letter {(letter) FMBADEPSF} def /lettersmall {(lettersmall) FMBADEPSF} def /11x17tray {(11x17tray) FMBADEPSF} def /11x17 {(11x17) FMBADEPSF} def /ledgertray {(ledgertray) FMBADEPSF} def /ledger {(ledger) FMBADEPSF} def /legaltray {(legaltray) FMBADEPSF} def /legal {(legal) FMBADEPSF} def /statementtray {(statementtray) FMBADEPSF} def /statement {(statement) FMBADEPSF} def /executivetray {(executivetray) FMBADEPSF} def /executive {(executive) FMBADEPSF} def /a3tray {(a3tray) FMBADEPSF} def /a3 {(a3) FMBADEPSF} def /a4tray {(a4tray) FMBADEPSF} def /a4 {(a4) FMBADEPSF} def /a4small {(a4small) FMBADEPSF} def /b4tray {(b4tray) FMBADEPSF} def /b4 {(b4) FMBADEPSF} def /b5tray {(b5tray) FMBADEPSF} def /b5 {(b5) FMBADEPSF} def FMNORMALIZEGRAPHICS % in case we're in a strange state [/fy /fx /fh /fw /ury /urx /lly /llx] {exch def} forall % neat trick fx fw 2 div add fy fh 2 div add translate rotate fw 2 div neg fh 2 div neg translate fw urx llx sub div fh ury lly sub div scale % then scale llx neg lly neg translate % then compensate for LL offset /FMdicttop countdictstack 1 add def % high-water mark of dict stack /FMoptop count def % tricky! "/FMoptop" on stack } bind def /FMENDEPSF { count -1 FMoptop {pop pop} for % clear EPS junk from operand stack countdictstack -1 FMdicttop {pop end} for % ditto for dict stack FMEPSF restore FrameDict begin % for the whole page... } bind def FrameDict begin % put most defs here /setmanualfeed { %%BeginFeature *ManualFeed True statusdict /manualfeed true put %%EndFeature } bind def /max {2 copy lt {exch} if pop} bind def /min {2 copy gt {exch} if pop} bind def /inch {72 mul} def /pagedimen { % name width height paperheight sub abs 16 lt exch % 16pt is an arbitrary slop amount paperwidth sub abs 16 lt and {/papername exch def} {pop} ifelse } bind def /setpapername { % Already set up: paperwidth paperheight and manualfeed /papersizedict 14 dict def % one for /papername, one for /unknown papersizedict begin /papername /unknown def % in case no match /Letter 8.5 inch 11.0 inch pagedimen /LetterSmall 7.68 inch 10.16 inch pagedimen /Tabloid 11.0 inch 17.0 inch pagedimen /Ledger 17.0 inch 11.0 inch pagedimen /Legal 8.5 inch 14.0 inch pagedimen /Statement 5.5 inch 8.5 inch pagedimen /Executive 7.5 inch 10.0 inch pagedimen /A3 11.69 inch 16.5 inch pagedimen /A4 8.26 inch 11.69 inch pagedimen /A4Small 7.47 inch 10.85 inch pagedimen /B4 10.125 inch 14.33 inch pagedimen /B5 7.16 inch 10.125 inch pagedimen end } bind def /papersize { papersizedict begin /Letter {lettertray letter} def /LetterSmall {lettertray lettersmall} def /Tabloid {11x17tray 11x17} def /Ledger {ledgertray ledger} def /Legal {legaltray legal} def /Statement {statementtray statement} def /Executive {executivetray executive} def /A3 {a3tray a3} def /A4 {a4tray a4} def /A4Small {a4tray a4small} def /B4 {b4tray b4} def /B5 {b5tray b5} def /unknown {unknown} def papersizedict dup papername known {papername} {/unknown} ifelse get end statusdict begin stopped end % return true if more work to do } bind def /manualpapersize { papersizedict begin /Letter {letter} def /LetterSmall {lettersmall} def /Tabloid {11x17} def /Ledger {ledger} def /Legal {legal} def /Statement {statement} def /Executive {executive} def /A3 {a3} def /A4 {a4} def /A4Small {a4small} def /B4 {b4} def /B5 {b5} def /unknown {unknown} def papersizedict dup papername known {papername} {/unknown} ifelse get end stopped % return true if more work to do } bind def /desperatepapersize { statusdict /setpageparams known { paperwidth paperheight 0 1 statusdict begin {setpageparams} stopped % return true iff failed end } {true} ifelse % return true iff failed } bind def /papersizefailure { FMAllowPaperSizeMismatch not { (The requested paper size is not available in any currently-installed tray) (Edit the PS file to "FMAllowPaperSizeMismatch true" to use default tray) FMFAILURE } if } def % % Font re-encoding to include diacritics % /DiacriticEncoding [ /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /space /exclam /quotedbl /numbersign /dollar /percent /ampersand /quotesingle /parenleft /parenright /asterisk /plus /comma /hyphen /period /slash /zero /one /two /three /four /five /six /seven /eight /nine /colon /semicolon /less /equal /greater /question /at /A /B /C /D /E /F /G /H /I /J /K /L /M /N /O /P /Q /R /S /T /U /V /W /X /Y /Z /bracketleft /backslash /bracketright /asciicircum /underscore /grave /a /b /c /d /e /f /g /h /i /j /k /l /m /n /o /p /q /r /s /t /u /v /w /x /y /z /braceleft /bar /braceright /asciitilde /.notdef /Adieresis /Aring /Ccedilla /Eacute /Ntilde /Odieresis /Udieresis /aacute /agrave /acircumflex /adieresis /atilde /aring /ccedilla /eacute /egrave /ecircumflex /edieresis /iacute /igrave /icircumflex /idieresis /ntilde /oacute /ograve /ocircumflex /odieresis /otilde /uacute /ugrave /ucircumflex /udieresis /dagger /.notdef /cent /sterling /section /bullet /paragraph /germandbls /registered /copyright /trademark /acute /dieresis /.notdef /AE /Oslash /.notdef /.notdef /.notdef /.notdef /yen /.notdef /.notdef /.notdef /.notdef /.notdef /.notdef /ordfeminine /ordmasculine /.notdef /ae /oslash /questiondown /exclamdown /logicalnot /.notdef /florin /.notdef /.notdef /guillemotleft /guillemotright /ellipsis /.notdef /Agrave /Atilde /Otilde /OE /oe /endash /emdash /quotedblleft /quotedblright /quoteleft /quoteright /.notdef /.notdef /ydieresis /Ydieresis /fraction /currency /guilsinglleft /guilsinglright /fi /fl /daggerdbl /periodcentered /quotesinglbase /quotedblbase /perthousand /Acircumflex /Ecircumflex /Aacute /Edieresis /Egrave /Iacute /Icircumflex /Idieresis /Igrave /Oacute /Ocircumflex /.notdef /Ograve /Uacute /Ucircumflex /Ugrave /dotlessi /circumflex /tilde /macron /breve /dotaccent /ring /cedilla /hungarumlaut /ogonek /caron ] def /ReEncode { % nonstd_encoding font -- reencodedfont dup % nonstd_encoding font font length % nonstd_encoding font dictlength dict begin % nonstd_encoding font % currentdict = newdict {% forall % forall is over font to be copied 1 index /FID ne % skip FID {def} % defs go into newfontdict which is currentdict {pop pop} ifelse % copy all keys including /Encoding } forall % nonstd_encoding 0 eq {/Encoding DiacriticEncoding def} if % -- currentdict % push a copy of the copied font dict onto operand stack end % font' % before popping it off dictionary stack } bind def FMPColor % setup procs for color printing { /BEGINBITMAPCOLOR { % iw, ih, width, height, theta, x y BITMAPCOLOR} def /BEGINBITMAPCOLORc { % iw, ih, width, height, theta, x y BITMAPCOLORc} def /BEGINBITMAPTRUECOLOR { BITMAPTRUECOLOR } def /BEGINBITMAPTRUECOLORc { BITMAPTRUECOLORc } def /BEGINBITMAPCMYK { BITMAPCMYK } def /BEGINBITMAPCMYKc { BITMAPCMYKc } def } % setup procs for B&W printing { /BEGINBITMAPCOLOR { % iw, ih, width, height, theta, x y BITMAPGRAY} def /BEGINBITMAPCOLORc { % iw, ih, width, height, theta, x y BITMAPGRAYc} def /BEGINBITMAPTRUECOLOR { BITMAPTRUEGRAY } def /BEGINBITMAPTRUECOLORc { BITMAPTRUEGRAYc } def /BEGINBITMAPCMYK { BITMAPCMYKGRAY } def /BEGINBITMAPCMYKc { BITMAPCMYKGRAYc } def } ifelse /K { % c m y k r g b SEPARATION FMPrintAllColorsAsBlack { dup 1 eq 2 index 1 eq and 3 index 1 eq and not {7 {pop} repeat 0 0 0 1 0 0 0} if } if FrameCurColors astore pop combineColor } bind def % % graymode is true if we are just doing gray fills, this way do not keep calling % setscreen. I don't know what the cost is on calling setscreen with defaults, but % this is easy to keep track of, and we know for sure we aren't wasting cycles. % if graymode is false and fMLevel1 is false, then we are using Level 2 patterns. % /graymode true def % used by level 1 patterns % defaultflip matrixentry fmGetFlit -> eith -1 or 1 fMLevel1 { /fmGetFlip { fMatrix2 exch get mul 0 lt { -1 } { 1 } ifelse } FmBD } if /setPatternMode { fMLevel1 { 2 index patScreenDict exch known { pop pop patScreenDict exch get aload pop % angle spot fspot gray mult freq % freq mul % times multiplier 5 2 roll % angle spot fspot gray mult freq -> gray freq angle spot fspot fMatrix2 currentmatrix 1 get 0 ne { 3 -1 roll 90 add 3 1 roll % landscape sflipx 1 fmGetFlip sflipy 2 fmGetFlip neg mul } { % portrait sflipx 0 fmGetFlip sflipy 3 fmGetFlip mul } ifelse 0 lt {exch pop} {pop} ifelse % take regular or flipped spot function fMNegative { {neg} fmConcatProcs % invert spot function } if bind % we need to bypass any screen filter and go directly to systemdict % to avoid problems with Kodak Precision calibration software % systemdict /setscreen get exec % leave graylevel on stack /FrameCurGray exch def } { /bwidth exch def /bpside exch def /bstring exch def /onbits 0 def /offbits 0 def freq sangle landscape {90 add} if {/ypoint exch def /xpoint exch def /xindex xpoint 1 add 2 div bpside mul cvi def /yindex ypoint 1 add 2 div bpside mul cvi def bstring yindex bwidth mul xindex 8 idiv add get 1 7 xindex 8 mod sub bitshift and 0 ne fMNegative {not} if {/onbits onbits 1 add def 1} {/offbits offbits 1 add def 0} ifelse } setscreen offbits offbits onbits add div fMNegative {1.0 exch sub} if /FrameCurGray exch def } ifelse } { % Level 2 version pop pop dup patCache exch known { patCache exch get } { % not in cache dup patDict /bstring 3 -1 roll put patDict 9 PatFreq screenIndex get div dup matrix scale % 9 orgfreq % organgle sin abs organgle cos abs add div % dup 16 div round dup 0 le {pop 1} if % Unix pattern size % dup 9 div round dup 0 le {pop 1} if % Mac larger (WYSIWYG) size % div div dup matrix scale % This gives Unix pattern size. makepattern dup patCache 4 -1 roll 3 -1 roll put } ifelse /FrameCurGray 0 def /FrameCurPat exch def } ifelse /graymode false def combineColor } bind def /setGrayScaleMode { graymode not { /graymode true def fMLevel1 { setCurrentScreen } if } if /FrameCurGray exch def combineColor } bind def /normalize { transform round exch round exch itransform } bind def /dnormalize { dtransform round exch round exch idtransform } bind def /lnormalize { % line widths are always odd so that arrow heads work 0 dtransform exch cvi 2 idiv 2 mul 1 add exch idtransform pop } bind def /H { % THICK lnormalize setlinewidth } bind def /Z { setlinecap } bind def % This is used to fill or stroke white behind a Level 2 pattern /PFill { graymode fMLevel1 or not { gsave 1 setgray eofill grestore } if } bind def /PStroke { graymode fMLevel1 or not { gsave 1 setgray stroke grestore } if stroke } bind def /X { % TEXTURE fillvals exch get dup type /stringtype eq {8 1 setPatternMode} % Silly to pass parameters here {setGrayScaleMode} ifelse } bind def /V { % FILL PFill gsave eofill grestore } bind def /Vclip { clip } bind def /Vstrk { currentlinewidth exch setlinewidth PStroke setlinewidth } bind def /N { % PEN PStroke } bind def /Nclip { strokepath clip newpath } bind def /Nstrk { currentlinewidth exch setlinewidth PStroke setlinewidth } bind def /M {newpath moveto} bind def /E {lineto} bind def /D {curveto} bind def /O {closepath} bind def /L { % POLYLINE /n exch def newpath normalize moveto 2 1 n {pop normalize lineto} for } bind def /Y { % POLYGON !!! L % POLYLINE closepath } bind def /R { % RECT x1 y1 x2 y2 /y2 exch def /x2 exch def /y1 exch def /x1 exch def x1 y1 x2 y1 x2 y2 x1 y2 4 Y % POLYGON } bind def /rarc % Leaves all sorts of junk on the operand stack for caller to clear off {rad % arcto might fail if we're scaled way down arcto } bind def /RR { % ROUNDRECT x1 y1 x2 y2 r /rad exch def normalize /y2 exch def /x2 exch def normalize /y1 exch def /x1 exch def mark newpath { x1 y1 rad add moveto x1 y2 x2 y2 rarc x2 y2 x2 y1 rarc x2 y1 x1 y1 rarc x1 y1 x1 y2 rarc closepath } stopped {x1 y1 x2 y2 R} if % in case rarc failed for degenerate arcs cleartomark } bind def /RRR { % ROUNDRECT ROTATED xs ys x1 y1 x2 y2 x3 y3 x4 y4 r /rad exch def normalize /y4 exch def /x4 exch def normalize /y3 exch def /x3 exch def normalize /y2 exch def /x2 exch def normalize /y1 exch def /x1 exch def newpath normalize moveto % eats xs ys mark { x2 y2 x3 y3 rarc x3 y3 x4 y4 rarc x4 y4 x1 y1 rarc x1 y1 x2 y2 rarc closepath } stopped {x1 y1 x2 y2 x3 y3 x4 y4 newpath moveto lineto lineto lineto closepath} if cleartomark } bind def /C { % CLIP grestore gsave R % RECT clip setCurrentScreen } bind def /CP { % CLIPPOLY p1x p1y p2x p2y ... n grestore gsave Y % POLYGON clip setCurrentScreen } bind def /F { % FONT FMfonts exch get FMpointsize scalefont setfont } bind def /Q { % POINTSIZE (& font) /FMpointsize exch def F % could be slightly optimized here } bind def /T { % TEXT moveto show } bind def % Callers of RF (rotate/flip) must gsave (or save) first; (g)restore when done /RF { % rotate 0 ne {-1 1 scale} if } bind def /TF { % TEXTFLIPROTATE gsave moveto RF show grestore } bind def /P { % PADTEXT moveto 0 32 3 2 roll widthshow } bind def /PF { % PADTEXTFLIPROTATE gsave moveto RF 0 32 3 2 roll widthshow grestore } bind def /S { % SPREADTEXT moveto 0 exch ashow } bind def /SF { % SPREADTEXTFLIPROTATE gsave moveto RF 0 exch ashow grestore } bind def /B { % PADSPREADTEXT moveto 0 32 4 2 roll 0 exch awidthshow } bind def /BF { % PADSPREADTEXTFLIPROTATE gsave moveto RF 0 32 4 2 roll 0 exch awidthshow grestore } bind def /G { % ARCFILL theta1 theta2 width height x y gsave newpath normalize translate 0.0 0.0 moveto % eats x y dnormalize scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 closepath PFill fill grestore } bind def /Gstrk { savematrix newpath 2 index 2 div add exch 3 index 2 div sub exch % theta1 theta2 width height x y normalize 2 index 2 div sub exch 3 index 2 div add exch % theta1 theta2 width height x y translate scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 restorematrix currentlinewidth exch setlinewidth PStroke setlinewidth } bind def /Gclip { % ARCFILL theta1 theta2 width height x y swid newpath savematrix normalize translate 0.0 0.0 moveto % eats x y dnormalize scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 closepath clip newpath restorematrix } bind def /GG { % ARCFILL ROTATED theta1 theta2 width height angle x y gsave newpath normalize translate 0.0 0.0 moveto % eats x y rotate % eats angle dnormalize scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 closepath PFill fill grestore } bind def /GGclip { % ARCFILL ROTATED theta1 theta2 width height angle x y savematrix newpath normalize translate 0.0 0.0 moveto % eats x y rotate % eats angle dnormalize scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 closepath clip newpath restorematrix } bind def /GGstrk { % ARCFILL ROTATED swid theta1 theta2 width height angle x y savematrix newpath normalize translate 0.0 0.0 moveto % eats x y rotate % eats angle dnormalize scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 closepath restorematrix currentlinewidth exch setlinewidth PStroke setlinewidth } bind def /A { % ARCPEN theta1 theta2 width height x y gsave savematrix newpath 2 index 2 div add exch 3 index 2 div sub exch % theta1 theta2 width height x y normalize 2 index 2 div sub exch 3 index 2 div add exch % theta1 theta2 width height x y translate scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 restorematrix PStroke grestore } bind def /Aclip { newpath savematrix normalize translate 0.0 0.0 moveto % eats x y dnormalize scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 closepath strokepath clip newpath restorematrix } bind def /Astrk { Gstrk } bind def /AA { % ARCPEN ROTATED theta1 theta2 width height angle x y gsave savematrix newpath % theta1 theta2 width height angle x y 3 index 2 div add exch 4 index 2 div sub exch % theta1 theta2 width height angle x y normalize 3 index 2 div sub exch 4 index 2 div add exch translate % eats x y rotate % eats angle scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 restorematrix PStroke grestore } bind def /AAclip { savematrix newpath normalize translate 0.0 0.0 moveto % eats x y rotate % eats angle dnormalize scale % eats width height 0.0 0.0 1.0 5 3 roll arc % eats theta1 theta2 closepath strokepath clip newpath restorematrix } bind def /AAstrk { GGstrk } bind def /BEGINPRINTCODE { % -x -y width height /FMdicttop countdictstack 1 add def % high-water mark of dict stack /FMoptop count 7 sub def % tricky! 7 params on stack, plus "/FMoptop" /FMsaveobject save def userdict begin % insulate user from FrameDict; not in /FMdicttop count /showpage {} def % this def is in userdict FMNORMALIZEGRAPHICS % in case we're in a strange state 3 index neg 3 index neg translate } bind def /ENDPRINTCODE { count -1 FMoptop {pop pop} for % clear user junk from operand stack countdictstack -1 FMdicttop {pop end} for % ditto for dict stack FMsaveobject restore % this is now safe, unless user very malicious } bind def /gn { % get a number in a funny encoding scheme 0 % result on stack { 46 mul % shift old digits cf read pop % get next character 32 sub % zero is the space character dup 46 lt {exit} if % quit if we're the last digit 46 sub add % add in this digit and loop around for next } loop add % result on stack } bind def /cfs { % create a string of length "sl" filled with "val"s /str sl string def % create string as "str" 0 1 sl 1 sub {str exch val put} for % fill array str def % define real array name, too; name is on stack from caller } bind def /ic [ % "case" stmt list of procedures that the image commands should call 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0223 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0223 0 {0 hx} {1 hx} {2 hx} {3 hx} {4 hx} {5 hx} {6 hx} {7 hx} {8 hx} {9 hx} {10 hx} {11 hx} {12 hx} {13 hx} {14 hx} {15 hx} {16 hx} {17 hx} {18 hx} {19 hx} {gn hx} {0} {1} {2} {3} {4} {5} {6} {7} {8} {9} {10} {11} {12} {13} {14} {15} {16} {17} {18} {19} {gn} {0 wh} {1 wh} {2 wh} {3 wh} {4 wh} {5 wh} {6 wh} {7 wh} {8 wh} {9 wh} {10 wh} {11 wh} {12 wh} {13 wh} {14 wh} {gn wh} {0 bl} {1 bl} {2 bl} {3 bl} {4 bl} {5 bl} {6 bl} {7 bl} {8 bl} {9 bl} {10 bl} {11 bl} {12 bl} {13 bl} {14 bl} {gn bl} {0 fl} {1 fl} {2 fl} {3 fl} {4 fl} {5 fl} {6 fl} {7 fl} {8 fl} {9 fl} {10 fl} {11 fl} {12 fl} {13 fl} {14 fl} {gn fl} ] def /ms { % make all the strings /sl exch def % remember length of currently existing strings /val 255 def % that's white /ws cfs % make "ws" a string filled with white /im cfs % and "im" is a complete image scanline /val 0 def % that's black /bs cfs % make "bs" a string filled with black /cs cfs % here's where we'll put complete command lines } bind def 400 ms % make strings that will be plenty long for most applications /ip { % image procedure; reads and executes commands to make scanlines is % leave image string and... 0 % ...image position on stack all through this procedure cf cs readline pop % get a string of commands { ic exch get exec % execute next command add % all commands leave a length on the stack; update pos } forall % step through all commands pop % get rid of image position pointer % image string left on stack, so it's returned to image primitive } bind def /rip { % this is similar to ip above, except for 24 bit images % this takes an extra argument, the width of the image % do red bis ris copy pop % copy blue to red is 0 cf cs readline pop { ic exch get exec add } forall pop pop % remove is and position from stack ris gis copy pop % copy red to green dup is exch % position of green is width bytes into is % do green cf cs readline pop { ic exch get exec add } forall pop pop gis bis copy pop % copy green to blue dup add is exch % position of blue is 2*width bytes into is % do blue cf cs readline pop { ic exch get exec add } forall pop } bind def /rip4 { % this is similar to ip above, except for 32 bit images % this takes an extra argument, the width of the image % do cyan kis cis copy pop % copy black to cyan is 0 cf cs readline pop { ic exch get exec add } forall pop pop % remove is and position from stack cis mis copy pop % copy cyan to magenta dup is exch % position of magenta is width bytes into is % do magenta cf cs readline pop { ic exch get exec add } forall pop pop mis yis copy pop % copy magenta to yellow dup dup add is exch % position of yellow is 2*width bytes into is % do yellow cf cs readline pop { ic exch get exec add } forall pop pop yis kis copy pop % copy yellow to black 3 mul is exch % position of black is 3*width bytes into is % do black cf cs readline pop { ic exch get exec add } forall pop } bind def /wh { % fill a number of bytes with "white" /len exch def % number of bytes to fill /pos exch def % position to put them at ws 0 len getinterval im pos len getinterval copy pop pos len % remember where we got to } bind def /bl { % fill a number of bytes with "black" /len exch def % number of bytes to fill /pos exch def % position to put them at bs 0 len getinterval im pos len getinterval copy pop pos len % remember where we got to } bind def /s1 1 string def /fl { % fill a number of bytes with a specific hex value /len exch def % number of bytes to fill /pos exch def % position to put them at /val cf s1 readhexstring pop 0 get def pos 1 pos len add 1 sub {im exch val put} for pos len % remember where we got to } bind def /hx { % read hex bytes directly; on entry, stack has 3 copy getinterval % stack has cf exch readhexstring pop pop % stack back to } bind def /wbytes { % width depth -> wb find width in bytes given 1, 2, 8 or 24 or 32 dup dup 8 gt { pop 8 idiv mul } { 8 eq {pop} {1 eq {7 add 8 idiv} {3 add 4 idiv} ifelse} ifelse } ifelse } bind def /BEGINBITMAPBWc { % iw, ih, width, height, theta, x y 1 {} COMMONBITMAPc } bind def /BEGINBITMAPGRAYc { % iw, ih, width, height, theta, x y 8 {} COMMONBITMAPc } bind def /BEGINBITMAP2BITc { % iw, ih, width, height, theta, x y 2 {} COMMONBITMAPc } bind def % % Common routine for imaging compressed images % /COMMONBITMAPc { % iw, ih, width, height, theta, x y depth proc % (x,y) is the lower left corner of the image /cvtProc exch def /depth exch def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /lb width depth wbytes def % so "lb" has width in bytes sl lb lt {lb ms} if % maybe make bigger strings /bitmapsave save def % LW+ has a buggy memory leak! cvtProc % run the desired proc after save has occurred /is im 0 lb getinterval def % image substring ws 0 lb getinterval is copy pop % whiten it /cf currentfile def % evaluate "currentfile" only once width height depth [width 0 0 height neg 0 height] % top to bottom {ip} image % zap! bitmapsave restore % avoid occasional disaster on the LW+ grestore } bind def /BEGINBITMAPBW { % iw, ih, width, height, theta, x y 1 {} COMMONBITMAP } bind def /BEGINBITMAPGRAY { % iw, ih, width, height, theta, x y 8 {} COMMONBITMAP } bind def /BEGINBITMAP2BIT { % iw, ih, width, height, theta, x y 2 {} COMMONBITMAP } bind def % % Common routine for uncompressed images % /COMMONBITMAP { % iw, ih, width, height, theta, x y depth proc /cvtProc exch def /depth exch def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /bitmapsave save def % LW+ has a buggy memory leak! cvtProc % run the desired proc after save has occurred /is width depth wbytes string def /cf currentfile def % evaluate "currentfile" only once width height depth [width 0 0 height neg 0 height] % top to bottom {cf is readhexstring pop} image bitmapsave restore % avoid occasional disaster on the LW+ grestore } bind def % % All this hairy color setup stuff gus wrote on the mac, I just copied and % changed the variable names to be humanly readable. /ngrayt 256 array def /nredt 256 array def /nbluet 256 array def /ngreent 256 array def fMLevel1 { /colorsetup { currentcolortransfer /gryt exch def /blut exch def /grnt exch def /redt exch def 0 1 255 { /indx exch def /cynu 1 red indx get 255 div sub def /magu 1 green indx get 255 div sub def /yelu 1 blue indx get 255 div sub def /kk cynu magu min yelu min def % The HP PaintJet XL300 ignores the gray transfer curve but still sets its % default black generation and undercolor removal functions as if it is % used. This causes black colors not to work. Bug#56844 % - We go back to the old (correct?) way of doing this since this code % is now bypassed for PS Level 2 printers in favor of colorSetup2 which % uses PS Level 2 indexed color, which is much cleaner. /u kk currentundercolorremoval exec def %- /u 0 def nredt indx 1 0 cynu u sub max sub redt exec put ngreent indx 1 0 magu u sub max sub grnt exec put nbluet indx 1 0 yelu u sub max sub blut exec put ngrayt indx 1 kk currentblackgeneration exec sub gryt exec put } for {255 mul cvi nredt exch get} {255 mul cvi ngreent exch get} {255 mul cvi nbluet exch get} {255 mul cvi ngrayt exch get} setcolortransfer {pop 0} setundercolorremoval {} setblackgeneration } bind def } { % Here, we set up indexed color for imaging on PS Level 2 without mucking around % with the transfer functions. /colorSetup2 { [ /Indexed /DeviceRGB 255 {dup red exch get 255 div exch dup green exch get 255 div exch blue exch get 255 div} ] setcolorspace } bind def } ifelse % % Setup a transfer function to convert psuedo color values into grayscale % values based on the color lookup tables. % /fakecolorsetup { /tran 256 string def 0 1 255 {/indx exch def tran indx red indx get 77 mul green indx get 151 mul blue indx get 28 mul add add 256 idiv put} for currenttransfer {255 mul cvi tran exch get 255.0 div} exch fmConcatProcs settransfer } bind def % % image a color image % /BITMAPCOLOR { % iw, ih, width, height, theta, x y /depth 8 def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /bitmapsave save def fMLevel1 { colorsetup /is width depth wbytes string def /cf currentfile def % evaluate "currentfile" only once width height depth [width 0 0 height neg 0 height] % top to bottom {cf is readhexstring pop} {is} {is} true 3 colorimage } { colorSetup2 /is width depth wbytes string def /cf currentfile def % evaluate "currentfile" only once 7 dict dup begin /ImageType 1 def /Width width def /Height height def /ImageMatrix [width 0 0 height neg 0 height] def /DataSource {cf is readhexstring pop} bind def /BitsPerComponent depth def /Decode [0 255] def end image } ifelse bitmapsave restore grestore } bind def % % Compressed color image rendering % /BITMAPCOLORc { % iw, ih, width, height, theta, x y /depth 8 def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /lb width depth wbytes def % so "lb" has width in bytes sl lb lt {lb ms} if % maybe make bigger strings /bitmapsave save def fMLevel1 { colorsetup /is im 0 lb getinterval def % image substring ws 0 lb getinterval is copy pop % whiten it /cf currentfile def % evaluate "currentfile" only once width height depth [width 0 0 height neg 0 height] % top to bottom {ip} {is} {is} true 3 colorimage } { colorSetup2 /is im 0 lb getinterval def % image substring ws 0 lb getinterval is copy pop % whiten it /cf currentfile def % evaluate "currentfile" only once 7 dict dup begin /ImageType 1 def /Width width def /Height height def /ImageMatrix [width 0 0 height neg 0 height] def /DataSource {ip} bind def /BitsPerComponent depth def /Decode [0 255] def end image } ifelse bitmapsave restore grestore } bind def /BITMAPTRUECOLORc { /depth 24 def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /lb width depth wbytes def % so "lb" has width in bytes sl lb lt {lb ms} if % maybe make bigger strings /bitmapsave save def /is im 0 lb getinterval def % Whole scanline /ris im 0 width getinterval def % red part of im /gis im width width getinterval def % green part of im /bis im width 2 mul width getinterval def % blue part of im ws 0 lb getinterval is copy pop /cf currentfile def width height 8 [width 0 0 height neg 0 height] {width rip pop ris} {gis} {bis} true 3 colorimage bitmapsave restore grestore } bind def /BITMAPCMYKc { /depth 32 def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /lb width depth wbytes def % so "lb" has width in bytes sl lb lt {lb ms} if % maybe make bigger strings /bitmapsave save def /is im 0 lb getinterval def % Whole scanline /cis im 0 width getinterval def % cyan part of im /mis im width width getinterval def % magenta part of im /yis im width 2 mul width getinterval def % yellow part of im /kis im width 3 mul width getinterval def % black part of im ws 0 lb getinterval is copy pop /cf currentfile def width height 8 [width 0 0 height neg 0 height] {width rip4 pop cis} {mis} {yis} {kis} true 4 colorimage bitmapsave restore grestore } bind def /BITMAPTRUECOLOR { gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /bitmapsave save def /is width string def /gis width string def /bis width string def /cf currentfile def width height 8 [width 0 0 height neg 0 height] { cf is readhexstring pop } { cf gis readhexstring pop } { cf bis readhexstring pop } true 3 colorimage bitmapsave restore grestore } bind def /BITMAPCMYK { gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /bitmapsave save def /is width string def /mis width string def /yis width string def /kis width string def /cf currentfile def width height 8 [width 0 0 height neg 0 height] { cf is readhexstring pop } { cf mis readhexstring pop } { cf yis readhexstring pop } { cf kis readhexstring pop } true 4 colorimage bitmapsave restore grestore } bind def % % image a color image to a b&width device % /BITMAPTRUEGRAYc { /depth 24 def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /lb width depth wbytes def % so "lb" has width in bytes sl lb lt {lb ms} if % maybe make bigger strings /bitmapsave save def /is im 0 lb getinterval def % Whole scanline /ris im 0 width getinterval def % red part of im /gis im width width getinterval def % green part of im /bis im width 2 mul width getinterval def % blue part of im ws 0 lb getinterval is copy pop /cf currentfile def width height 8 [width 0 0 height neg 0 height] {width rip pop ris gis bis width gray} image bitmapsave restore grestore } bind def /BITMAPCMYKGRAYc { /depth 32 def gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /lb width depth wbytes def % so "lb" has width in bytes sl lb lt {lb ms} if % maybe make bigger strings /bitmapsave save def /is im 0 lb getinterval def % Whole scanline /cis im 0 width getinterval def % cyan part of im /mis im width width getinterval def % magenta part of im /yis im width 2 mul width getinterval def % yellow part of im /kis im width 3 mul width getinterval def % black part of im ws 0 lb getinterval is copy pop /cf currentfile def width height 8 [width 0 0 height neg 0 height] {width rip pop cis mis yis kis width cgray} image bitmapsave restore grestore } bind def /cgray { % c m y k width /ww exch def /k exch def /y exch def /m exch def /c exch def 0 1 ww 1 sub { /i exch def c i get m i get y i get k i get CMYKtoRGB .144 mul 3 1 roll .587 mul 3 1 roll .299 mul add add c i 3 -1 roll floor cvi put } for c } bind def /gray { % r g b width /ww exch def /b exch def /g exch def /r exch def 0 1 ww 1 sub { /i exch def r i get .299 mul g i get .587 mul b i get .114 mul add add r i 3 -1 roll floor cvi put } for r } bind def /BITMAPTRUEGRAY { gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /bitmapsave save def /is width string def /gis width string def /bis width string def /cf currentfile def width height 8 [width 0 0 height neg 0 height] { cf is readhexstring pop cf gis readhexstring pop cf bis readhexstring pop width gray} image bitmapsave restore grestore } bind def /BITMAPCMYKGRAY { gsave % rotate about center of image 3 index 2 div add exch % iw ih width height theta y+(height/2) x 4 index 2 div add exch % iw ih width height theta x+(width/2) y+(height/2) translate % iw ih width height theta rotate % iw ih width height 1 index 2 div neg % iw ih width height -(width/2) 1 index 2 div neg % iw ih width height -(width/2) -(height/2) translate % iw ih width height scale % iw ih /height exch def /width exch def /bitmapsave save def /is width string def /yis width string def /mis width string def /kis width string def /cf currentfile def width height 8 [width 0 0 height neg 0 height] { cf is readhexstring pop cf mis readhexstring pop cf yis readhexstring pop cf kis readhexstring pop width cgray} image bitmapsave restore grestore } bind def /BITMAPGRAY { % iw, ih, width, height, theta, x y 8 {fakecolorsetup} COMMONBITMAP } bind def /BITMAPGRAYc { % iw, ih, width, height, theta, x y 8 {fakecolorsetup} COMMONBITMAPc } bind def /ENDBITMAP { } bind def end % of FrameDict definitions % OPI stuff /ALDmatrix matrix def ALDmatrix currentmatrix pop /StartALD { /ALDsave save def savematrix ALDmatrix setmatrix } bind def /InALD { restorematrix } bind def /DoneALD { ALDsave restore } bind def % Dashed lines stuff /I { setdash } bind def /J { [] 0 setdash } bind def %%EndProlog %%BeginSetup (5.0) FMVERSION 1 1 0 0 612 792 0 1 28 FMDOCUMENT 0 0 /Helvetica-Bold FMFONTDEFINE 1 0 /Times-Italic FMFONTDEFINE 2 0 /Times-Roman FMFONTDEFINE 3 1 /Symbol FMFONTDEFINE 4 0 /Times-Bold FMFONTDEFINE 5 0 /Helvetica-Oblique FMFONTDEFINE 32 FMFILLS 0 0 FMFILL 1 0.1 FMFILL 2 0.3 FMFILL 3 0.5 FMFILL 4 0.7 FMFILL 5 0.9 FMFILL 6 0.97 FMFILL 7 1 FMFILL 8 <0f1e3c78f0e1c387> FMFILL 9 <0f87c3e1f0783c1e> FMFILL 10 FMFILL 11 FMFILL 12 <8142241818244281> FMFILL 13 <03060c183060c081> FMFILL 14 <8040201008040201> FMFILL 16 1 FMFILL 17 0.9 FMFILL 18 0.7 FMFILL 19 0.5 FMFILL 20 0.3 FMFILL 21 0.1 FMFILL 22 0.03 FMFILL 23 0 FMFILL 24 FMFILL 25 FMFILL 26 <3333333333333333> FMFILL 27 <0000ffff0000ffff> FMFILL 28 <7ebddbe7e7dbbd7e> FMFILL 29 FMFILL 30 <7fbfdfeff7fbfdfe> FMFILL %%EndSetup %%Page: "1" 1 %%BeginPaperSize: Letter %%EndPaperSize 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K J 0 0 0 1 0 0 0 K 0 10 Q 0 X 0 0 0 1 0 0 0 K (Abstract) 54 568.09 T 1 9 Q 2.93 (In this paper) 54 552.76 P 2.93 (, we in) 104.86 552.76 P 2.93 (vestigate the speed and ar) 134.12 552.76 P 2.93 (ea-ef) 239.5 552.76 P 2.93 (\336ciency of) 257.33 552.76 P 0.85 (FPGAs employing \322lo) 54 542.76 P 0.85 (gic cluster) 136.1 542.76 P 0.85 (s\323 containing multiple LUTs and) 174.6 542.76 P 1.48 (r) 54 532.76 P 1.48 (e) 57.17 532.76 P 1.48 (gister) 60.8 532.76 P 1.48 (s as their lo) 81.22 532.76 P 1.48 (gic bloc) 127.83 532.76 P 1.48 (k. W) 157.88 532.76 P 1.48 (e intr) 174.53 532.76 P 1.48 (oduce a ne) 194.86 532.76 P 1.48 (w) 236.68 532.76 P 1.48 (, timing-driven) 242.02 532.76 P 2.71 (tool \050T) 54 522.76 P 2.71 (-VP) 80.3 522.76 P 2.71 (ac) 93.57 522.76 P 2.71 (k\051 to \322pac) 101.89 522.76 P 2.71 (k\323 LUTs and r) 143.62 522.76 P 2.71 (e) 204.17 522.76 P 2.71 (gister) 207.8 522.76 P 2.71 (s into these lo) 228.22 522.76 P 2.71 (gic) 286 522.76 P 0.29 (cluster) 54 512.76 P 0.29 (s, and we show that this algorithm is superior to an e) 78.41 512.76 P 0.29 (xisting) 273 512.76 P 0.34 (pac) 54 502.76 P 0.34 (king algorithm. Then, using a r) 66.82 502.76 P 0.34 (ealistic r) 180.44 502.76 P 0.34 (outing ar) 212.12 502.76 P 0.34 (c) 245.39 502.76 P 0.34 (hitectur) 249.25 502.76 P 0.34 (e and) 276.91 502.76 P 3.07 (sophisticated delay and ar) 54 492.76 P 3.07 (ea models, we empirically e) 158.12 492.76 P 3.07 (valuate) 270.5 492.76 P 1.41 (FPGAs composed of cluster) 54 482.76 P 1.41 (s r) 158.89 482.76 P 1.41 (anging in size fr) 169.42 482.76 P 1.41 (om one to twenty) 231.51 482.76 P 0.42 (LUTs, and show that cluster) 54 472.76 P 0.42 (s of size se) 157.35 472.76 P 0.42 (ven thr) 196.73 472.76 P 0.42 (ough ten pr) 221.99 472.76 P 0.42 (o) 263.93 472.76 P 0.42 (vide the) 268.34 472.76 P 0.65 (best ar) 54 462.76 P 0.65 (ea-delay tr) 79.07 462.76 P 0.65 (ade-of) 118.82 462.76 P 0.65 (f) 141.65 462.76 P 0.65 (. Compar) 144.02 462.76 P 0.65 (ed to cir) 178.34 462.76 P 0.65 (cuits implemented in an) 209.31 462.76 P 1.27 (FPGA composed of size one cluster) 54 452.76 P 1.27 (s, cir) 188.5 452.76 P 1.27 (cuits implemented in an) 207.44 452.76 P -0.2 (FPGA with size se) 54 442.76 P -0.2 (ven cluster) 119.53 442.76 P -0.2 (s have 30% less delay \050a 43% incr) 158.48 442.76 P -0.2 (ease) 281.01 442.76 P 0.21 (in speed\051 and r) 54 432.76 P 0.21 (equir) 108.55 432.76 P 0.21 (e 8% less ar) 127.22 432.76 P 0.21 (ea, and cir) 171.77 432.76 P 0.21 (cuits implemented in an) 210.61 432.76 P -0.21 (FPGA with size ten cluster) 54 422.76 P -0.21 (s have 34% less delay \050a 52% incr) 149.56 422.76 P -0.21 (ease in) 271.97 422.76 P (speed\051, and r) 54 412.76 T (equir) 100.91 412.76 T (e no additional ar) 119.57 412.76 T (ea.) 184 412.76 T 0 10 Q (1. Intr) 54 396.09 T (oduction) 83.81 396.09 T 2 9 Q -0.21 (Much of the speed and area-ef) 54 381.76 P -0.21 (\336cienc) 161.92 381.76 P -0.21 (y of an FPGA is determined by) 185.78 381.76 P 1.16 (the logic block it emplo) 54 371.76 P 1.16 (ys. If a v) 144.05 371.76 P 1.16 (ery small, or \336ne-grained, logic) 178.88 371.76 P 2.8 (block is used, man) 54 361.76 P 2.8 (y connections must be routed between the) 129.25 361.76 P 0.78 (numerous logic blocks [Rose93]. Since routing consumes most of) 54 351.76 P 0 (the area and accounts for most of the delay in FPGAs, a small logic) 54 341.76 P 1.74 (block often results in poor area-ef) 54 331.76 P 1.74 (\336cienc) 184.2 331.76 P 1.74 (y and speed due to the) 208.06 331.76 P 0.12 (e) 54 321.76 P 0.12 (xcessi) 57.86 321.76 P 0.12 (v) 79.63 321.76 P 0.12 (e routing required to connect all the logic blocks. If, on the) 84 321.76 P -0.2 (other hand, a v) 54 311.76 P -0.2 (ery lar) 106.74 311.76 P -0.2 (ge, or coarse-grained, logic block is emplo) 129.61 311.76 P -0.2 (yed,) 281.75 311.76 P 0.19 (the logic block area and delay may become e) 54 301.76 P 0.19 (xcessi) 217.3 301.76 P 0.19 (v) 239.07 301.76 P 0.19 (e, ag) 243.44 301.76 P 0.19 (ain result-) 260.57 301.76 P 0.66 (ing in poor area-ef) 54 291.76 P 0.66 (\336cienc) 122.47 291.76 P 0.66 (y and speed [Rose93]. Choosing the best) 146.33 291.76 P -0.07 (size, or granularity) 54 281.76 P -0.07 (, for an FPGA logic block therefore in) 121.01 281.76 P -0.07 (v) 257.64 281.76 P -0.07 (olv) 261.96 281.76 P -0.07 (es bal-) 273.33 281.76 P (ancing comple) 54 271.76 T (x trade-of) 106.61 271.76 T (fs.) 141.62 271.76 T 1.18 (In this w) 54 256.76 P 1.18 (ork we determine the best size for \322cluster) 87.78 256.76 P 1.18 (-based\323 logic) 248.08 256.76 P 1.3 (blocks, which we refer to as \322logic clusters\323. This style of logic) 54 246.76 P 0.44 (block is of interest for se) 54 236.76 P 0.44 (v) 145.19 236.76 P 0.44 (eral reasons. First, the Altera Fle) 149.55 236.76 P 0.44 (x series) 269.32 236.76 P 2.96 (FPGAs [Alte98], the Xilinx 5200 and V) 54 226.76 P 2.96 (irte) 215.46 226.76 P 2.96 (x FPGAs [Xili97,) 227.32 226.76 P 1.25 (Xili98], and the V) 54 216.76 P 1.25 (antis VF1 FPGAs [V) 122.26 216.76 P 1.25 (ant98] all emplo) 200.77 216.76 P 1.25 (y cluster) 262.18 216.76 P 1.25 (-) 294 216.76 P 1.33 (based logic blocks, so research concerning the best size of logic) 54 206.76 P 2.38 (clusters is of clear commercial interest. Second, prior research) 54 196.76 P 0.4 ([Betz98a] has sho) 54 186.76 P 0.4 (wn that the area-ef) 119.05 186.76 P 0.4 (\336cienc) 187.24 186.76 P 0.4 (y of lar) 211.1 186.76 P 0.4 (ge logic clusters) 237.72 186.76 P 0.44 (is quite competiti) 315 568.76 P 0.44 (v) 378.15 568.76 P 0.44 (e with that of FPGAs using single look-up table) 382.52 568.76 P 0.22 (\050LUT\051 logic blocks. Third, an FPGA composed of lar) 315 558.76 P 0.22 (ge logic clus-) 509.07 558.76 P 2.03 (ters requires fe) 315 548.76 P 2.03 (wer logic blocks to implement a circuit than an) 372.31 548.76 P 0.05 (FPGA using a more \336ne-grained block. This reduces the size of the) 315 538.76 P 0.34 (placement and routing problem, and hence design compile time \321) 315 528.76 P 0.7 (an increasingly important concern as the logic capacity of FPGAs) 315 518.76 P 0.3 (rises. Finally) 315 508.76 P 0.3 (, we sho) 361.22 508.76 P 0.3 (w in this paper that cluster) 391.34 508.76 P 0.3 (-based logic blocks) 487.91 508.76 P 0.23 (can impro) 315 498.76 P 0.23 (v) 351.34 498.76 P 0.23 (e FPGA speed compared to single-LUT logic blocks by) 355.7 498.76 P -0.2 (reducing the number of connections on the critical path that must be) 315 488.76 P (routed between logic blocks.) 315 478.76 T 0.3 (Prior research [Betz98a] has focused only on the area-ef) 315 463.76 P 0.3 (\336cienc) 519.59 463.76 P 0.3 (y of) 543.45 463.76 P 1.46 (dif) 315 453.76 P 1.46 (ferent sizes of logic clusters. In this w) 324.77 453.76 P 1.46 (ork, we simultaneously) 471.35 453.76 P -0.09 (e) 315 443.76 P -0.09 (xamine both the area-ef) 318.86 443.76 P -0.09 (\336cienc) 403.57 443.76 P -0.09 (y and the speed of FPGAs using dif-) 427.43 443.76 P -0.22 (ferent logic cluster sizes. Since both speed and density are crucial in) 315 433.76 P 0.8 (modern FPGAs, only by e) 315 423.76 P 0.8 (xamining both issues can we determine) 412.29 423.76 P 1.31 (the best logic cluster size. As well, we use a more comple) 315 413.76 P 1.31 (x and) 536.95 413.76 P 1.23 (realistic routing architecture than [Betz98a] in our in) 315 403.76 P 1.23 (v) 512.93 403.76 P 1.23 (estig) 517.29 403.76 P 1.23 (ations,) 534.25 403.76 P 2.56 (leading to more accurate architectural conclusions. Finally) 315 393.76 P 2.56 (, we) 540.45 393.76 P 1.55 (present a ne) 315 383.76 P 1.55 (w) 360.87 383.76 P 1.55 (, timing-dri) 366.78 383.76 P 1.55 (v) 409.11 383.76 P 1.55 (en algorithm \050T) 413.48 383.76 P 1.55 (-VP) 472.26 383.76 P 1.55 (ack\051 to \322pack\323 cir-) 486.62 383.76 P -0.03 (cuitry into logic clusters. Relati) 315 373.76 P -0.03 (v) 427.9 373.76 P -0.03 (e to prior w) 432.27 373.76 P -0.03 (ork [Betz97a], this ne) 473.83 373.76 P -0.03 (w) 551.5 373.76 P -0.13 (algorithm not only impro) 315 363.76 P -0.13 (v) 405.24 363.76 P -0.13 (es circuit speed, b) 409.6 363.76 P -0.13 (ut also reduces the total) 473.52 363.76 P 2.78 (amount of routing required between logic blocks, resulting in) 315 353.76 P (impro) 315 343.76 T (v) 336.37 343.76 T (ed area-ef) 340.73 343.76 T (\336cienc) 376.23 343.76 T (y) 400.09 343.76 T (.) 404 343.76 T 0.69 (This paper is or) 315 328.76 P 0.69 (g) 373.15 328.76 P 0.69 (anized as follo) 377.61 328.76 P 0.69 (ws. Section) 431.25 328.76 P 0.69 (2 introduces the struc-) 475.69 328.76 P 2.5 (ture of cluster) 315 318.76 P 2.5 (-based logic blocks. In Section) 369.8 318.76 P 2.5 (3 we outline the) 492.77 318.76 P 0.86 (e) 315 308.76 P 0.86 (xperimental methodology used to e) 318.86 308.76 P 0.86 (v) 449.05 308.76 P 0.86 (aluate the utility of dif) 453.32 308.76 P 0.86 (ferent) 537.01 308.76 P 1.86 (cluster sizes. Then, in Section) 315 298.76 P 1.86 (4 we e) 432.17 298.76 P 1.86 (xplain wh) 459.25 298.76 P 1.86 (y the area-delay) 496.81 298.76 P 1.67 (product is useful for e) 315 288.76 P 1.67 (v) 400.43 288.76 P 1.67 (aluating the quality of each architecture.) 404.7 288.76 P -0.1 (Ne) 315 278.76 P -0.1 (xt, Section) 325.36 278.76 P -0.1 (5 describes the FPGA architecture and timing models) 366.01 278.76 P 1.03 (used in our e) 315 268.76 P 1.03 (xperiments. Section) 364.2 268.76 P 1.03 (6 describes a ne) 438.98 268.76 P 1.03 (w timing-dri) 499.08 268.76 P 1.03 (v) 545.14 268.76 P 1.03 (en) 549.5 268.76 P -0.04 (logic block packing algorithm \050T) 315 258.76 P -0.04 (-VP) 432.98 258.76 P -0.04 (ack\051 and e) 447.35 258.76 P -0.04 (xplains the enhance-) 484.11 258.76 P 3 (ments it contains relati) 315 248.76 P 3 (v) 405.53 248.76 P 3 (e to an earlier CAD tool, VP) 409.89 248.76 P 3 (ack. In) 530.51 248.76 P 0.17 (Section) 315 238.76 P 0.17 (7 we present e) 344.25 238.76 P 0.17 (xperimental results comparing VP) 396.37 238.76 P 0.17 (ack and T) 519.99 238.76 P 0.17 (-) 555 238.76 P 1.15 (VP) 315 228.76 P 1.15 (ack, and the ef) 326.37 228.76 P 1.15 (fect of v) 382.07 228.76 P 1.15 (arious cluster sizes on FPGA area and) 414.13 228.76 P -0.15 (delay) 315 218.76 P -0.15 (. Section) 333.91 218.76 P -0.15 (8 discusses potential sources of inaccuracies. Finally) 367.51 218.76 P -0.15 (,) 555.75 218.76 P (in Section) 315 208.76 T (9 we present our conclusions.) 353.5 208.76 T 0 10 Q (2. Cluster) 315 192.09 T (-Based Logic Bloc) 363.15 192.09 T (ks) 450.19 192.09 T 2 9 Q 0.62 (Cluster) 315 177.76 P 0.62 (-based logic blocks, or) 340.82 177.76 P 1 F 0.62 (lo) 427.02 177.76 P 0.62 (gic cluster) 433.94 177.76 P 0.62 (s) 472.21 177.76 P 2 F 0.62 ( are a generalized v) 475.71 177.76 P 0.62 (er-) 548.01 177.76 P 1.75 (sion of the Logic Array Blocks used in Altera\325) 315 167.76 P 1.75 (s FLEX 8K and) 496 167.76 P -0.02 (FLEX 10K parts [Alte98]. Figure) 315 157.76 P -0.02 (1-a sho) 437.89 157.76 P -0.02 (ws the structure of a) 463.89 157.76 P 1 F -0.02 (basic) 539 157.76 P 0.67 (lo) 315 147.76 P 0.67 (gic element) 321.91 147.76 P 2 F 0.67 ( or) 363.82 147.76 P 1 F 0.67 (BLE) 377.16 147.76 P 2 F 0.67 ( [Betz98a] which consists of a 4-LUT plus a) 393.16 147.76 P 1.34 (\337ip-\337op. A logic cluster consists of one or more BLEs, plus the) 315 137.76 P 0.91 (local routing required to connect them together) 315 127.76 P 0.91 (. Figure) 489.42 127.76 P 0.91 (1-b sho) 520.57 127.76 P 0.91 (ws) 548 127.76 P 0.43 (ho) 315 117.76 P 0.43 (w the BLEs are connected. F) 323.77 117.76 P 0.43 (or clusters of size greater than one,) 429.74 117.76 P 1.55 (the architecture used is fully connected: each BLE input can be) 315 107.76 P 0.24 (connected to an) 315 97.76 P 0.24 (y of the cluster inputs or to the output of an) 371.82 97.76 P 0.24 (y of the) 530.03 97.76 P 0.23 (BLEs within the cluster) 315 87.76 P 0.23 (. Clusters of size one \050i.e. a cluster contain-) 400.44 87.76 P 54 72 297 574.76 C 55.3 72 295.7 180 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 54 72 297 574.76 C 0 0 612 792 C 54 604.64 558 719.71 R 7 X 0 0 0 1 0 0 0 K V 0 18 Q 0 X (Using Cluster) 77.81 707.71 T (-Based Logic Bloc) 194.47 707.71 T (ks and Timing-Driven) 351.14 707.71 T (P) 113.26 683.71 T (ac) 124.72 683.71 T (king to Impr) 144.38 683.71 T (o) 247.03 683.71 T (ve FPGA Speed and Density) 257.67 683.71 T 2 10 Q (Ale) 177.63 662.04 T (xander \050Sandy\051 Marquardt, V) 191.92 662.04 T (aughn Betz, and Jonathan Rose) 309.11 662.04 T (Department of Electrical and Computer Engineering) 201.16 651.04 T (Uni) 262.71 638.04 T (v) 277.46 638.04 T (ersity of T) 282.32 638.04 T (oronto) 323.17 638.04 T (T) 242.24 625.04 T (oronto, ON, Canada M5S 3G4) 247.55 625.04 T ({arm,v) 228.4 612.04 T (aughn,jayar}@eecg.toronto.edu) 256.01 612.04 T 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "1" 1 %%Page: "2" 2 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 2 9 Q 0 X 0 0 0 1 0 0 0 K -0.09 (ing a single BLE\051 do not contain local routing, and hence ha) 53.86 445.68 P -0.09 (v) 269.71 445.68 P -0.09 (e nei-) 274.08 445.68 P (ther multiple) 53.86 435.68 T (xors on the BLE inputs nor local feedback paths.) 99.97 435.68 T 0.6 (F) 53.86 420.68 P 0.6 (ollo) 58.73 420.68 P 0.6 (wing the con) 72.51 420.68 P 0.6 (v) 119.83 420.68 P 0.6 (ention of [Betz97a], we use tw) 124.2 420.68 P 0.6 (o parameters to) 237.56 420.68 P 0.66 (describe a logic cluster) 53.86 410.68 P 0.66 (,) 138.19 410.68 P 1 F 0.66 (N) 143.35 410.68 P 2 F 0.66 ( and) 149.35 410.68 P 1 F 0.66 (I,) 168.16 410.68 P 2 F 0.66 ( where) 173.41 410.68 P 1 F 0.66 (N) 201.21 410.68 P 2 F 0.66 ( is the number of BLEs) 207.21 410.68 P 0.03 (per cluster and) 53.86 400.68 P 1 F 0.03 (I) 109.19 400.68 P 2 F 0.03 ( is the number of inputs per cluster) 112.18 400.68 P 0.03 (. In [Betz97a] it) 237.15 400.68 P -0 (is sho) 53.86 390.26 P -0 (wn that setting) 74.38 390.26 P -0 ( is suf) 182.25 390.26 P -0 (\336cient for complete logic) 203.51 390.26 P (utilization, so we use this relation for all of our e) 53.86 380.26 T (xperiments.) 228.95 380.26 T 0 10 Q (3. Experimental Methodology) 53.86 363.6 T 2 9 Q 0.86 (W) 53.86 349.26 P 0.86 (e use an empirical method to e) 61.63 349.26 P 0.86 (xplore dif) 176.65 349.26 P 0.86 (ferent FPGA architec-) 212.54 349.26 P 2.01 (tures. This in) 53.86 339.26 P 2.01 (v) 104.77 339.26 P 2.01 (olv) 109.09 339.26 P 2.01 (es technology-mapping, packing, placing, and) 120.46 339.26 P 0.94 (routing benchmark circuits) 53.86 329.26 P 2 7.2 Q 0.75 (1) 152.72 332.86 P 2 9 Q 0.94 ( into realistic architectures with clus-) 156.32 329.26 P 1.08 (ters of size 1 through 20. W) 53.86 319.26 P 1.08 (e then estimate the area required by) 159.82 319.26 P 0.65 (each architecture to implement each benchmark circuit, and mea-) 53.86 309.26 P 2.1 (sure the speed of each implementation. At this point we ha) 53.86 299.26 P 2.1 (v) 285.88 299.26 P 2.1 (e) 290.24 299.26 P (enough information to judge the quality of each architecture.) 53.86 289.26 T 0 F (3.1) 53.86 274.26 T (CAD Flo) 75.46 274.26 T (w) 110.82 274.26 T 2 F -0.05 (Figure) 53.86 261.26 P -0.05 (2 illustrates the CAD \337o) 79.61 261.26 P -0.05 (w for our e) 167.17 261.26 P -0.05 (xperiments. Each circuit) 206.61 261.26 P 1.13 (we use is logic-optimized by SIS [Sent92] and then technology-) 53.86 251.26 P 2 (mapped into 4-LUTs by Flo) 53.86 241.26 P 2 (wMap [Cong94]. VP) 162.64 241.26 P 2 (ack [Betz98b,) 242.25 241.26 P 0.44 (Betz97b, Betz99] or T) 53.86 231.26 P 0.44 (-VP) 134.85 231.26 P 0.44 (ack is then used to group the LUTs and) 149.21 231.26 P -0.19 (re) 53.86 221.26 P -0.19 (gisters into logic clusters of the desired size. Finally) 60.72 221.26 P -0.19 (, we use VPR) 245.82 221.26 P 0.16 ([Betz98b, Betz97b, Betz99] to place and route each circuit. VPR\325) 53.86 211.26 P 0.16 (s) 290.73 211.26 P 1.24 (timing-dri) 53.86 201.26 P 1.24 (v) 90.14 201.26 P 1.24 (en router e) 94.5 201.26 P 1.24 (xtracts the elmore delay [Elmo48] of each) 135.33 201.26 P -0.01 (routed net, and performs a path-based timing analysis to determine) 53.86 191.26 P 0.04 (the delay of the circuit critical path. Finally) 53.86 181.26 P 0.04 (, VPR uses a transistor) 209.52 181.26 P 0.04 (-) 291.24 181.26 P 1.32 (based area model [Betz98b, Betz99] to estimate the total layout) 53.86 171.26 P (area required by this FPGA.) 53.86 161.26 T 53.86 144.09 294.24 158.26 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 62.36 156.28 204.09 156.28 2 L 0.5 H 2 Z 0 X 0 0 0 1 0 0 0 K N 0 0 612 792 C 2 6.4 Q 0 X 0 0 0 1 0 0 0 K (1) 53.86 141.96 T 2 8 Q -0.34 (Our benchmarks consist of 20 of the largest MCNC circuits [Yang91] and) 60.94 138.76 P 2.03 (5 University of Toronto benchmark circuits [Leve98, Ye98, Gall98,) 60.94 128.76 P 0.16 (Padi98, Hame98]. The circuits range in size from 1047 to 8383 4-LUTs.) 60.94 118.76 P 0.14 (The MCNC circuits used are: alu4, apex2, apex4, bigkey, clma, des, dif-) 60.94 108.76 P 2.59 (feq, dsip, elliptic, ex1010, ex5p, frisc, misex3, pdc, s298, s38417,) 60.94 98.76 P 0.73 (s38584.1, seq, spla, and tseng. The University of Toronto circuits used) 60.94 88.76 P (are: des_fm, des_sis, marb, grayscale, and wood.) 60.94 78.76 T 2 9 Q 0.7 (In FPGA architecture and CAD research, it is con) 317.76 483.84 P 0.7 (v) 502.2 483.84 P 0.7 (enient to ha) 506.57 483.84 P 0.7 (v) 549.78 483.84 P 0.7 (e) 554.15 483.84 P 0.99 (tools which can v) 317.76 473.84 P 0.99 (ary the FPGA dimensions \050number of columns) 383.74 473.84 P 0.69 (and ro) 317.76 463.84 P 0.69 (ws\051 and channel width \050number of tracks in each channel\051.) 340.97 463.84 P -0.12 (VPR allo) 317.76 453.84 P -0.12 (ws this, and it also allo) 350.67 453.84 P -0.12 (ws us to \336nd the) 432.36 453.84 P -0.12 ( minimum channel) 490.88 453.84 P 2.02 (width required to successfully route a circuit. By allo) 317.76 443.84 P 2.02 (wing the) 524.88 443.84 P 1.52 (channel width to v) 317.76 433.84 P 1.52 (ary) 388.86 433.84 P 1.52 (, and searching for the minimum routable) 399.77 433.84 P -0.15 (width, we can detect small impro) 317.76 423.84 P -0.15 (v) 436.38 423.84 P -0.15 (ements in FPGA architectures or) 440.75 423.84 P 0.33 (CAD algorithms that might otherwise go unnoticed. Compare this) 317.76 413.84 P 0.07 (to mapping a circuit into a \336x) 317.76 403.84 P 0.07 (ed size FPGA \321 this w) 424.52 403.84 P 0.07 (ould only tell) 510 403.84 P 0.67 (us if it \336t or not. It is more dif) 317.76 393.84 P 0.67 (\336cult to dra) 431.11 393.84 P 0.67 (w architectural conclu-) 473.82 393.84 P (sions from such a \322binary\323 result.) 317.76 383.84 T -0.08 (VPR is capable of performing both) 317.76 368.84 P 1 F -0.08 (high-str) 445.79 368.84 P -0.08 (ess) 473.96 368.84 P 2 F -0.08 ( and) 484.96 368.84 P 1 F -0.08 (low-str) 502.3 368.84 P -0.08 (ess) 527.47 368.84 P 2 F -0.08 ( rout-) 538.47 368.84 P 1.28 (ings [Sw) 317.76 358.84 P 1.28 (ar98]. A high-stress routing occurs when VPR routes a) 350.7 358.84 P 2.39 (gi) 317.76 348.84 P 2.39 (v) 324.54 348.84 P 2.39 (en circuit into an FPGA with the minimum channel width) 328.91 348.84 P 0.27 (required for a successful routing. T) 317.76 338.84 P 0.27 (o accomplish this, VPR repeat-) 444.84 338.84 P 0.63 (edly routes each circuit with dif) 317.76 328.84 P 0.63 (ferent channel widths, scaling the) 434.9 328.84 P 2.17 (architecture accordingly until it \336nds the minimum number of) 317.76 318.84 P 0.64 (tracks in which the circuit will route. A lo) 317.76 308.84 P 0.64 (w-stress routing occurs) 473.38 308.84 P 0.85 (when an FPGA has signi\336cantly more routing resources than the) 317.76 298.84 P 0.47 (minimum required to route a gi) 317.76 288.84 P 0.47 (v) 432.61 288.84 P 0.47 (en circuit. In our e) 436.98 288.84 P 0.47 (xperiments we) 504.94 288.84 P 1.92 (de\336ne a lo) 317.76 278.84 P 1.92 (w-stress routing to occur when there are 30% more) 358.86 278.84 P (tracks per channel than the minimum required.) 317.76 268.84 T 1.29 (W) 317.76 253.84 P 1.29 (e feel that lo) 325.54 253.84 P 1.29 (w-stress routings are indicati) 373.94 253.84 P 1.29 (v) 481.33 253.84 P 1.29 (e of ho) 485.7 253.84 P 1.29 (w an FPGA) 513.05 253.84 P 0.37 (w) 317.76 243.84 P 0.37 (ould generally be used \050it is rare that a user will utilize 100% of) 324.17 243.84 P 2.31 (the routing and logic resources\051, so all of the results that we) 317.76 233.84 P 1.68 (present are based on lo) 317.76 223.84 P 1.68 (w-stress routings. Additionally) 406.74 223.84 P 1.68 (, the lo) 520.76 223.84 P 1.68 (w-) 548.65 223.84 P 0.07 (stress and high-stress results are v) 317.76 213.84 P 0.07 (ery similar) 440.19 213.84 P 0.07 (, and both cases result) 478.64 213.84 P (in the same conclusions.) 317.76 203.84 T 0 10 Q (4. Ar) 317.76 187.17 T (c) 342.57 187.17 T (hitecture Ev) 348.03 187.17 T (aluation \321 Area-Dela) 405.07 187.17 T (y Pr) 505.45 187.17 T (oduct) 524.15 187.17 T 2 9 Q 1.53 (One metric that we will use to e) 317.76 172.84 P 1.53 (v) 442.99 172.84 P 1.53 (aluate the quality of dif) 447.27 172.84 P 1.53 (ferent) 537.15 172.84 P 0.65 (architectures is the area-delay product. W) 317.76 162.84 P 0.65 (e feel that there are tw) 470.25 162.84 P 0.65 (o) 553.64 162.84 P (reasons that this metric mak) 317.76 152.84 T (es sense:) 418.66 152.84 T (1.) 335.76 137.84 T 1.47 (Intuiti) 353.76 137.84 P 1.47 (v) 375.54 137.84 P 1.47 (ely) 379.91 137.84 P 1.47 (, we w) 390.32 137.84 P 1.47 (ant to \336nd the point at which we are) 416.91 137.84 P 4.11 (sacri\336cing the least amount of area for the most) 353.76 127.84 P 1 (impro) 353.76 117.84 P 1 (v) 375.13 117.84 P 1 (ement in speed. Gi) 379.49 117.84 P 1 (v) 449.75 117.84 P 1 (en that we can al) 454.12 117.84 P 1 (w) 518.5 117.84 P 1 (ays trade) 524.91 117.84 P 0.53 (area for speed \050see belo) 353.76 107.84 P 0.53 (w\051, and speed for area, it mak) 440.61 107.84 P 0.53 (es) 550.65 107.84 P 0.27 (sense to combine these tw) 353.76 97.84 P 0.27 (o f) 448.75 97.84 P 0.27 (actors into one curv) 458.68 97.84 P 0.27 (e to see) 530.6 97.84 P (where the best trade-of) 353.76 87.84 T (f occurs.) 436.26 87.84 T 129.62 387.35 182.25 396.68 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q 0 X 0 0 0 1 0 0 0 K (I) 130.69 390.26 T 2 F (2) 148.21 390.26 T 1 F (N) 159.63 390.26 T 2 F (2) 175.75 390.26 T (+) 168.42 390.26 T 3 F (\327) 154.96 390.26 T 2 F (=) 138.64 390.26 T 0 0 612 792 C 53.86 74.09 294.24 720 C 53.86 451.68 294.24 720 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 119.7 682.75 162.18 714.64 R 7 X 0 0 0 1 0 0 0 K V 0.5 H 0 Z 0 X N 185.26 682.32 214.56 704.32 R N 162.18 698.69 185.26 698.82 2 L 2 Z N 173.27 698.75 173.27 712.32 228.54 712.32 3 L N 228.54 701.82 221.22 701.82 221.05 693.38 214.56 693.32 4 L N 228.79 717.38 228.79 698.07 238.28 702.75 238.28 714.19 4 Y 0 Z N 2 9 Q (4-input) 123.99 701.23 T (LUT) 131.09 690.26 T (D FF) 191 690.64 T 185.34 682.5 190.33 685.5 185.09 688.13 3 L 2 Z N 180.14 685.32 180.14 687.88 184.59 685.32 180.14 682.75 4 Y 0 Z N 180.14 685.32 180.14 687.88 184.59 685.32 180.14 682.75 4 Y V 179.89 685.32 170.85 685.32 2 L 2 Z N (Clk) 168.88 674.75 T (Out) 259.26 706.3 T (Inputs) 76.24 696.8 T 2 10 Q (a\051 Basic Logic Element \050BLE\051) 122.76 661.74 T 172.14 605 204.03 636.89 R 7 X V 0 Z 0 X N 172.83 605.23 176.58 608.23 172.64 610.86 3 L 2 Z N 143.21 639.73 143.21 632.8 150.33 634.48 150.33 638.59 4 Y 0 Z N 143.21 630.61 143.21 623.67 150.33 625.35 150.33 629.46 4 Y N 143.21 621.48 143.21 614.55 150.33 616.23 150.33 620.34 4 Y N 143.21 612.36 143.21 605.42 150.33 607.11 150.33 611.21 4 Y N 159.92 625.86 172.18 625.86 2 L 2 Z N 159.92 619.11 172.18 619.11 2 L N 159.92 632.61 172.18 632.61 2 L N 159.92 612.35 172.18 612.35 2 L N 159.76 632.61 159.76 636.17 150.2 636.17 3 L N 159.76 626.05 159.76 626.98 150.2 626.98 3 L N 159.57 619.11 159.76 617.98 150.2 617.98 3 L N 159.76 612.36 159.76 609.36 2 L N 159.57 609.55 150.38 609.55 2 L N 172.14 545.56 204.03 577.45 R 7 X V 0 Z 0 X N 172.83 545.8 176.58 548.8 172.64 551.42 3 L 2 Z N 143.21 580.3 143.21 573.36 150.33 575.04 150.33 579.15 4 Y 0 Z N 143.21 571.17 143.21 564.23 150.33 565.92 150.33 570.03 4 Y N 143.21 562.05 143.21 555.11 150.33 556.79 150.33 560.9 4 Y N 143.21 552.92 143.21 545.99 150.33 547.67 150.33 551.78 4 Y N 159.92 566.42 172.18 566.42 2 L 2 Z N 159.92 559.67 172.18 559.67 2 L N 159.92 573.18 172.18 573.18 2 L N 159.92 552.92 172.18 552.92 2 L N 159.76 573.17 159.76 576.73 150.2 576.73 3 L N 159.76 566.61 159.76 567.55 150.2 567.55 3 L N 159.57 559.67 159.76 558.55 150.2 558.55 3 L N 159.76 552.92 159.76 549.92 2 L N 159.57 550.11 150.38 550.11 2 L N 4 9 Q (N) 187.59 595.02 T (BLEs) 182.05 586.77 T 4 14 Q (.....) 0 -270 179.26 584.54 TF 120.76 531.74 228.51 647.23 R 0 Z 9 X N 172.13 608.23 165.76 608.23 165.38 537.74 106.89 537.74 4 L 2 Z 0 X N 172.13 548.61 165.38 548.61 2 L N 2 9 Q (BLE) 180.38 627.9 T (#1) 180.38 620.4 T (BLE) 180.38 567.9 T (#N) 180.38 560.4 T 106.89 551.95 129.76 551.95 129.76 638.61 143.26 638.61 4 L 1 H N 143.07 629.98 129.76 629.98 2 L N 142.88 620.23 130.13 620.23 2 L N 142.88 611.23 130.13 611.23 2 L N 142.88 578.98 129.76 578.8 2 L N 143.07 570.17 130.13 570.17 2 L N 142.88 561.55 129.76 561.36 2 L N 143.07 552.17 129.95 551.99 2 L N 216.2 561.17 216.2 643.48 2 L N 216.01 643.86 137.07 643.86 137.07 546.74 3 L N 137.45 546.92 143.07 546.92 2 L N 137.26 556.11 142.88 556.11 2 L N 137.07 565.11 142.7 565.11 2 L N 137.26 574.67 142.88 574.67 2 L N 137.26 606.36 142.88 606.36 2 L N 137.26 624.73 142.88 624.73 2 L N 137.45 633.73 143.07 633.73 2 L N 203.82 622.11 215.82 622.11 2 L 0.5 H N 216.01 561.17 204.2 561.36 2 L N 4 F (I) 89.68 561.15 T (Inputs) 78.82 549.84 T 2 F (Clock) 82.89 535.84 T 4 F (I) 123.2 593.02 T 131.45 598.48 128.07 594.17 2 L N (N) 219.11 603.42 T 218.07 606.55 214.7 602.23 2 L N (N) 259.7 599.9 T (Outputs) 248.82 591.78 T 2 10 Q (b\051 Logic Cluster Structure) 123.33 516.65 T 233.92 594.65 233.92 597.62 244.3 594.65 233.92 591.67 4 Y 0 Z N 233.92 594.65 233.92 597.62 244.3 594.65 233.92 591.67 4 Y V 233.67 594.65 215.86 594.65 2 L 2 Z N 113.55 709.98 113.55 712.55 118 709.98 113.55 707.42 4 Y 0 Z N 113.55 709.98 113.55 712.55 118 709.98 113.55 707.42 4 Y V 113.3 709.98 104.26 709.98 2 L 2 Z N 113.55 702.43 113.55 704.99 118 702.43 113.55 699.86 4 Y 0 Z N 113.55 702.43 113.55 704.99 118 702.43 113.55 699.86 4 Y V 113.3 702.43 104.26 702.43 2 L 2 Z N 113.55 694.87 113.55 697.44 118 694.87 113.55 692.3 4 Y 0 Z N 113.55 694.87 113.55 697.44 118 694.87 113.55 692.3 4 Y V 113.3 694.87 104.26 694.87 2 L 2 Z N 113.55 687.32 113.55 689.88 118 687.32 113.55 684.75 4 Y 0 Z N 113.55 687.32 113.55 689.88 118 687.32 113.55 684.75 4 Y V 113.3 687.32 104.26 687.32 2 L 2 Z N 248.07 708.32 248.07 710.88 252.51 708.32 248.07 705.75 4 Y 0 Z N 248.07 708.32 248.07 710.88 252.51 708.32 248.07 705.75 4 Y V 247.82 708.32 238.78 708.32 2 L 2 Z N 4 9 Q (Figure 1. Structure of basic logic element \050BLE\051 and logic) 63.53 486.74 T (cluster.) 161.03 475.74 T 53.86 74.09 294.24 720 C 0 0 612 792 C 317.76 74.09 558.14 720 C 321.04 489.84 554.86 720 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 438.48 564.35 500.33 578.23 R 7 X 0 0 0 1 0 0 0 K V 0.5 H 0 Z 0 X N 434.29 591.64 503.05 605.52 R 7 X V 0 X N 388 620.58 549.54 634.46 R 7 X V 0 X N 393.81 648.62 543.84 662.5 R 7 X V 0 X N 2 9 Q (Circuit) 456.37 708.15 T 419.15 674.41 519.17 688.29 R 7 X V 0 X N (Logic Optimization \050SIS\051) 423.16 678.6 T (T) 396.8 653.05 T (echnology Map to 4-LUTs \050Flo) 401.67 653.05 T (wMap\051) 514.94 653.05 T (P) 393.3 625.5 T (ack BLEs into Logic Clusters \050T) 398.17 625.5 T (-VP) 514.58 625.5 T (ack\051) 528.95 625.5 T (Placement \050VPR\051) 437.76 596.59 T (Routing \050VPR\051) 442.03 567.87 T (T) 424.46 539.84 T (iming and Area Results) 429.64 539.84 T 467.79 693.25 470.35 693.25 467.79 688.81 465.22 693.25 4 Y N 467.79 693.25 470.35 693.25 467.79 688.81 465.22 693.25 4 Y V 467.79 704.8 467.79 693.5 2 L 7 X V 2 Z 0 X N 467.79 665.96 470.35 665.96 467.79 661.52 465.22 665.96 4 Y 0 Z N 467.79 665.96 470.35 665.96 467.79 661.52 465.22 665.96 4 Y V 467.79 674.06 467.79 666.21 2 L 7 X V 2 Z 0 X N 467.79 640.17 470.35 640.17 467.79 635.72 465.22 640.17 4 Y 0 Z N 467.79 640.17 470.35 640.17 467.79 635.72 465.22 640.17 4 Y V 467.79 648.27 467.79 640.42 2 L 7 X V 2 Z 0 X N 467.79 610.78 470.35 610.78 467.79 606.33 465.22 610.78 4 Y 0 Z N 467.79 610.78 470.35 610.78 467.79 606.33 465.22 610.78 4 Y V 467.79 620.98 467.79 611.03 2 L 7 X V 2 Z 0 X N 467.79 582.59 470.35 582.59 467.79 578.14 465.22 582.59 4 Y 0 Z N 467.79 582.59 470.35 582.59 467.79 578.14 465.22 582.59 4 Y V 467.79 590.69 467.79 582.84 2 L 7 X V 2 Z 0 X N 467.79 551.55 470.35 551.55 467.79 547.1 465.22 551.55 4 Y 0 Z N 467.79 551.55 470.35 551.55 467.79 547.1 465.22 551.55 4 Y V 467.79 564.15 467.79 551.8 2 L 7 X V 2 Z 0 X N (Cluster) 339.61 628.1 T (Size \050N\051) 339.61 621.1 T 375.49 628.02 376.82 627.94 2 L 0 Z N 376.82 627.94 375.92 630.97 386.1 627.4 375.57 625.03 4 Y N 376.82 627.94 375.92 630.97 386.1 627.4 375.57 625.03 4 Y V 370.24 628.33 375.49 628.02 2 L 7 X V 2 Z 0 X N (Cluster Size Dependent) 322.61 588.6 T (Architecture Models) 322.61 579.94 T (\050based on 0.35) 322.61 570.71 T 3 F (m) 377.6 570.71 T 2 F (m process\051) 382.78 570.71 T 410.29 582.71 411.63 582.71 2 L 0 Z N 411.63 582.71 410.54 585.68 420.92 582.71 410.54 579.73 4 Y N 411.63 582.71 410.54 585.68 420.92 582.71 410.54 579.73 4 Y V 407.94 582.71 410.29 582.71 2 L 7 X V 2 Z 0 X N 2 36 Q ({) 421.89 574.58 T 4 9 Q (Figure 2. CAD Flow) 398.23 511.49 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 317.76 74.09 558.14 720 C 0 0 612 792 C 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "2" 2 %%Page: "3" 3 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 2 9 Q 0 X 0 0 0 1 0 0 0 K (2.) 71.86 714 T 1.02 (Much of the performance g) 89.86 714 P 1.02 (ain from using an FPGA is) 192.37 714 P 1.5 (deri) 89.86 704 P 1.5 (v) 103.63 704 P 1.5 (ed from parallelizing functional units, rather than) 107.99 704 P 1.12 (ra) 89.86 694 P 1.12 (w clock speed. In this case,) 96.72 694 P 1 F 1.12 (thr) 203.94 694 P 1.12 (oughput = number of) 214.04 694 P 0.7 (functional units) 89.86 683.33 P 3 10 Q 0.78 (\327) 149.77 683.33 P 1 9 Q 0.7 ( cloc) 152.27 683.33 P 0.7 (k r) 170.03 683.33 P 0.7 (ate) 180.34 683.33 P 2 F 0.7 (. Another w) 191.34 683.33 P 0.7 (ay of looking at) 235.39 683.33 P 1.4 (this is,) 89.86 672.33 P 1 F 1.4 (thr) 118.42 672.33 P 1.4 (oughput = \0501/ar) 128.52 672.33 P 1.4 (ea per functional unit\051) 189.07 672.33 P 3 10 Q 1.56 (\327) 277.68 672.33 P 1 9 Q 1.4 (\0501/) 284.24 672.33 P 0.03 (delay\051) 89.86 662 P 2 F 0.03 (. Therefore if we minimize the area-delay product,) 112.35 662 P (we will maximize throughput.) 89.86 652 T -0.06 (There are tw) 53.86 637 P -0.06 (o main f) 99.12 637 P -0.06 (actors which can af) 128.9 637 P -0.06 (fect the area-delay product) 198.21 637 P 0.39 (of an FPGA: transistor sizing, and the FPGA architecture. In gen-) 53.86 627 P 0.3 (eral, the speed of an FPGA can be increased \050to a point\051 by sizing) 53.86 617 P 0.62 (up the b) 53.86 607 P 0.62 (uf) 83.92 607 P 0.62 (fers and transistors within the FPGA, b) 91.19 607 P 0.62 (ut this increases) 235.5 607 P 0.06 (area. Alternati) 53.86 597 P 0.06 (v) 105.17 597 P 0.06 (ely) 109.54 597 P 0.06 (, the FPGA can be made smaller by sizing do) 119.95 597 P 0.06 (wn) 283.24 597 P 1.85 (the b) 53.86 587 P 1.85 (uf) 73.28 587 P 1.85 (fers and transistors, b) 80.55 587 P 1.85 (ut this de) 162.9 587 P 1.85 (grades the FPGA perfor-) 199.46 587 P (mance.) 53.86 577 T 0.75 (Throughout this paper) 53.86 562 P 0.75 (, we will size the transistors in each FPGA) 134.99 562 P 0.71 (architecture to minimize the FPGA) 53.86 552 P 0.71 (\325) 182.18 552 P 0.71 (s area-delay product. Only by) 184.68 552 P 0.57 (resizing transistors appropriately for each architecture in this w) 53.86 542 P 0.57 (ay) 285.74 542 P 1.68 (can we f) 53.86 532 P 1.68 (airly compute the speed and area-ef) 87.62 532 P 1.68 (\336cienc) 224.01 532 P 1.68 (y of FPGAs) 247.87 532 P (with dif) 53.86 522 T (ferent logic block architectures.) 81.88 522 T 0 10 Q (5. Ar) 53.86 505.33 T (c) 78.67 505.33 T (hitecture Modeling) 84.13 505.33 T 2 9 Q 0.97 (T) 53.86 491 P 0.97 (o e) 58.64 491 P 0.97 (v) 70.12 491 P 0.97 (aluate the speed and area of an FPGA we must choose not) 74.4 491 P 1.35 (only the logic block architecture, b) 53.86 481 P 1.35 (ut also a routing architecture) 185.88 481 P 0.44 (and transistor sizes. The follo) 53.86 471 P 0.44 (wing sections detail all of our archi-) 161.62 471 P 1.84 (tectural choices, which are pro) 53.86 461 P 1.84 (vided to VPR in an architecture) 171.3 461 P (description \336le [Betz98b, Betz99].) 53.86 451 T 0 F (5.1) 53.86 436 T (Basic Ar) 75.46 436 T (c) 111.79 436 T (hitecture) 116.71 436 T 2 F 0.38 (W) 53.86 423 P 0.38 (e in) 61.63 423 P 0.38 (v) 74.9 423 P 0.38 (estig) 79.27 423 P 0.38 (ate island-style FPGAs in which each logic block bor-) 96.22 423 P 0.43 (ders a routing channel on its four sides. Each circuit is mapped to) 53.86 413 P 1.04 (the smallest square FPGA with enough logic blocks and pads to) 53.86 403 P 0.19 (accommodate it. The FPGAs of Xilinx [Xili94], Lucent T) 53.86 393 P 0.19 (echnolo-) 262.74 393 P 0.97 (gies [Luce98], and V) 53.86 383 P 0.97 (antis [V) 131.75 383 P 0.97 (ant98] emplo) 160.47 383 P 0.97 (y an island-style archi-) 209.09 383 P (tecture.) 53.86 373 T 1.56 (Delays, capacitances, and resistances of the FPGA circuitry are) 53.86 358 P 1.05 (obtained from SPICE [Meta92] simulations of TSMC\325) 53.86 348 P 1.05 (s 0.35) 256.19 348 P 3 F 1.05 (m) 282.05 348 P 2 F 1.05 (m) 287.23 348 P (CMOS process.) 53.86 338 T 0 F (5.2) 53.86 323 T (Routing Ar) 75.46 323 T (c) 121.77 323 T (hitecture) 126.69 323 T 2 F 1.48 (W) 53.86 310 P 1.48 (e de\336ne the number of logic blocks which a routing se) 61.63 310 P 1.48 (gment) 271.74 310 P 1.93 (spans as the) 53.86 300 P 1 F 1.93 (lo) 104.89 300 P 1.93 (gical length) 111.81 300 P 2 F 1.93 ( of that se) 156.49 300 P 1.93 (gment. [Betz98b, Betz99]) 197.39 300 P -0.11 (found that an architecture in which routing se) 53.86 290 P -0.11 (gments ha) 216.65 290 P -0.11 (v) 253.11 290 P -0.11 (e a logical) 257.47 290 P 1.37 (length of four) 317.76 714 P 1.37 (, with 50% of the se) 369.63 714 P 1.37 (gments connected by tri-state) 448.31 714 P 2.57 (b) 317.76 704 P 2.57 (uf) 322.08 704 P 2.57 (fers and 50% connected by pass-transistors, pro) 329.36 704 P 2.57 (vides good) 516.33 704 P 0.97 (area-ef) 317.76 694 P 0.97 (\336cienc) 342.51 694 P 0.97 (y and speed for FPGAs containing logic clusters of) 366.37 694 P 2.05 (size four) 317.76 684 P 2.05 (. An e) 350.56 684 P 2.05 (xample of this routing architecture is sho) 376.27 684 P 2.05 (wn in) 535.84 684 P 1.95 (Figure) 317.76 674 P 1.95 (3. W) 343.51 674 P 1.95 (e implicitly assume that this routing architecture is) 362.24 674 P 0.02 (good for architectures containing logic clusters of all sizes, and we) 317.76 664 P 0.31 (use this routing architecture in all of our e) 317.76 654 P 0.31 (xperiments. Ideally) 471.11 654 P 0.31 (, one) 540.33 654 P 1.71 (w) 317.76 644 P 1.71 (ould lik) 324.17 644 P 1.71 (e to \336nd the best routing architecture for each FPGA) 353.55 644 P 1.08 (emplo) 317.76 634 P 1.08 (ying a dif) 340.17 634 P 1.08 (ferent cluster size, b) 376.6 634 P 1.08 (ut this w) 452.12 634 P 1.08 (ould require a huge) 485.18 634 P 0.43 (amount of ef) 317.76 624 P 0.43 (fort. By basing all of our e) 364.39 624 P 0.43 (xperiments on this routing) 462.09 624 P 1.89 (architecture, we may slightly f) 317.76 614 P 1.89 (a) 434.97 614 P 1.89 (v) 438.79 614 P 1.89 (or architectures with size four) 443.11 614 P (clusters o) 317.76 604 T (v) 351.87 604 T (er other architectures.) 356.24 604 T 0 F (5.3) 317.76 589 T (Eff) 339.36 589 T (ect of V) 351.27 589 T (ar) 383.24 589 T (ying Cluster Siz) 391.83 589 T (e on FPGA Routing) 459.44 589 T (Segment Length) 339.36 579 T 2 F 0.31 (As we increase the cluster size, both the logic area per cluster and) 317.76 566 P 0.7 (routing area per cluster gro) 317.76 556 P 0.7 (w) 417.8 556 P 0.7 (. The logic cluster and its associated) 423.72 556 P 0.6 (routing is called a tile. Figure) 317.76 546 P 0.6 (4 demonstrates ho) 429.01 546 P 0.6 (w a tile gro) 495.48 546 P 0.6 (ws as) 537.79 546 P 0.57 (cluster size is increased. This increased tile size results in routing) 317.76 536 P 0.56 (se) 317.76 526 P 0.56 (gments with the same logical length ha) 325.13 526 P 0.56 (ving ph) 468.8 526 P 0.56 (ysically dif) 496.57 526 P 0.56 (ferent) 537.15 526 P (lengths for logic clusters of dif) 317.76 516 T (ferent sizes.) 428.27 516 T 0.05 (W) 317.76 501 P 0.05 (e de\336ne the measured length of a routing se) 325.54 501 P 0.05 (gment as its) 482.75 501 P 1 F 0.05 (physical) 528.15 501 P 0.63 (length) 317.76 491 P 2 F 0.63 (. There is a linear relation between the ph) 340.26 491 P 0.63 (ysical length of a) 494.5 491 P 1.3 (routing se) 317.76 481 P 1.3 (gment, and the resistance and capacitance of that se) 354.68 481 P 1.3 (g-) 550.64 481 P 2.59 (ment. W) 317.76 471 P 2.59 (e ha) 350.62 471 P 2.59 (v) 367.77 471 P 2.59 (e e) 372.14 471 P 2.59 (xperimentally determined the a) 384.83 471 P 2.59 (v) 504.63 471 P 2.59 (erage rate at) 509 471 P 1 (which the FPGA tiles gro) 317.76 461 P 1 (w with cluster size, and ha) 413.52 461 P 1 (v) 513.79 461 P 1 (e used this) 518.15 461 P 1.43 (kno) 317.76 451 P 1.43 (wledge to appropriately scale the routing se) 331.04 451 P 1.43 (gment resistance) 496.47 451 P (and capacitance v) 317.76 441 T (alues for the v) 381.51 441 T (arious cluster sizes.) 432.52 441 T 0 F (5.4) 317.76 426 T (Scaling T) 339.36 426 T (ransistor and Buff) 378.66 426 T (er) 456.08 426 T (s to Compensate f) 464.45 426 T (or) 542.28 426 T (Increased Segment Ph) 339.36 416 T (ysical Length) 435.72 416 T 2 F 0.24 (T) 317.76 403 P 0.24 (o compensate for dif) 322.54 403 P 0.24 (ferences in the capacitance and resistance of) 397.27 403 P 0.82 (dif) 317.76 393 P 0.82 (ferent length routing se) 327.54 393 P 0.82 (gments, we scale the routing pass-tran-) 413.59 393 P 1.34 (sistors and b) 317.76 383 P 1.34 (uf) 365.26 383 P 1.34 (fers. All of our transistor and b) 372.53 383 P 1.34 (uf) 491.61 383 P 1.34 (fer scaling is in) 498.89 383 P 0.8 (relation to a base architecture that has been area-delay optimized) 317.76 373 P 0.79 (for clusters of size four [Betz98b, Betz99]. From this base archi-) 317.76 363 P 0.65 (tecture, we linearly scale our b) 317.76 353 P 0.65 (uf) 431.3 353 P 0.65 (fers and pass transistors depend-) 438.57 353 P 0.46 (ing on the relation between the ne) 317.76 343 P 0.46 (w se) 442.26 343 P 0.46 (gment lengths and the base) 458.83 343 P -0.2 (se) 317.76 333 P -0.2 (gment length. F) 325.13 333 P -0.2 (or e) 381.35 333 P -0.2 (xample, in an FPGA with size 16 clusters, the) 394.75 333 P 1.87 (ph) 317.76 323 P 1.87 (ysical se) 326.72 323 P 1.87 (gment length is approximately 2x longer than in an) 359.2 323 P 1.68 (architecture with size 4 clusters. T) 317.76 313 P 1.68 (o maintain roughly the same) 448.92 313 P 1.27 (routing speed, we increase the size of the routing switches con-) 317.76 303 P 0.28 (necting to each wire by a f) 317.76 293 P 0.28 (actor of 2. In Section) 414.83 293 P 0.28 (7.2 we v) 493.95 293 P 0.28 (erify that) 525.12 293 P 2.06 (this linear scaling of b) 317.76 283 P 2.06 (uf) 405.8 283 P 2.06 (fers and pass-transistors with se) 413.07 283 P 2.06 (gment) 535.64 283 P (length pro) 317.76 273 T (vides the best results.) 354.38 273 T 2.13 (In our architecture models, we account for v) 317.76 258 P 2.13 (ariations in delay) 491.89 258 P 1.17 (caused by resizing b) 317.76 248 P 1.17 (uf) 394.32 248 P 1.17 (fers and pass-transistors. Also, changes in) 401.59 248 P 53.86 72.63 294.24 720 C 57.98 72.63 290.11 287 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 86.97 255.42 110.31 278.75 R 0.5 H 0 Z 0 X 0 0 0 1 0 0 0 K N 159.91 255.42 183.24 278.75 R N 123.44 255.42 146.77 278.75 R N 232.84 255.42 256.17 278.75 R N 196.37 255.42 219.71 278.75 R N 86.97 216.2 110.31 239.53 R N 159.91 216.2 183.24 239.53 R N 123.44 216.2 146.77 239.53 R N 232.84 216.2 256.17 239.53 R N 196.37 216.2 219.71 239.53 R N 86.39 249.42 220.31 249.42 2 L 2 Z N 122.84 246.42 256.17 246.42 2 L N 159.01 243.33 256.17 243.33 2 L N 110.31 246.08 86.39 246.08 2 L N 146.72 243.5 86.39 243.5 2 L N 116.64 278.42 116.64 255.92 2 L N 113.64 278.42 113.64 215.92 2 L N 120.14 278.42 120.14 215.92 2 L N 116.64 238.42 116.64 215.92 2 L N 156.64 278.92 156.64 216.42 2 L N 153.14 278.92 153.14 216.42 2 L N 149.64 278.92 149.64 256.42 2 L N 150.14 238.92 150.14 216.42 2 L N 256.17 250.08 232.26 250.08 2 L N 186.64 278.75 186.64 216.25 2 L N 190.14 278.75 190.14 216.25 2 L N 193.64 278.75 193.64 216.25 2 L N 226.01 278.75 226.01 216.25 2 L N 222.64 278.75 222.64 216.25 2 L N 229.14 278.75 229.14 256.25 2 L N 229.64 238.75 229.64 216.25 2 L N 2 7 Q (Logic) 89.39 267.92 T (Cluster) 89.39 260.92 T (Logic) 125.39 267.42 T (Cluster) 125.39 260.42 T (Logic) 161.89 267.92 T (Cluster) 161.89 260.92 T (Logic) 198.89 267.42 T (Cluster) 198.89 260.42 T (Logic) 234.89 266.92 T (Cluster) 234.89 259.92 T (Logic) 235.89 229.92 T (Cluster) 235.89 222.92 T (Logic) 199.89 228.42 T (Cluster) 199.89 221.42 T (Logic) 162.39 227.92 T (Cluster) 162.39 220.92 T (Logic) 125.89 227.92 T (Cluster) 125.89 220.92 T (Logic) 89.89 228.92 T (Cluster) 89.89 221.92 T 0 Z 3 X 90 450 12.75 12.75 115.64 247.67 A 90 450 12.75 12.75 225.64 247.17 A 115.55 223.14 112.57 223.05 115.25 233.51 118.52 223.22 4 Y N 115.55 223.14 112.57 223.05 115.25 233.51 118.52 223.22 4 Y V 115.9 211.2 118.87 211.28 116.2 200.82 112.92 211.11 4 Y N 115.9 211.2 118.87 211.28 116.2 200.82 112.92 211.11 4 Y V 115.56 222.89 115.89 211.45 2 L N 224.53 223.3 221.56 223.26 224.4 233.68 227.51 223.34 4 Y N 224.53 223.3 221.56 223.26 224.4 233.68 227.51 223.34 4 Y V 224.68 211.9 227.65 211.94 224.81 201.52 221.7 211.86 4 Y N 224.68 211.9 227.65 211.94 224.81 201.52 221.7 211.86 4 Y V 224.54 223.05 224.68 212.15 2 L N 2 H 4 X 90 450 42.92 42.92 116.17 157.13 A 90 450 42.92 42.92 225.14 158.17 A 155.43 172.72 76.43 172.72 2 L 0.5 H 2 Z 0 X N 157.93 148.72 74.43 148.72 2 L N 128.43 198.22 128.43 115.72 2 L N 102.43 197.72 102.43 116.22 2 L N 158.93 160.22 142.93 160.22 2 L N 213.56 198.92 213.56 116.42 2 L N 225.56 200.42 225.56 115.42 2 L N 266.06 149.42 183.06 149.42 2 L N 267.56 160.42 182.56 160.42 2 L N 265.56 172.57 251.56 172.57 2 L N 236.06 199.92 236.06 186.92 2 L N 184.56 172.42 195.56 172.42 2 L N 235.76 116.62 235.76 126.62 2 L N 130.05 151.98 122.81 144.73 2 L N 130.23 152.16 132.18 150.21 2 L N 122.98 144.56 124.93 142.61 2 L N 128.64 153.4 121.39 146.15 2 L N 125.11 142.43 121.75 139.08 2 L N 135.89 153.57 132.53 150.21 2 L N 101.37 152.2 108.62 144.95 2 L N 101.19 152.37 99.25 150.43 2 L N 108.44 144.77 106.49 142.83 2 L N 102.78 153.61 110.03 146.36 2 L N 106.32 142.65 109.68 139.29 2 L N 95.53 153.79 98.89 150.43 2 L N 127.37 181.02 134.62 173.78 2 L N 127.2 181.2 125.58 179.58 2 L N 134.47 173.63 132.86 172.01 2 L N 128.55 182.2 135.8 174.95 2 L N 132.71 171.86 136.07 168.51 2 L N 121.9 182.97 125.25 179.61 2 L N 102.66 180.87 95.41 173.63 2 L N 102.84 181.05 104.78 179.11 2 L N 95.59 173.45 97.54 171.51 2 L N 101.25 182.29 94 175.04 2 L N 97.71 171.33 94.35 167.97 2 L N 108.49 182.47 105.14 179.11 2 L N 118.6 165.08 118.6 154.83 2 L N 118.6 165.32 115.85 165.32 2 L N 118.35 154.83 115.6 154.83 2 L N 120.6 165.08 120.6 154.83 2 L N 115.35 154.83 115.35 150.08 2 L N 115.6 170.33 115.6 165.58 2 L N 99.6 163.58 109.85 163.58 2 L N 99.35 163.58 99.35 160.82 2 L N 109.85 163.33 109.85 160.58 2 L N 99.6 165.58 109.85 165.58 2 L N 109.85 160.33 114.6 160.33 2 L N 94.35 160.58 99.1 160.58 2 L N 143.93 160.22 115.68 160.22 2 L N 94.68 160.72 73.43 160.72 2 L N 115.93 170.47 115.93 199.72 2 L N 115.68 150.47 115.68 114.47 2 L N 115.93 139.22 109.68 139.22 2 L N 121.18 138.97 115.68 138.97 2 L N 90 450 1.12 1.12 136.3 160.09 G 2 H 0 Z 90 450 1.12 1.12 136.3 160.09 A 90 450 1.12 1.12 115.8 138.84 G 90 450 1.12 1.12 115.8 138.84 A 136.18 153.72 136.18 160.22 2 L V 0.5 H 2 Z N 90 450 1.12 1.12 90.05 160.84 G 2 H 0 Z 90 450 1.12 1.12 90.05 160.84 A 136.18 159.87 136.18 168.12 2 L V 0.5 H 2 Z N 95.28 153.97 90.28 153.97 2 L V N 89.93 154.22 89.93 160.97 2 L V N 90.18 160.77 90.18 167.52 2 L V N 94.18 167.77 90.18 167.77 2 L V N 108.68 182.77 116.18 182.77 2 L V N 121.68 182.97 115.93 182.97 2 L V N 90 450 1.12 1.12 116.05 183.09 G 2 H 0 Z 90 450 1.12 1.12 116.05 183.09 A 236.31 189.52 211.06 189.52 2 L V 0.5 H 2 Z N 90 450 1.12 1.12 236.33 190.19 G 2 H 0 Z 90 450 1.12 1.12 236.33 190.19 A 251.06 172.62 228.13 172.62 2 L V 0.5 H 2 Z N 195.86 172.62 215.13 172.62 2 L V N 235.86 188.02 235.86 148.34 2 L V N 235.66 125.02 211.88 125.02 2 L V N 194.06 140.59 194.06 171.82 2 L V N 257.46 174.22 257.46 143.34 2 L V N 240.63 125.22 235.86 125.22 2 L V N 90 450 1.12 1.12 257.13 172.39 G 2 H 0 Z 90 450 1.12 1.12 257.13 172.39 A 90 450 1.12 1.12 235.93 125.19 G 90 450 1.12 1.12 235.93 125.19 A 90 450 1.12 1.12 194.33 172.59 G 90 450 1.12 1.12 194.33 172.59 A 90 450 1.12 1.12 198.93 149.39 G 90 450 1.12 1.12 198.93 149.39 A 90 450 1.12 1.12 213.53 135.54 G 90 450 1.12 1.12 213.53 135.54 A 90 450 0.79 0.66 225.87 144.73 G 90 450 0.79 0.66 225.87 144.73 A 90 450 1.12 1.12 210.33 160.19 G 90 450 1.12 1.12 210.33 160.19 A 90 450 1.12 1.12 85 148.64 G 90 450 1.12 1.12 85 148.64 A 90 450 1.12 1.12 102.25 132.04 G 90 450 1.12 1.12 102.25 132.04 A 90 450 1.12 1.12 128.45 194.69 G 90 450 1.12 1.12 128.45 194.69 A 90 450 1.12 1.12 149.2 172.89 G 90 450 1.12 1.12 149.2 172.89 A 208.9 187.73 211.06 189.52 2 L V 0.5 H 2 Z N 216.74 158.06 223.99 150.81 2 L V N 216.57 158.24 214.62 156.29 2 L V N 223.82 150.64 221.87 148.69 2 L V N 218.16 159.47 225.41 152.23 2 L V N 221.69 148.51 225.05 145.16 2 L V N 210.91 159.65 214.27 156.29 2 L V N 4 9 Q -0.14 (Figure 3. FPGA Architecture with Length 4 Segments, and) 60.49 95.08 P (50/50 Unbuffered/Buffered Switches.) 103.73 84.08 T 237.39 139.7 233.73 144.27 2 L V N 233.48 144.27 229.81 139.7 2 L V N 237.39 139.7 230.06 139.7 2 L V N 231.91 142.8 229.1 142.8 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 233.72 139.55 233.72 135.8 2 L N 233.52 144.55 233.52 148.3 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 235.13 144.4 238.79 139.84 2 L V N 239.04 139.84 242.7 144.4 2 L V N 235.13 144.4 242.46 144.4 2 L V N 240.61 141.3 243.42 141.3 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 238.8 144.55 238.8 148.3 2 L N 239 139.55 239 135.8 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 238.74 148.3 233.72 148.3 2 L N 238.74 135.55 233.92 135.55 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 219.29 171.44 223.85 175.04 2 L V N 223.85 175.28 219.29 178.88 2 L V N 219.29 171.44 219.29 178.64 2 L V N 222.38 176.82 222.38 179.59 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 219.13 175.05 215.38 175.05 2 L N 224.13 175.24 227.88 175.24 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 223.98 173.66 219.42 170.06 2 L V N 219.42 169.82 223.98 166.22 2 L V N 223.98 173.66 223.98 166.46 2 L V N 220.88 168.28 220.88 165.52 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 224.13 170.06 227.88 170.06 2 L N 219.13 169.86 215.38 169.86 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 227.88 170.11 227.88 175.05 2 L N 215.13 170.11 215.13 174.85 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 244.79 183.35 250.31 182.42 2 L V N 250.47 182.58 249.54 188.1 2 L V N 244.79 183.35 249.39 187.95 2 L V N 250.42 184.59 252.18 186.36 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 246.99 185.76 244.33 188.41 2 L N 250.65 182.35 253.3 179.7 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 249.53 181.45 244.01 182.38 2 L V N 243.85 182.22 244.78 176.7 2 L V N 249.53 181.45 244.93 176.85 2 L V N 243.9 180.21 242.14 178.44 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 247.34 179.04 249.99 176.39 2 L N 243.68 182.45 241.02 185.1 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 250.02 176.42 253.17 179.57 2 L N 241.01 185.44 244.03 188.46 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 252.13 178.34 257.14 173.34 2 L N 242.63 187.34 240.13 189.84 2 L N 236.63 190.09 240.13 190.09 2 L N 203.35 180.94 203.83 186.91 2 L V N 203.65 187.1 197.67 186.62 2 L V N 203.35 180.94 197.85 186.43 2 L V N 201.43 187.24 199.33 189.34 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 200.49 183.59 197.84 180.93 2 L N 203.88 187.27 206.53 189.92 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 204.97 185.96 204.49 179.99 2 L V N 204.68 179.81 210.65 180.29 2 L V N 204.97 185.96 210.47 180.47 2 L V N 206.89 179.66 208.99 177.56 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 207.83 183.32 210.48 185.97 2 L N 204.45 179.63 201.79 176.98 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 210.44 186.01 206.68 189.77 2 L N 201.42 177 197.81 180.61 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 199.63 178.84 194.63 173.84 2 L N 251.82 135.9 252.4 141.77 2 L V N 252.22 141.95 246.34 141.37 2 L V N 251.82 135.9 246.52 141.2 2 L V N 250.05 142.05 248.02 144.08 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 249.06 138.44 246.41 135.79 2 L N 252.45 142.12 255.1 144.78 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 253.51 140.86 252.93 134.98 2 L V N 253.1 134.8 258.98 135.38 2 L V N 253.5 140.86 258.8 135.55 2 L V N 255.27 134.7 257.31 132.67 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 256.27 138.31 258.92 140.96 2 L N 252.88 134.63 250.22 131.98 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 258.88 141 255.25 144.63 2 L N 249.86 131.98 246.38 135.47 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 235.88 125.34 235.88 135.09 2 L N 247.88 132.84 240.63 125.59 2 L N 203.1 143.28 208.85 142.58 2 L V N 209.01 142.74 208.31 148.49 2 L V N 203.1 143.28 208.14 148.33 2 L V N 209.06 144.86 210.99 146.79 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 205.52 145.91 202.87 148.57 2 L N 209.19 142.52 211.84 139.86 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 207.98 141.52 202.23 142.22 2 L V N 202.06 142.05 202.77 136.3 2 L V N 207.98 141.52 202.93 136.47 2 L V N 202.02 139.94 200.08 138 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 205.56 138.88 208.21 136.23 2 L N 201.89 142.28 199.23 144.93 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 208.25 136.27 211.71 139.73 2 L N 199.24 145.29 202.55 148.6 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 204.4 130.2 209.99 129.34 2 L V N 210.15 129.49 209.28 135.08 2 L V N 204.4 130.2 209.13 134.93 2 L V N 210.12 131.54 211.94 133.35 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 206.66 132.67 204.01 135.33 2 L N 210.33 129.27 212.98 126.62 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 209.18 128.34 203.59 129.2 2 L V N 203.44 129.05 204.3 123.46 2 L V N 209.18 128.34 204.46 123.61 2 L V N 203.46 127 201.65 125.19 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 206.92 125.87 209.57 123.22 2 L N 203.26 129.27 200.61 131.92 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 209.61 123.25 212.85 126.49 2 L N 200.6 132.27 203.7 135.37 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 201.63 133.59 194.13 140.84 2 L N 200.63 146.84 198.38 149.09 2 L N 213.63 135.59 210.63 138.59 2 L N 136.97 184.08 142.5 183.15 2 L V N 142.65 183.3 141.72 188.83 2 L V N 136.97 184.08 141.57 188.68 2 L V N 142.6 185.32 144.36 187.09 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 139.17 186.49 136.51 189.14 2 L N 142.83 183.08 145.48 180.43 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 141.71 182.18 136.19 183.11 2 L V N 136.04 182.95 136.96 177.43 2 L V N 141.71 182.18 137.12 177.58 2 L V N 136.09 180.93 134.32 179.17 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 139.52 179.77 142.17 177.12 2 L N 135.86 183.18 133.21 185.83 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 142.21 177.15 145.35 180.3 2 L N 133.19 186.17 136.21 189.19 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 143.88 178.34 149.13 173.09 2 L N 134.38 187.84 128.13 194.09 2 L N 91.4 141.56 96.93 140.63 2 L V N 97.08 140.78 96.15 146.31 2 L V N 91.4 141.56 96 146.15 2 L V N 97.03 142.8 98.79 144.56 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 93.6 143.97 90.95 146.62 2 L N 97.26 140.56 99.91 137.91 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 96.15 139.66 90.62 140.58 2 L V N 90.47 140.43 91.4 134.91 2 L V N 96.15 139.66 91.55 135.06 2 L V N 90.52 138.41 88.76 136.65 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 93.95 137.25 96.6 134.59 2 L N 90.29 140.66 87.64 143.31 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 96.64 134.63 99.79 137.78 2 L N 87.62 143.65 90.64 146.67 2 L N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 102.64 132.09 98.39 136.34 2 L N 88.89 145.09 84.89 149.09 2 L N 53.86 72.63 294.24 720 C 0 0 612 792 C 317.76 72.63 558.14 720 C 317.76 72.63 558.14 234 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 364.97 151.98 391.36 179.58 R 0.5 H 0 Z 0 X 0 0 0 1 0 0 0 K N 444.65 150.76 483.11 189.22 R N 361.97 180.48 361.97 143.89 2 L 2 Z N 358.73 180.48 358.73 143.89 2 L N 355.49 180.48 355.49 143.89 2 L N 355.67 149.65 392.87 149.65 2 L N 355.67 146.41 392.87 146.41 2 L N 355.67 143.17 392.87 143.17 2 L N 441.4 189.33 441.4 138.95 2 L N 431.44 189.33 431.44 138.95 2 L N 434.76 189.33 434.76 138.95 2 L N 438.08 189.33 438.08 138.95 2 L N 431.6 148.21 483.06 148.21 2 L N 431.6 138.25 483.06 138.25 2 L N 431.6 141.57 483.06 141.57 2 L N 431.6 144.89 483.06 144.89 2 L N 3 24 Q (\336) 400.46 145.04 T 2 9 Q (Logic) 452.99 170.61 T (Cluster) 451.7 161.51 T (Logic) 367.72 169.39 T (Cluster) 365.28 159.31 T 0 0 0 1 0 0 0 K 2 12 Q ({) 0 -90 355.97 188.11 TF 0 0 0 1 0 0 0 K 2 9 Q (Channel) 346.46 200.87 T (W) 346.46 191.87 T (idth) 354.6 191.87 T (Channel) 424.96 210.21 T (W) 424.96 201.21 T (idth) 433.1 201.21 T 0 0 0 1 0 0 0 K 2 12 Q ({) 0 -90 433.96 197.54 TF 0 0 0 1 0 0 0 K 436.8 132.51 432.1 132.51 2 L 0 Z N 436.55 129.94 432.1 132.51 436.55 135.07 3 L N 477.86 132.51 482.56 132.51 2 L N 478.11 135.07 482.56 132.51 478.11 129.94 3 L N 436.8 132.51 477.86 132.51 2 L N 360.86 137.41 356.17 137.41 2 L N 360.61 134.84 356.17 137.41 360.61 139.97 3 L N 387.67 137.41 392.37 137.41 2 L N 387.92 139.97 392.37 137.41 387.92 134.84 3 L N 360.86 137.41 387.67 137.41 2 L N 2 9 Q (Se) 360.47 126.21 T (gment) 369.33 126.21 T (Length) 360.47 115.71 T (Increased) 442.13 121.13 T (Length) 442.13 102 T (Increase) 396.8 180.54 T (Cluster) 398.63 169.87 T (Size) 403.13 158.37 T 481.66 179.85 482.76 177.09 472.02 176.02 480.56 182.62 4 Y N 481.66 179.85 482.76 177.09 472.02 176.02 480.56 182.62 4 Y V 495.54 185.37 481.89 179.95 2 L 2 Z N 483.84 141.13 483.38 138.19 473.58 142.73 484.3 144.07 4 Y 0 Z N 483.84 141.13 483.38 138.19 473.58 142.73 484.3 144.07 4 Y V 495.54 139.3 484.08 141.09 2 L 2 Z N (Increased) 493.93 200.59 T (Logic) 500.67 190.41 T (Area) 502.43 180.22 T (Increased) 494.42 152.04 T (Routing) 497.16 141.82 T (Area) 502.92 131.6 T (Per Cluster) 491.92 170.04 T (Per Cluster) 491.54 121.37 T (Se) 442.13 111.57 T (gment) 451 111.57 T 4 F (Figure 4. Effect of Increased Cluster Size on Segment Length) 319.63 83.59 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 2 F (Increased) 424.96 219.77 T 317.76 72.63 558.14 720 C 0 0 612 792 C 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "3" 3 %%Page: "4" 4 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 2 9 Q 0 X 0 0 0 1 0 0 0 K -0.01 (area due to the use of dif) 53.86 714 P -0.01 (ferent sizes of routing pass-transistors and) 142.56 714 P (in) 53.86 704 T (v) 60.5 704 T (erter chains are automatically calculated by VPR.) 64.86 704 T 0 F (5.5) 53.86 688.33 T (V) 75.46 688.33 T (ar) 80.92 688.33 T (ying F) 89.52 688.33 T 0 7.2 Q (c, in) 116.02 686.08 T 0 9 Q (and F) 132.43 688.33 T 0 7.2 Q (c, out) 156.43 686.08 T 0 9 Q (with Logic Cluster Siz) 177.64 688.33 T (e) 271.24 688.33 T 2 F 0.26 (In [Rose91] it is sho) 53.86 673.27 P 0.26 (wn that) 127.68 673.27 P 0.26 ( is good for logic clusters of) 191.67 673.27 P 0.3 (size one; i.e. each logic block pin can be connected to an) 53.86 662.28 P 0.3 (y routing) 261.19 662.28 P 2.13 (track in an adjacent channel. As cluster size increases, setting) 53.86 652.28 P 0.6 ( pro) 88.33 641.87 P 0.6 (vides more \337e) 103.04 641.87 P 0.6 (xibility than is required, w) 155.1 641.87 P 0.6 (asting area.) 252.65 641.87 P 0.68 (In [Betz98b, Betz99] it is sho) 53.86 630.89 P 0.68 (wn that setting) 163.02 630.89 P 1 F 0.68 (F) 220.32 630.89 P 1 7.2 Q 0.54 (c) 225.82 628.64 P 2 9 Q 0.68 ( on the input pins) 229.01 630.89 P 0.71 (\050) 53.86 618.57 P 1 F 0.71 (F) 56.85 618.57 P 1 7.2 Q 0.57 (c, in) 62.35 616.32 P 2 9 Q 0.71 (\051 to) 75.32 618.57 P 0.71 ( and) 128.26 618.57 P 1 F 0.71 (F) 147.18 618.57 P 1 7.2 Q 0.57 (c) 152.68 616.32 P 2 9 Q 0.71 ( on the output pins \050) 155.88 618.57 P 1 F 0.71 (F) 231.7 618.57 P 1 7.2 Q 0.57 (c, out) 237.2 616.32 P 2 10 Q 0.79 (\051) 253.77 618.57 P 2 9 Q 0.71 (to) 260.4 618.57 P 1.25 (pro) 53.86 606.92 P 1.25 (vides a good le) 65.72 606.92 P 1.25 (v) 123.49 606.92 P 1.25 (el of routing \337e) 127.85 606.92 P 1.25 (xibility) 187.21 606.92 P 1.25 (, so all of our e) 212.64 606.92 P 1.25 (xperi-) 272.74 606.92 P (ments use these v) 53.86 596.92 T (alues for clusters of sizes other than one.) 116.88 596.92 T 0 F (5.6) 53.86 581.25 T (Detailed Logic Cluster Structure) 75.46 581.25 T 2 10 Q (.) 212.99 581.25 T 2 9 Q 1.16 (In Figure) 53.86 567.92 P 1.16 (5 we sho) 90.51 567.92 P 1.16 (w the structure of a logic cluster and the cir-) 124.6 567.92 P 1.77 (cuitry connecting the logic clusters to the main FPGA routing.) 53.86 557.92 P 1.09 (T) 53.86 547.92 P 1.09 (able) 58.64 547.92 P 1.09 (1 sho) 75.88 547.92 P 1.09 (ws delay v) 96 547.92 P 1.09 (alues for selected cluster sizes. The multi-) 136.46 547.92 P 0.54 (ple) 53.86 537.92 P 0.54 (xor) 64.72 537.92 P 0.54 (, b) 76.36 537.92 P 0.54 (uf) 85.72 537.92 P 0.54 (fer) 92.99 537.92 P 0.54 (, LUT) 102.62 537.92 P 0.54 (, and \337ip-\337op delays were obtained by model-) 124.49 537.92 P 2.51 (ing the structures in SPICE [Meta92] with TSMC\325) 53.86 527.25 P 2.51 (s 0.35) 252.7 527.25 P 3 10 Q 2.79 (m) 281.47 527.25 P 2 9 Q 2.51 (m) 287.23 527.25 P (process parameters.) 53.86 516.92 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 10 Q (6. P) 317.76 713.33 T (ac) 338.03 713.33 T (king Algorithms) 348.95 713.33 T 2 9 Q 0.82 (The packing step \050in Figure) 317.76 699 P 0.82 (2\051 tak) 422.8 699 P 0.82 (es a netlist consisting of LUTs) 444.27 699 P 1.27 (and \337ip-\337ops and produces a netlist consisting of logic clusters.) 317.76 689 P 0.95 (This in) 317.76 679 P 0.95 (v) 343.61 679 P 0.95 (olv) 347.93 679 P 0.95 (es combining the LUTs and \337ip-\337ops into BLEs, and) 359.29 679 P (then grouping the BLEs into logic clusters.) 317.76 669 T -0.03 (There are tw) 317.76 654 P -0.03 (o main constraints that packing algorithms must meet:) 363.09 654 P (1.) 335.76 639 T 0.62 (The number of BLEs must be less than the cluster size,) 353.76 639 P 1 F (N) 353.76 629 T 2 F (.) 359.77 629 T (2.) 335.76 614 T 2.74 (The number of distinct inputs generated outside the) 353.76 614 P 1.74 (cluster and used as inputs to BLEs within the cluster) 353.76 604 P 2.29 (must be less than or equal to the number of cluster) 353.76 594 P (inputs,) 353.76 584 T 1 F (I) 380.27 584 T 2 F (.) 383.27 584 T 3.89 (In this section, we present tw) 317.76 569 P 3.89 (o packing algorithms, VP) 442.11 569 P 3.89 (ack) 545.65 569 P 0.21 ([Betz97b, Betz98b, Betz99], and T) 317.76 559 P 0.21 (-VP) 443.49 559 P 0.21 (ack. Then we sho) 457.86 559 P 0.21 (w that our) 521.23 559 P 0.21 (ne) 317.76 549 P 0.21 (w T) 326.04 549 P 0.21 (-VP) 339.67 549 P 0.21 (ack algorithm outperforms the original VP) 354.03 549 P 0.21 (ack algorithm) 508.19 549 P (in both area and critical path delay) 317.76 539 T (.) 441.65 539 T 0 F (6.1) 317.76 524 T (Input-Sharing VP) 339.36 524 T (ac) 412.1 524 T (k Algorithm) 421.93 524 T 2 F -0.1 (The original VP) 317.76 511 P -0.1 (ack algorithm has tw) 375.43 511 P -0.1 (o optimization goals. The \336rst) 450.28 511 P -0.06 (is to pack each logic cluster to its capacity in order to minimize the) 317.76 501 P 1.52 (number of clusters needed. The second goal is to minimize the) 317.76 491 P 0.49 (number of inputs to each cluster in order to reduce the number of) 317.76 481 P (connections required between clusters.) 317.76 471 T 1.02 (Vpack uses a greedy algorithm to construct each cluster sequen-) 317.76 456 P 1.52 (tially) 317.76 446 P 1.52 (. At the start of each cluster operation, Vpack selects as a) 335.68 446 P 1.32 (\322seed\323 an unclustered BLE) 317.76 436 P 1.32 (with the most used inputs, and then) 423 436 P -0.06 (places this \322seed\323 into a cluster) 317.76 426 P 1 F -0.06 (C) 432.38 426 P 2 F -0.06 (. Then VP) 438.39 426 P -0.06 (ack selects a ne) 474.88 426 P -0.06 (w BLE,) 530.2 426 P 1 F 0.05 (B) 317.76 416 P 2 F 0.05 ( to pack into) 323.26 416 P 1 F 0.05 (C) 370.48 416 P 2 F 0.05 (based on the) 378.79 416 P 1 F 0.05 (attr) 426.2 416 P 0.05 (action) 439.07 416 P 2 F 0.05 ( that) 461.57 416 P 1 F 0.05 (B) 479.67 416 P 2 F 0.05 ( has to) 485.17 416 P 1 F 0.05 (C.) 511.09 416 P 2 F 0.05 (Attraction) 521.65 416 P 1.03 (is determined by the number of inputs and outputs that) 317.76 406 P 1 F 1.03 (B) 527.08 406 P 2 F 1.03 ( and) 532.58 406 P 1 F 1.03 (C) 552.14 406 P 2 F (ha) 317.76 396 T (v) 326.08 396 T (e in common:) 330.45 396 T 4 F (\0501.1\051) 540.9 375.25 T 2 F 0.26 (After each cluster reaches capacity) 317.76 360 P 0.26 (, packing be) 443.68 360 P 0.26 (gins on a ne) 487.82 360 P 0.26 (w clus-) 531.63 360 P 1.44 (ter) 317.76 350 P 1.44 (. The process terminates when there are no more unclustered) 326.76 350 P 1.9 (BLEs left. The time comple) 317.76 339.33 P 1.9 (xity of this algorithm is O\050k) 425.48 339.33 P 2 7.2 Q 1.52 (max) 535.75 337.08 P 3 10 Q 2.11 (\327) 548.15 339.33 P 2 9 Q 1.9 (n\051) 550.65 339.33 P 1.63 (\050where n is the number of BLEs in the circuit and k) 317.76 327.68 P 2 7.2 Q 1.31 (max) 520.97 325.43 P 2 9 Q 1.63 ( is the) 533.37 327.68 P -0.04 (f) 317.76 316.03 P -0.04 (anout of the highest f) 320.67 316.03 P -0.04 (anout net\051 which results in an e) 396.93 316.03 P -0.04 (x) 509.06 316.03 P -0.04 (ecution time) 513.43 316.03 P 0.88 (of about four seconds to pack the lar) 317.76 306.03 P 0.88 (gest circuit \050clma\051 on a 296) 455 306.03 P (MHz UltraSP) 317.76 296.03 T (ARC-II processor) 366.18 296.03 T (.) 429.92 296.03 T 0 F (6.2) 317.76 281.03 T (Timing-Driven T) 339.36 281.03 T (-VP) 406.79 281.03 T (ac) 421.52 281.03 T (k Algorithm) 431.35 281.03 T 2 F 0.88 (Our ne) 317.76 268.03 P 0.88 (w packing algorithm is based on the original VP) 343.16 268.03 P 0.88 (ack algo-) 524.03 268.03 P 0.09 (rithm, b) 317.76 258.03 P 0.09 (ut its optimization goal is minimizing the number of e) 346.18 258.03 P 0.09 (xter-) 541.15 258.03 P -0.1 (nal connections \050connections between clusters\051 on the critical path.) 317.76 248.03 P 0.29 (The reasoning behind this is that e) 317.76 238.03 P 0.29 (xternal connections ha) 442.86 238.03 P 0.29 (v) 524.24 238.03 P 0.29 (e higher) 528.61 238.03 P 0.83 (delay than internal connections \050connections within a cluster\051, so) 317.76 228.03 P 1.14 (by reducing the number of e) 317.76 218.03 P 1.14 (xternal nets on the critical path, we) 425.07 218.03 P 2.27 (will reduce the circuit delay) 317.76 208.03 P 2.27 (. The \336rst stage of this algorithm) 426.75 208.03 P 0.15 (in) 317.76 198.03 P 0.15 (v) 324.41 198.03 P 0.15 (olv) 328.73 198.03 P 0.15 (es computing which connections are on the critical path. W) 340.09 198.03 P 0.15 (e) 554.15 198.03 P 0.04 (then sequentially pack BLEs along the critical path into logic clus-) 317.76 188.03 P (ters and recompute which BLEs are critical.) 317.76 178.03 T 5 F (6.2.1 An Ov) 317.76 161.03 T (er) 367.57 161.03 T (vie) 375.84 161.03 T (w of Slac) 387.16 161.03 T (k and Cr) 423.5 161.03 T (iticality Calculation) 457.64 161.03 T 2 F 0.1 (The \336rst step in determining which nets are critical is to determine) 317.76 147.03 P 0.46 (the) 317.76 137.03 P 1 F 0.46 (slac) 331.47 137.03 P 0.46 (k) 345.79 137.03 P 2 F 0.46 ( of each connection [Hitc83, Fran92]. Slack is de\336ned as) 349.79 137.03 P 0.74 (the amount of delay which can be added to a connection without) 317.76 127.03 P (increasing the delay of the entire circuit.) 317.76 117.03 T 0.55 (Calculating slack in) 317.76 102.03 P 0.55 (v) 390.01 102.03 P 0.55 (olv) 394.33 102.03 P 0.55 (es computing the arri) 405.69 102.03 P 0.55 (v) 483.37 102.03 P 0.55 (al time,) 487.64 102.03 P 1 F 0.55 (T) 518 102.03 P 1 7.2 Q 0.44 (arrival) 522.34 99.78 P 2 9 Q 0.55 ( and) 542.34 102.03 P 1.29 (the required arri) 317.76 90.38 P 1.29 (v) 378.1 90.38 P 1.29 (al time,) 382.38 90.38 P 1 F 1.29 (T) 414.21 90.38 P 1 7.2 Q 1.03 (r) 418.82 88.13 P 1.03 (equir) 421.35 88.13 P 1.03 (ed) 436.29 88.13 P 2 9 Q 1.29 ( at all BLE input pins. This is) 443.08 90.38 P 0.85 (accomplished using tw) 317.76 78.73 P 0.85 (o breadth-\336rst tra) 401.87 78.73 P 0.85 (v) 465.88 78.73 P 0.85 (ersals of the circuit; the) 470.25 78.73 P 53.86 75.73 294.24 720 C 53.86 288.57 294.24 482.53 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 107.14 327.43 253.81 474.3 R 1 H 0 Z 3 X 0 0 0 1 0 0 0 K N 183.4 376.37 242.1 449.48 R 0.5 H N 119.24 446.15 123.99 441.4 2 L 2 Z 0 X N 119.09 436.45 123.84 441.2 2 L N 119.09 446.1 119.09 436.5 2 L N 62.5 462.04 62.5 366.27 2 L N 106.93 441.5 118.64 441.5 2 L N 81.14 455.35 85.89 450.6 2 L N 80.99 445.65 85.74 450.4 2 L N 80.99 455.3 80.99 445.7 2 L N 67.68 450.5 80.14 450.5 2 L N 96.94 454.9 103.54 448.3 2 L N 96.94 428.3 103.54 434.9 2 L N 103.54 448.3 103.54 434.9 2 L N 96.94 454.9 96.94 428.3 2 L N 92.74 450.5 96.74 450.5 2 L N 92.74 445.9 96.74 445.9 2 L N 92.74 441.3 96.74 441.3 2 L N 92.74 436.7 96.74 436.7 2 L N 92.74 432.1 96.74 432.1 2 L N 2 9 Q (Routing Se) 0 -270 60.7 391.84 TF (gment) 0 -270 60.7 431.96 TF 103.54 441.5 109.94 441.5 2 L N 154.34 445.7 160.94 439.1 2 L N 154.34 419.1 160.94 425.7 2 L N 160.94 439.1 160.94 425.7 2 L N 154.34 445.7 154.34 419.1 2 L N 150.14 441.3 154.14 441.3 2 L N 150.14 437.62 154.14 437.62 2 L N 150.14 430.26 154.14 430.26 2 L N 150.14 422.9 154.14 422.9 2 L N 123.93 441.3 150.14 441.3 2 L N 92.34 450.57 85.43 450.57 2 L N 2 7 Q (Fc) 0 -270 101.87 437.34 TF 150.14 426.58 154.14 426.58 2 L N 150.14 433.94 154.14 433.94 2 L N 219.14 394.77 230.34 405.97 R 0 Z N 149.94 445.5 153.94 445.5 2 L 2 Z N 149.94 419.5 153.94 419.5 2 L N 235.94 418.57 238.14 416.37 2 L N 238.14 416.37 238.14 412.57 2 L N 235.94 410.57 238.14 412.77 2 L N 235.94 418.57 235.94 410.57 2 L N 212.81 406.57 215.94 406.57 215.94 400.57 219.14 400.57 4 L N 215.94 406.57 215.94 417.17 235.74 417.17 3 L N 230.34 400.37 232.14 400.37 232.14 412.57 235.94 412.57 4 L N 242.66 441.37 247.41 446.12 2 L N 252.36 441.22 247.61 445.97 2 L N 242.71 441.22 252.31 441.22 2 L N 247.31 437.57 247.31 440.77 2 L N 238.34 414.37 247.34 414.37 247.34 438.02 3 L N 2 9 Q (FF) 219.59 397.7 T 267.27 401.02 262.52 395.98 2 L N 257.57 401.18 262.32 396.13 2 L N 267.23 401.18 257.62 401.18 2 L N 262.62 405.05 262.62 401.65 2 L N 268.28 387.8 278.53 387.8 2 L N 268.03 387.8 268.03 385.37 2 L N 278.53 387.58 278.53 385.15 2 L N 268.28 389.57 278.53 389.57 2 L N 278.53 384.93 283.28 384.93 2 L N 263.03 385.15 267.78 385.15 2 L N 247.3 414.37 262.59 414.37 262.59 404.87 3 L N 262.7 396.21 262.7 385.28 2 L N 283.84 462.04 283.84 366.27 2 L N (Routing Se) 0 -270 281.32 391.84 TF (gment) 0 -270 281.32 431.96 TF 2 7 Q (3N+2) 0 -270 159.45 423.97 TF 291.84 462.04 291.84 366.27 2 L N 276.28 379.31 286.53 379.31 2 L N 276.03 379.31 276.03 376.88 2 L N 286.53 379.09 286.53 376.66 2 L N 276.28 381.07 286.53 381.07 2 L N 286.53 376.44 291.28 376.44 2 L N 271.03 376.66 275.78 376.66 2 L N 262.7 384.87 262.7 376.62 271.5 376.62 3 L N 2 9 Q (BLE) 206.64 367.49 T (Logic Cluster) 158.53 314.28 T (N) 209.66 352.08 T (BLEs) 202.43 342.31 T 2 24 Q (....) 0 -270 197.76 336.8 TF 90 450 2.5 2.5 106.85 441.62 G 0 Z 90 450 2.5 2.5 106.85 441.62 A 90 450 2.5 2.5 183.48 442.51 G 90 450 2.5 2.5 183.48 442.51 A 90 450 2.5 2.5 242.1 414.37 G 90 450 2.5 2.5 242.1 414.37 A 4 18 Q (A) 69.1 455.62 T (B) 107.35 445.62 T (C) 169.6 445.17 T 90 450 2.5 2.5 67.85 450.37 G 90 450 2.5 2.5 67.85 450.37 A (D) 242.18 397.66 T 68 462.04 68 366.27 2 L 2 Z N 196.9 446.65 201.26 441.9 2 L N 196.76 436.95 201.12 441.7 2 L N 196.76 446.61 196.76 437.01 2 L N 201.07 442.03 210.28 442.03 210.28 413.57 3 L N 2 9 Q (Local) 147.29 357.96 T (Routing) 143.03 349.96 T (Mux) 145.35 341.95 T (es) 162.22 341.95 T (Input) 76.9 352.37 T (Connection) 65.65 344.75 T ( Buf) 70.77 337.13 T (fers) 86.29 337.13 T 0 0 0 1 0 0 0 K 2 24 Q ({) 0 -270 160.38 363.57 TF 0 0 0 1 0 0 0 K 4 30 Q ({) 0 -270 93.55 358.56 TF 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 9 Q (Figure 5. Detailed Logic Cluster Structure) 91.17 297.73 T 0 0 0 1 0 0 0 K 2 24 Q ({) 0 -270 126.46 381.61 TF 0 0 0 1 0 0 0 K 2 9 Q (Local) 113.17 377.13 T (Buf) 113.17 368.13 T (fers) 126.44 368.13 T 2 24 Q (....) 0 -270 87.01 396.3 TF 191.43 391.07 212.18 415.44 R 7 X V 0 X N 2 9 Q (4) 199.38 406.49 T (LUT) 193.13 396.87 T 200.31 415.94 200.31 423.44 2 L N 163.49 434.1 165.86 431.73 2 L N 163.41 429.25 165.79 431.63 2 L N 163.41 434.08 163.41 429.28 2 L N 160.93 431.57 163.18 431.57 2 L N 165.68 431.82 170.93 431.82 170.93 442.03 196.18 442.03 4 L N 195.06 415.94 195.06 423.44 2 L N 205.06 415.94 205.06 423.44 2 L N 2 24 Q (....) 0 -270 157.26 379.8 TF (....) 0 -270 123.12 398.94 TF 247.39 446.21 247.39 462.3 145.14 462.3 145.14 445.57 150.75 445.57 5 L N 2 9 Q (& Mux) 69.59 328.13 T (es) 95.71 328.13 T 53.86 75.73 294.24 720 C 0 0 612 792 C 53.86 75.73 294.24 720 C 53.86 75.73 294.24 288.57 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 10 Q 0 X 0 0 0 1 0 0 0 K (T) 70.99 257.73 T (able 1: Selected Logic Cluster Delay V) 76.74 257.73 T (alues \050in) 239.13 257.73 T (picoseconds\051 0.35) 111.49 245.73 T 3 F (m) 187.88 245.73 T 4 F (m CMOS) 193.64 245.73 T 4 9 Q (Cluster) 83.5 207.39 T (Size) 90 196.39 T -0.31 ( A to B) 129.74 196.39 P (B to C) 168.02 218.39 T (and D) 168.64 207.39 T (to C) 172.14 196.39 T -0.35 (C to D) 204.21 196.39 P -0.31 ( B to D) 239.41 196.39 P 2 F (1 \050No Local) 77.23 183.39 T (Mux) 93.36 172.39 T (es\051) 110.22 172.39 T (761) 144.01 172.39 T (140) 181.52 172.39 T (379) 216.89 172.39 T (519) 253.68 172.39 T (2) 116.22 159.39 T (761) 144.01 159.39 T (627) 181.52 159.39 T (379) 216.89 159.39 T (1006) 249.18 159.39 T (4) 116.22 146.39 T (761) 144.01 146.39 T (761) 181.52 146.39 T (379) 216.89 146.39 T (1140) 249.18 146.39 T (8) 116.22 133.39 T (761) 144.01 133.39 T (902) 181.52 133.39 T (379) 216.89 133.39 T (1281) 249.18 133.39 T (16) 111.72 120.39 T (761) 144.01 120.39 T (1056) 177.02 120.39 T (379) 216.89 120.39 T (1435) 249.18 120.39 T (20) 111.72 107.39 T (761) 144.01 107.39 T (1084) 177.02 107.39 T (379) 216.89 107.39 T (1463) 249.18 107.39 T 72.78 230.14 72.78 102.64 2 L V 0.5 H 0 Z N 126.72 230.64 126.72 102.14 2 L V N 163.51 230.64 163.51 102.14 2 L V N 201.02 230.64 201.02 102.14 2 L V N 236.39 230.64 236.39 102.14 2 L V N 273.18 230.14 273.18 102.64 2 L V N 72.53 230.39 273.43 230.39 2 L V N 73.03 192.64 272.93 192.64 2 L V N 73.03 190.14 272.93 190.14 2 L V N 72.53 167.39 273.43 167.39 2 L V N 72.53 154.39 273.43 154.39 2 L V N 72.53 141.39 273.43 141.39 2 L V N 72.53 128.39 273.43 128.39 2 L V N 72.53 115.39 273.43 115.39 2 L V N 72.53 102.39 273.43 102.39 2 L V N 53.86 75.73 294.24 720 C 0 0 612 792 C 53.86 75.73 294.24 720 C 157.2 669.28 191.68 679.68 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q 0 X 0 0 0 1 0 0 0 K (F) 158.2 673.27 T 1 7 Q (c) 164.35 670.37 T 1 9 Q (W) 181.52 673.27 T 2 F (=) 171.95 673.27 T 53.86 75.73 294.24 720 C 0 0 612 792 C 53.86 637.89 88.33 648.28 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q 0 X 0 0 0 1 0 0 0 K (F) 54.86 641.87 T 1 7 Q (c) 61.01 638.97 T 1 9 Q (W) 78.18 641.87 T 2 F (=) 68.61 641.87 T 0 0 612 792 C 53.86 75.73 294.24 720 C 91.25 615.65 128.26 624.98 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 2 9 Q 0 X 0 0 0 1 0 0 0 K (2) 93.2 618.57 T 1 F (W) 104.44 618.57 T (N) 118.77 618.57 T 3 F (\244) 114.84 618.57 T (\327) 99.94 618.57 T 53.86 75.73 294.24 720 C 0 0 612 792 C 53.86 75.73 294.24 720 C 270.36 616.98 294.24 624.98 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q 0 X 0 0 0 1 0 0 0 K (W) 271.36 618.57 T (N) 285.69 618.57 T 3 F (\244) 281.76 618.57 T 53.86 75.73 294.24 720 C 0 0 612 792 C 317.76 75.73 558.14 720 C 353.88 371 504.78 383 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q 0 X 0 0 0 1 0 0 0 K (A) 355.34 375.25 T (t) 361.37 375.25 T (t) 364.4 375.25 T (r) 367.43 375.25 T (a) 371.46 375.25 T (c) 376.49 375.25 T (t) 381.02 375.25 T (i) 384.05 375.25 T (o) 387.09 375.25 T (n) 392.12 375.25 T (B) 400.85 375.25 T 3 F (\050) 397.15 375.25 T (\051) 406.99 375.25 T 1 F (N) 426.43 375.25 T (e) 432.97 375.25 T (t) 437.49 375.25 T (s) 440.53 375.25 T (B) 448.26 375.25 T 3 F (\050) 444.56 375.25 T (\051) 454.4 375.25 T 1 F (N) 468.98 375.25 T (e) 475.52 375.25 T (t) 480.04 375.25 T (s) 483.08 375.25 T (C) 490.74 375.25 T 3 F (\050) 487.11 375.25 T (\051) 497.58 375.25 T (\307) 459.64 375.25 T 2 F (=) 414.48 375.25 T 424.95 373.9 424.95 382 2 L 0.41 H 2 Z N 501.48 373.9 501.48 382 2 L N 317.76 75.73 558.14 720 C 0 0 612 792 C 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "4" 4 %%Page: "5" 5 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 2 9 Q 0 X 0 0 0 1 0 0 0 K -0.06 (\336rst tra) 53.86 714 P -0.06 (v) 79.36 714 P -0.06 (ersal propag) 83.73 714 P -0.06 (ates) 127.85 714 P 1 F -0.06 (T) 144.03 714 P 1 7.2 Q -0.05 (arrival) 148.37 711.75 P 2 9 Q -0.06 ( forw) 168.38 714 P -0.06 (ard from input pins and re) 187.46 714 P -0.06 (gis-) 280.74 714 P 1.98 (ter outputs \050Sources\051, and the second propag) 53.86 702.35 P 1.98 (ates) 225.92 702.35 P 1 F 1.98 (T) 244.14 702.35 P 1 7.2 Q 1.59 (r) 248.75 700.1 P 1.59 (equir) 251.28 700.1 P 1.59 (ed) 266.22 700.1 P 2 9 Q 1.98 ( back) 273.01 702.35 P -0.22 (from output pins and re) 53.86 690.7 P -0.22 (gister inputs \050Sinks\051. The slack of a connec-) 137.32 690.7 P (tion dri) 53.86 680.7 T (ving a BLE input pin,) 79.89 680.7 T 1 F (i,) 160.39 680.7 T 2 F (is de\336ned as:) 167.39 680.7 T 4 F (\0501.2\051) 276.99 659.95 T 2 F 0.8 (Finally) 53.86 642.3 P 0.8 (, we de\336ne the criticality of the connection dri) 78.78 642.3 P 0.8 (ving input) 251.14 642.3 P 1 F 0.8 (i) 291.73 642.3 P 2 F (as:) 53.86 632.3 T 4 F (\0501.3\051) 276.99 606.55 T 2 F -0.22 (where) 53.86 585.28 P 1 F -0.22 (MaxSlac) 77.87 585.28 P -0.22 (k) 109.18 585.28 P 2 F -0.22 ( is the lar) 113.18 585.28 P -0.22 (gest slack amongst all point-to-point con-) 145.6 585.28 P (nections in the entire circuit.) 53.86 575.28 T 5 F (6.2.2 Dela) 53.86 558.28 T (y Estimates of an Unplaced and Unrouted Circuit) 97.11 558.28 T 2 F 0.19 (T) 53.86 544.28 P 0.19 (o obtain a good packing solution) 58.64 544.28 P 2 7.2 Q 0.15 (1) 177.34 547.88 P 2 9 Q 0.19 ( the T) 180.94 544.28 P 0.19 (-VP) 201.49 544.28 P 0.19 (ack algorithm models) 215.86 544.28 P 0.2 (three types of delay: The delay through a BLE, or) 53.86 534.28 P 1 F 0.2 (lo) 237.12 534.28 P 0.2 (gic_delay) 244.04 534.28 P 0.2 (,) 278.53 534.28 P 2 F 0.2 (the) 283.24 534.28 P 3.24 (connection delay between blocks within the same cluster or) 53.86 524.28 P 1 F 0.03 (intr) 53.86 514.28 P 0.03 (a_cluster_connection_delay) 66.73 514.28 P 2 F 0.03 (, and the connection delay between) 167.63 514.28 P 17.31 (blocks that are in dif) 53.86 504.28 P 17.31 (ferent clusters, or) 196.88 504.28 P 1 F 3.95 (inter_cluster_connection_delay) 53.86 494.28 P 2 F 3.95 (. W) 167.26 494.28 P 3.95 (e e) 183.49 494.28 P 3.95 (xperimentally determined) 197.55 494.28 P 0.9 (that setting) 53.86 484.28 P 1 F 0.9 (lo) 97.67 484.28 P 0.9 (gic_delay) 104.58 484.28 P 2 F 0.9 (=0.1,) 139.57 484.28 P 1 F 0.9 (intr) 161.31 484.28 P 0.9 (a_cluster_connection_delay) 174.18 484.28 P 2 F 0.9 (=0.1,) 275.66 484.28 P 2.37 (and) 53.86 474.28 P 1 F 2.37 (inter_cluster_connection_delay) 71.47 474.28 P 2 F 2.37 (=1.0 results in the clustered) 185.46 474.28 P 0.87 (circuits ha) 53.86 464.28 P 0.87 (ving the smallest delay after placement and routing by) 91.79 464.28 P (VPR) 53.86 454.28 T 2 7.2 Q (2) 71.36 457.88 T 2 9 Q (.) 74.96 454.28 T 5 F (6.2.3 The Attr) 53.86 437.28 T (action Function) 110.8 437.28 T 2 F 1.18 (W) 53.86 423.28 P 1.18 (e e) 61.63 423.28 P 1.18 (xtend the attraction function from the original VP) 72.93 423.28 P 1.18 (ack algo-) 259.82 423.28 P 0.86 (rithm to include timing information. The \336rst BLE that is placed) 53.86 413.28 P -0.08 (into a cluster is the unclustered BLE that is dri) 53.86 403.28 P -0.08 (v) 220.18 403.28 P -0.08 (en by the most crit-) 224.55 403.28 P 0.69 (ical connection in the circuit. Then, based on our attraction func-) 53.86 393.28 P 0.38 (tion \050Equation 1.8, belo) 53.86 383.28 P 0.38 (w\051 we add the most attracti) 140.04 383.28 P 0.38 (v) 239.47 383.28 P 0.38 (e BLEs to the) 243.83 383.28 P -0.13 (cluster) 53.86 373.28 P -0.13 (. W) 77.36 373.28 P -0.13 (e repeat this absorbtion until either no more BLEs will \336t) 89.51 373.28 P 0.19 (into the cluster) 53.86 363.28 P 0.19 (, or all of the cluster inputs are used. Once a cluster) 107.38 363.28 P 0.38 (is full, we start a ne) 53.86 353.28 P 0.38 (w cluster with a ne) 126.04 353.28 P 0.38 (w seed, and repeat the pro-) 195.35 353.28 P -0.04 (cess until there are no unclustered BLEs left in the circuit. W) 53.86 343.28 P -0.04 (e ne) 272.67 343.28 P -0.04 (xt) 287.23 343.28 P (describe ho) 53.86 333.28 T (w blocks are selected for absorbtion.) 94.87 333.28 T 2.27 (W) 53.86 318.28 P 2.27 (e de\336ne the base criticality of each unclustered BLE,) 61.63 318.28 P 1 F 2.27 (B,) 274.48 318.28 P 2 F 2.27 (or) 286.74 318.28 P 1 F 18.78 (Base_BLE_Criticality\050B\051) 53.86 308.28 P 2 F 18.78 (,) 144.86 308.28 P 18.78 (to be the maximum) 168.14 308.28 P 1 F 0.26 (Connection_Criticality) 53.86 298.28 P 2 F 0.26 (v) 139.38 298.28 P 0.26 (alue of all connections joining) 143.65 298.28 P 1 F 0.26 (B) 256.21 298.28 P 2 F 0.26 ( to BLEs) 261.71 298.28 P 53.86 141.06 294.24 155.23 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 62.36 153.25 204.09 153.25 2 L 0.5 H 2 Z 0 X 0 0 0 1 0 0 0 K N 0 0 612 792 C 2 6.4 Q 0 X 0 0 0 1 0 0 0 K (1) 53.86 138.92 T 2 8 Q 0.02 (A good packing solution is one that results in the smallest delay after be-) 60.94 135.72 P (ing placed and routed by VPR.) 60.94 125.72 T 2 6.4 Q (2) 53.86 118.92 T 2 8 Q 0.39 (Note that these delay values are) 60.94 115.72 P 1 F 0.39 ( only used in the packing process) 164.42 115.72 P 2 F 0.39 (. After) 272.97 115.72 P 0.28 (packing is complete, VPR places and routes the circuits and extracts the) 60.94 105.72 P 0.82 (real \050elmore\051 delay of each routed net. All of the delay results that we) 60.94 95.72 P (present in this paper are computed by VPR.) 60.94 85.72 T 2 9 Q -0.17 (within the cluster currently being pack) 317.76 714 P -0.17 (ed,) 455.55 714 P 1 F -0.17 (C) 468.38 714 P 2 F -0.17 (. If) 474.38 714 P 1 F -0.17 (B) 486.79 714 P 2 F -0.17 ( does not ha) 492.28 714 P -0.17 (v) 534.84 714 P -0.17 (e an) 539.2 714 P -0.17 (y) 553.64 714 P 0.2 (connections to) 317.76 704 P 1 F 0.2 (C) 372.65 704 P 2 F 0.2 (then the base criticality score is zero. In Figure) 381.1 704 P 0.2 (6) 553.64 704 P 1.41 (we illustrate ho) 317.76 694 P 1.41 (w the) 375.85 694 P 1 F 1.41 (Base_BLE_Criticality) 400.66 694 P 2 F 1.41 (v) 483.82 694 P 1.41 (alues are assigned.) 488.1 694 P 0.56 (W) 317.76 684 P 0.56 (e ha) 325.54 684 P 0.56 (v) 340.66 684 P 0.56 (e labelled each connection between unclustered BLEs and) 345.03 684 P 1.31 (BLEs within the cluster with a criticality v) 317.76 674 P 1.31 (alue. Notice ho) 479.95 674 P 1.31 (w the) 537.09 674 P -0.14 (base criticality of each BLE is assigned the highest criticality v) 317.76 664 P -0.14 (alue) 543.15 664 P (of all its connections to the cluster) 317.76 654 T (.) 440.76 654 T 0.33 (When selecting which BLE to absorb into a cluster there is a high) 317.76 639 P 0.02 (potential for multiple BLEs to ha) 317.76 629 P 0.02 (v) 436.93 629 P 0.02 (e the same base criticality v) 441.3 629 P 0.02 (alue.) 540.9 629 P -0.14 (W) 317.76 619 P -0.14 (e use a tie-break) 325.54 619 P -0.14 (er mechanism to select which BLEs are the most) 383.76 619 P 0.49 (bene\336cial to pack. This mechanism is based on the desire to pack) 317.76 609 P 2.75 (BLEs together in a manner that most ef) 317.76 599 P 2.75 (fecti) 478.52 599 P 2.75 (v) 494.29 599 P 2.75 (ely reduces the) 498.66 599 P 0.22 (number of BLEs remaining on the critical paths. This is best illus-) 317.76 589 P (trated by an e) 317.76 579 T (xample.) 366.36 579 T -0.14 (In Figure) 317.76 564 P -0.14 (7 we ha) 353.12 564 P -0.14 (v) 380.64 564 P -0.14 (e dark) 385.01 564 P -0.14 (ened connections and BLEs on the critical) 407.02 564 P 0.13 (paths. Notice that when selecting which BLEs to place into a clus-) 317.76 554 P 0.41 (ter) 317.76 544 P 0.41 (, it is more bene\336cial to absorb certain critical BLEs o) 326.9 544 P 0.41 (v) 525.62 544 P 0.41 (er other) 529.99 544 P 0.83 (critical BLEs. In this case, absorbing BLEs H, I, and J w) 317.76 534 P 0.83 (ould be) 530.56 534 P 0.85 (much more bene\336cial than absorbing BLEs A, D, and F) 317.76 524 P 0.85 (. W) 525.43 524 P 0.85 (e can) 538.55 524 P 0.42 (see that absorbing H, I, and J af) 317.76 514 P 0.42 (fects the criticality of se) 434.18 514 P 0.42 (v) 522.11 514 P 0.42 (en BLEs) 526.48 514 P 0.08 (\050A, B, C, D, E, F) 317.76 504 P 0.08 (, and G\051, while absorbing A, D, and F w) 378.45 504 P 0.08 (ould only) 523.81 504 P -0.04 (af) 317.76 494 P -0.04 (fect the criticality of three BLEs \050H, I, and J\051. Clearly it is best to) 324.53 494 P (cluster BLEs that reduce the criticalities of the most other BLEs.) 317.76 484 T 0.43 (W) 317.76 469 P 0.43 (e de\336ne three v) 325.54 469 P 0.43 (ariables that k) 381.84 469 P 0.43 (eep track of the number of critical) 433.1 469 P 3.59 (paths that each BLE in the circuit ef) 317.76 459 P 3.59 (fects. First we de\336ne) 472.39 459 P 1 F 3.12 (input_paths_af) 317.76 449 P 3.12 (fected) 371.61 449 P 2 F 3.12 (as) 398.47 449 P 3.12 (the number of critical paths between) 411.33 449 P 0.83 (sources in the circuit and the BLE currently being labelled. Ne) 317.76 439 P 0.83 (xt) 551.14 439 P 1.57 (we de\336ne) 317.76 429 P 1 F 1.57 (output_paths_af) 357.9 429 P 1.57 (fected) 416.24 429 P 2 F 1.57 (as the number of critical paths) 441.56 429 P 2.39 (between the sinks in the circuit and the BLE currently being) 317.76 419 P 0.49 (labelled. Finally) 317.76 409 P 0.49 (, we de\336ne) 376.17 409 P 1 F 0.49 (total_paths_af) 419.12 409 P 0.49 (fected) 470.97 409 P 2 F 0.49 ( as the sum of the) 492.46 409 P 3.24 (pre) 317.76 399 P 3.24 (vious tw) 329.03 399 P 3.24 (o v) 362.94 399 P 3.24 (ariables. The calculation of these v) 377.2 399 P 3.24 (ariables is) 518.66 399 P (e) 317.76 389 T (xplained belo) 321.62 389 T (w) 370.14 389 T (.) 376.06 389 T 0.72 (The BLE labels in Figure) 317.76 374 P 0.72 (7 demonstrate the) 414.4 374 P 1 F 0.72 (input_paths_af) 482.8 374 P 0.72 (fected) 536.65 374 P 2 F 0.36 (v) 317.76 364 P 0.36 (alue for each BLE. W) 322.04 364 P 0.36 (e assign an) 401.47 364 P 0.36 (y sources that are on the critical) 441.54 364 P 2.09 (paths with an) 317.76 354 P 1 F 2.09 (input_paths_af) 374.27 354 P 2.09 (fected) 428.12 354 P 2 F 2.09 ( v) 449.61 354 P 2.09 (alue of one, and all other) 458.23 354 P -0.11 (sources are set to zero. Then we perform a breadth-\336rst tra) 317.76 344 P -0.11 (v) 527.15 344 P -0.11 (ersal of) 531.51 344 P 8.58 (the circuit starting at the sources, and de\336ne the) 317.76 334 P 1 F (input_paths_af) 317.76 324 T (fected) 371.61 324 T 2 F ( v) 393.1 324 T (alue as in \0501.4\051.) 399.63 324 T 53.86 81.06 294.24 720 C 95.15 653.3 235.7 667.7 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q 0 X 0 0 0 1 0 0 0 K (s) 96.15 659.95 T (l) 100.18 659.95 T (a) 103.21 659.95 T (c) 108.24 659.95 T (k) 112.77 659.95 T (i) 121.08 659.95 T 3 F (\050) 117.45 659.95 T (\051) 124.22 659.95 T 1 F (T) 141.28 659.95 T 1 7 Q (r) 147.32 657.05 T (e) 150.58 657.05 T (q) 154.23 657.05 T (u) 158.27 657.05 T (i) 162.3 657.05 T (r) 164.79 657.05 T (e) 168.05 657.05 T (d) 171.7 657.05 T 1 9 Q (i) 179.55 659.95 T 3 F (\050) 175.91 659.95 T (\051) 182.69 659.95 T 1 F (T) 194.68 659.95 T 1 7 Q (a) 200.72 657.05 T (r) 204.76 657.05 T (r) 208.02 657.05 T (i) 211.28 657.05 T (v) 213.76 657.05 T (a) 217.41 657.05 T (l) 221.45 657.05 T 1 9 Q (i) 227.57 659.95 T 3 F (\050) 223.93 659.95 T (\051) 230.71 659.95 T 2 F (\320) 187.93 659.95 T (=) 131.71 659.95 T 53.86 81.06 294.24 720 C 0 0 612 792 C 53.86 81.06 294.24 720 C 77.99 596.28 252.86 619.3 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q 0 X 0 0 0 1 0 0 0 K (C) 78.99 606.55 T (o) 85.52 606.55 T (n) 90.55 606.55 T (n) 95.58 606.55 T (e) 100.61 606.55 T (c) 105.14 606.55 T (t) 109.66 606.55 T (i) 112.7 606.55 T (o) 115.73 606.55 T (n) 120.76 606.55 T 2 F (_) 125.79 606.55 T 1 F (C) 130.82 606.55 T (r) 137.35 606.55 T (i) 141.38 606.55 T (t) 144.42 606.55 T (i) 147.45 606.55 T (c) 150.48 606.55 T (a) 155.01 606.55 T (l) 160.04 606.55 T (i) 163.07 606.55 T (t) 166.1 606.55 T (y) 169.13 606.55 T (i) 177.29 606.55 T 3 F (\050) 173.66 606.55 T (\051) 180.43 606.55 T 2 F (1) 197.5 606.55 T 1 F (s) 215.39 611.55 T (l) 219.42 611.55 T (a) 222.45 611.55 T (c) 227.48 611.55 T (k) 232.01 611.55 T (i) 240.32 611.55 T 3 F (\050) 236.69 611.55 T (\051) 243.46 611.55 T 1 F (M) 211.33 600.53 T (a) 219.36 600.53 T (x) 224.39 600.53 T (S) 228.91 600.53 T (l) 233.95 600.53 T (a) 236.98 600.53 T (c) 242.01 600.53 T (k) 246.53 600.53 T 2 F (-) 211.17 606.55 T (-) 212.67 606.55 T (-) 214.17 606.55 T (-) 215.66 606.55 T (-) 217.16 606.55 T (-) 218.66 606.55 T (-) 220.16 606.55 T (-) 221.66 606.55 T (-) 223.16 606.55 T (-) 224.66 606.55 T (-) 226.15 606.55 T (-) 227.65 606.55 T (-) 229.15 606.55 T (-) 230.65 606.55 T (-) 232.15 606.55 T (-) 233.65 606.55 T (-) 235.15 606.55 T (-) 236.64 606.55 T (-) 238.14 606.55 T (-) 239.64 606.55 T (-) 241.14 606.55 T (-) 242.64 606.55 T (-) 244.14 606.55 T (-) 245.63 606.55 T (-) 247.13 606.55 T (-) 247.69 606.55 T (\320) 204.24 606.55 T (=) 187.93 606.55 T 53.86 81.06 294.24 720 C 0 0 612 792 C 53.86 81.06 294.24 720 C 53.86 155.23 294.24 295.28 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 127.86 204.28 215 269.99 R 7 X 0 0 0 1 0 0 0 K V 0.5 H 2 Z 0 X N 4 9 Q (Figure 6. BLE Base Criticality Assignment) 92.15 177.72 T 84.3 208.3 113.25 227.36 R 7 X V 0 X N 2 F (BLE) 90.14 218.42 T 178.16 213.73 207.1 232.79 R 7 X V 0 X N (BLE) 184 220.99 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 138.3 245.01 167.25 264.08 R 7 X V 0 X N (BLE) 144.14 252.28 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 231.59 248.16 260.53 267.22 R 7 X V 0 X N (BLE) 237.43 258.99 T 167.14 252.85 177.86 252.85 177.86 241.42 160 241.42 160 227.85 177.86 227.85 6 L N 207.14 223.56 225 223.56 225 257.14 231.43 257.14 4 L N 260.71 257.14 271.43 257.14 271.43 230.71 281.43 230.71 4 L N 83.29 212.42 69 212.42 2 L N 113.57 217.13 177.86 217.13 2 L N 90 450 1.07 1.07 113.57 217.35 G 90 450 1.07 1.07 113.57 217.35 A (Cluster) 157.86 195.71 T (,) 183.5 195.71 T 1 F (C) 188 195.71 T 90 450 1.07 1.07 178.07 216.99 G 90 450 1.07 1.07 178.07 216.99 A 90 450 1.07 1.07 177.97 227.78 G 90 450 1.07 1.07 177.97 227.78 A 90 450 1.07 1.07 206.86 223.35 G 90 450 1.07 1.07 206.86 223.35 A 90 450 1.07 1.07 138.21 251.78 G 90 450 1.07 1.07 138.21 251.78 A 90 450 1.07 1.07 138.36 258.06 G 90 450 1.07 1.07 138.36 258.06 A 90 450 1.07 1.07 231.36 257.21 G 90 450 1.07 1.07 231.36 257.21 A 90 450 1.07 1.07 260.5 257.06 G 90 450 1.07 1.07 260.5 257.06 A 90 450 1.07 1.07 84 218.38 G 90 450 1.07 1.07 84 218.38 A 90 450 1.07 1.07 83.89 212.56 G 90 450 1.07 1.07 83.89 212.56 A 83.43 218.21 69.14 218.21 2 L N 83.57 223.56 69.29 223.56 2 L N 90 450 1.07 1.07 84.04 223.35 G 90 450 1.07 1.07 84.04 223.35 A 138.57 257.85 67.86 257.85 2 L N 167.14 261.42 231.43 261.42 2 L N 90 450 1.07 1.07 231.14 261.46 G 90 450 1.07 1.07 231.14 261.46 A 90 450 1.07 1.07 167.5 252.49 G 90 450 1.07 1.07 167.5 252.49 A 90 450 1.07 1.07 167.39 261.42 G 90 450 1.07 1.07 167.39 261.42 A 2 7 Q (0.95) 228.57 229.99 T (0.75) 194.29 254.28 T (0.65) 103.57 238.56 T (0.97) 147.14 209.99 T (Base BLE) 74.4 199.71 T 138.57 251.42 117.14 251.42 117.14 217.13 3 L N (Base BLE) 228.13 277.81 T (Criticality=0.97) 74.4 192.71 T (Criticality=0.95) 228.13 270.81 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 53.86 81.06 294.24 720 C 0 0 612 792 C 317.76 81.06 558.14 720 C 317.76 81.06 558.14 291.44 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 9 Q 0 X 0 0 0 1 0 0 0 K (Figure 7. Criticality Tie-Breakers) 374.46 94.04 T 356.68 160.1 371.68 186.53 R 3 H 2 Z N 503.68 247.82 518.68 274.24 R N 504.25 145.53 519.25 171.96 R 0.5 H N 419.82 177.53 434.82 203.96 R 3 H N 478.97 227.39 493.97 253.82 R N 388.82 145.82 403.82 172.24 R N 419.39 217.1 434.39 243.53 R N 356.39 241.24 371.39 267.67 R N 356.39 201.24 371.39 227.67 R 0.5 H N 357.68 120.39 372.68 146.82 R 3 H N 447.39 195.82 462.39 222.24 R N 390.68 241.39 405.68 267.82 R N 480.68 114.81 495.68 141.24 R 0.5 H N 479.82 177.53 494.82 203.96 R N 371.75 256.1 390.75 256.1 2 L 3 H 0 Z N 407.25 256.35 412.75 256.35 412.75 232.6 419.5 232.6 4 L N 436 232.35 441.25 232.35 441.25 210.35 447.75 210.35 4 L N 464 211.35 471.62 211.35 471.62 238.85 478.54 238.85 4 L N 494.08 242.35 499.6 242.35 499.6 263.1 504.43 263.1 4 L N 373.25 175.1 380.5 175.1 380.5 162.35 387.75 162.35 4 L N 405.25 160.6 413.25 160.6 413.25 182.6 419 182.6 4 L N 436.25 191.35 441.25 191.35 441.25 202.35 446.25 202.35 4 L N 443 191.6 480 191.6 2 L 0.5 H N 441.25 190.35 441.25 182.35 471 182.35 471 136.35 481 136.35 5 L N 372.75 134.1 465.25 134.1 465.25 127.35 481 127.35 4 L N 495.75 128.85 500 128.85 500 151.85 504 151.85 4 L N 495 191.35 499.5 191.35 499.5 166.85 504.25 166.85 4 L N 371.75 215.35 400 215.35 400 198.35 419 198.35 4 L N 413.75 257.1 469.5 257.1 469.5 247.85 478 247.85 4 L N 413.75 257.1 413.75 267.85 503.5 267.85 3 L N 371.68 134.39 380.25 134.39 380.25 152.24 388.82 152.24 4 L 3 H N 4 10 Q (1) 361.68 169.93 T (1) 362.68 130.22 T (2) 393.82 155.65 T (2) 424.82 187.36 T (3) 452.39 205.65 T (3) 483.97 237.22 T (3) 508.68 257.65 T (1) 361.39 251.08 T (1) 395.68 251.22 T (1) 424.39 226.93 T (J) 507.66 278.94 T (I) 481.95 257.42 T (H) 449.98 225.37 T (F) 423.38 248.14 T (G) 423.8 207.29 T (D) 395.34 272.42 T (E) 393.29 177.51 T (A) 359.27 271.35 T (B) 362.39 189.74 T (C) 362.48 150.55 T (Sour) 322.71 191.69 T (ces) 343.1 191.69 T (Sinks) 522.68 191.69 T 317.76 81.06 558.14 720 C 0 0 612 792 C 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "5" 5 %%Page: "6" 6 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 4 9 Q 0 X 0 0 0 1 0 0 0 K (\0501.4\051) 276.99 710.1 T 2 F 1.38 (Where) 53.86 668.77 P 1 F 1.38 (critical inputs\050B\051) 81.47 668.77 P 2 F 1.38 ( refers to the BLEs dri) 144.6 668.77 P 1.38 (ving the connec-) 231.5 668.77 P (tions on) 53.86 658.77 T 1 F (B\325) 84.86 658.77 T 2 F (s inputs that are on the critical path.) 92.86 658.77 T 0.29 (The) 53.86 643.77 P 1 F 0.29 (output_paths_af) 70.39 643.77 P 0.29 (fected) 128.74 643.77 P 2 F 0.29 ( v) 150.23 643.77 P 0.29 (ariable is calculated in the same man-) 157.04 643.77 P (ner) 53.86 633.77 T (, b) 64.99 633.77 T (ut it starts at outputs and w) 73.81 633.77 T (orks back to) 170.72 633.77 T (w) 214.49 633.77 T (ards the inputs.) 220.9 633.77 T 4 F (\0501.5\051) 276.99 610.86 T 2 F (W) 53.86 569.53 T (e de\336ne) 61.63 569.53 T 1 F (total_paths_af) 92.13 569.53 T (fected) 143.98 569.53 T 2 F ( as) 165.47 569.53 T 4 F (\0501.6\051) 276.99 548.78 T 1 F (Criticality\050B\051) 53.86 525.53 T 2 F ( is de\336ned as.) 102.36 525.53 T 4 F (\0501.7\051) 276.99 504.78 T 2 F 6.1 (where) 53.86 480.86 P 3 10 Q 6.77 (e) 84.19 480.86 P 2 9 Q 6.1 (is a v) 97.85 480.86 P 6.1 (ery small v) 128.91 480.86 P 6.1 (alue that ensures that the) 180.87 480.86 P (total_paths_af) 53.86 470.53 T (fected v) 104.63 470.53 T (alue acts only as a tie-breaking mechanism.) 133.14 470.53 T (Finally) 53.86 455.53 T (, we de\336ne our ne) 78.78 455.53 T (w attraction function as follo) 142.79 455.53 T (ws:) 246.55 455.53 T 4 F (\0501.8\051) 276.99 429.58 T 2 F 1.07 (Where) 53.86 389.48 P 1 F 1.07 (G) 81.16 389.48 P 2 F 1.07 ( is a normalization f) 87.66 389.48 P 1.07 (actor which is set to the maximum) 163.83 389.48 P (number of nets to which an) 53.86 379.48 T (y a BLE can connect, i.e.) 151.96 379.48 T 4 F (\0501.9\051) 276.99 358.73 T 2 F 0.46 (In \0501.8\051,) 53.86 342.82 P 3 10 Q 0.51 (a) 86.27 342.82 P 2 9 Q 0.46 ( is a trade-of) 92.58 342.82 P 0.46 (f v) 138.96 342.82 P 0.46 (ariable which determines ho) 148.95 342.82 P 0.46 (w much we) 251.83 342.82 P 0.69 (wish the attraction to be af) 53.86 332.48 P 0.69 (fected by criticality vs. input pin shar-) 152.84 332.48 P 0.09 (ing. If we set) 53.86 321.82 P 3 10 Q 0.09 (a) 103.43 321.82 P 2 9 Q 0.09 ( to 0 then we ha) 109.75 321.82 P 0.09 (v) 167.23 321.82 P 0.09 (e a purely pin-sharing based algo-) 171.59 321.82 P 0.83 (rithm, and the program functions the same as the original VP) 53.86 311.48 P 0.83 (ack) 281.74 311.48 P 0.22 (algorithm. If we set) 53.86 300.82 P 3 10 Q 0.25 (a) 127.5 300.82 P 2 9 Q 0.22 ( to 1 then we ha) 133.8 300.82 P 0.22 (v) 191.99 300.82 P 0.22 (e an algorithm that focuses) 196.35 300.82 P 2.49 (only on minimizing the critical path with no concern for the) 53.86 290.48 P 0.88 (number of inputs shared. W) 53.86 280.48 P 0.88 (e e) 156.88 280.48 P 0.88 (xperimentally determined that set-) 167.87 280.48 P (ting) 53.86 269.82 T 3 10 Q (a) 70.11 269.82 T 2 9 Q ( to a v) 76.42 269.82 T (alue of 0.75 results in clusterings with the least delay) 98.44 269.82 T (.) 288.84 269.82 T 1.52 (The time comple) 53.86 252.09 P 1.52 (xity of this algorithm is O\050n) 117.75 252.09 P 2 7.2 Q 1.21 (2) 226.09 255.68 P 2 9 Q 1.52 (\051 \050where n is the) 229.69 252.09 P 0.4 (number of BLEs in the circuit\051 which results in an e) 53.86 242.09 P 0.4 (x) 244.72 242.09 P 0.4 (ecution time) 249.09 242.09 P 0.71 (of about tw) 53.86 232.09 P 0.71 (o minutes) 96.19 232.09 P 2 7.2 Q 0.57 (1) 132.16 235.68 P 2 9 Q 0.71 ( to pack the lar) 135.76 232.09 P 0.71 (gest circuit \050clma\051 on a 296) 191.94 232.09 P (MHz UltraSP) 53.86 222.09 T (ARC-II processor) 102.28 222.09 T (.) 166.02 222.09 T 0 10 Q (7. Area and Dela) 53.86 205.42 T (y at V) 134.25 205.42 T (arious Cluster Siz) 160.33 205.42 T (es) 244.9 205.42 T 2 9 Q -0.2 (This section sho) 53.86 191.09 P -0.2 (ws the ef) 111.74 191.09 P -0.2 (fect of v) 143.6 191.09 P -0.2 (arying cluster size on the area and) 172.97 191.09 P 0.07 (delay of the benchmarks. This in) 53.86 181.09 P 0.07 (v) 171.81 181.09 P 0.07 (olv) 176.13 181.09 P 0.07 (es packing, placing, and rout-) 187.49 181.09 P -0.09 (ing the benchmark circuits and comparing the resulting FPGA area) 53.86 171.09 P 1.18 (and critical path delay) 53.86 161.09 P 1.18 (. The results that we present are based on) 136.55 161.09 P (lo) 53.86 151.09 T (w-stress routings \050described in Section) 60.63 151.09 T (3.1\051.) 202.37 151.09 T 53.86 133.61 294.24 147.78 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 62.36 145.8 204.09 145.8 2 L 0.5 H 2 Z 0 X 0 0 0 1 0 0 0 K N 0 0 612 792 C 2 6.4 Q 0 X 0 0 0 1 0 0 0 K (1) 53.86 131.48 T 2 8 Q -0.32 (There is an option in T-VPack which allows the user to specify how many) 60.94 128.28 P 0.55 (blocks, P, to pack before re-computing the timing information. This re-) 60.94 118.28 P 0.31 (duces the time complexity to O\050n) 60.94 108.28 P 2 6.4 Q 0.25 (2) 169.4 111.48 P 2 8 Q 0.31 (/P\051. We have found that performing a) 172.6 108.28 P 0.22 (timing analysis only once at the beginning \050set P=n\051 does not reduce the) 60.94 98.28 P 0.32 (quality of the placed and routed circuits. This reduces the complexity to) 60.94 88.28 P (O\050k) 60.94 78.28 T 2 6.4 Q (max) 73.39 76.28 T 3 10 Q (\327) 84.41 78.28 T 2 8 Q (n\051, and requires only a few seconds to pack the largest circuit.) 86.91 78.28 T 0 9 Q (7.1) 317.76 714 T (Cluster Siz) 339.36 714 T (e Comparison using both VP) 385.97 714 T (ac) 508.72 714 T (k and T) 518.54 714 T (-) 548.97 714 T (VP) 339.36 704 T (ac) 351.1 704 T (k) 360.93 704 T 2 F 1.05 (In this section we present results from circuits pack) 317.76 691 P 1.05 (ed with both) 511.04 691 P 0.62 (VP) 317.76 681 P 0.62 (ack and T) 329.13 681 P 0.62 (-VP) 365.03 681 P 0.62 (ack. W) 379.39 681 P 0.62 (e demonstrate that the T) 404.78 681 P 0.62 (-VP) 493.42 681 P 0.62 (ack algorithm) 507.78 681 P 1.5 (is superior to the VP) 317.76 671 P 1.5 (ack algorithm, and we sho) 397.63 671 P 1.5 (w the ef) 498.14 671 P 1.5 (fects of) 529.9 671 P (increased cluster size on area and delay) 317.76 661 T (.) 459.13 661 T 53.86 73.61 294.24 720 C 71.09 679.77 259.76 720 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q 0 X 0 0 0 1 0 0 0 K (i) 72.09 710.1 T (n) 75.12 710.1 T (p) 80.15 710.1 T (u) 85.18 710.1 T (t) 90.22 710.1 T 2 F (_) 93.41 710.1 T 1 F (p) 99.11 710.1 T (a) 104.14 710.1 T (t) 109.18 710.1 T (h) 112.21 710.1 T (s) 117.24 710.1 T 2 F (_) 121.27 710.1 T 1 F (a) 126.3 710.1 T (f) 131.33 710.1 T (f) 134.36 710.1 T (e) 137.39 710.1 T (c) 141.92 710.1 T (t) 146.45 710.1 T (e) 149.48 710.1 T (d) 154.01 710.1 T (B) 162.99 710.1 T 3 F (\050) 159.28 710.1 T (\051) 169.12 710.1 T 1 F (i) 148.73 690.98 T (n) 151.76 690.98 T (p) 156.79 690.98 T (u) 161.82 690.98 T (t) 166.85 690.98 T 2 F (_) 170.05 690.98 T 1 F (p) 175.75 690.98 T (a) 180.78 690.98 T (t) 185.82 690.98 T (h) 188.85 690.98 T (s) 193.88 690.98 T 2 F (_) 197.91 690.98 T 1 F (a) 202.94 690.98 T (f) 207.97 690.98 T (f) 211 690.98 T (e) 214.03 690.98 T (c) 218.56 690.98 T (t) 223.09 690.98 T (e) 226.12 690.98 T (d) 230.64 690.98 T (D) 239.62 690.98 T 3 F (\050) 235.92 690.98 T (\051) 246.76 690.98 T 1 7 Q (D) 77.14 681.62 T (c) 90.68 681.62 T (r) 94.32 681.62 T (i) 97.59 681.62 T (t) 100.07 681.62 T (i) 102.55 681.62 T (c) 105.04 681.62 T (a) 108.68 681.62 T (l) 112.72 681.62 T (i) 117.5 681.62 T (n) 119.99 681.62 T (p) 124.02 681.62 T (u) 128.06 681.62 T (t) 132.1 681.62 T (s) 134.58 681.62 T (B) 140.73 681.62 T 3 F (\050) 137.85 681.62 T (\051) 145.5 681.62 T (\316) 83.94 681.62 T (") 72.09 681.62 T 3 12 Q (\345) 105.68 689.06 T 2 9 Q (=) 176.61 710.1 T 53.86 73.61 294.24 720 C 0 0 612 792 C 53.86 73.61 294.24 720 C 66.56 580.53 264.29 620.77 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q 0 X 0 0 0 1 0 0 0 K (o) 67.56 610.86 T (u) 72.59 610.86 T (t) 77.62 610.86 T (p) 80.65 610.86 T (u) 85.68 610.86 T (t) 90.71 610.86 T 2 F (_) 93.91 610.86 T 1 F (p) 99.61 610.86 T (a) 104.64 610.86 T (t) 109.67 610.86 T (h) 112.7 610.86 T (s) 117.73 610.86 T 2 F (_) 121.76 610.86 T 1 F (a) 126.8 610.86 T (f) 131.83 610.86 T (f) 134.86 610.86 T (e) 137.89 610.86 T (c) 142.42 610.86 T (t) 146.94 610.86 T (e) 149.98 610.86 T (d) 154.5 610.86 T (B) 163.48 610.86 T 3 F (\050) 159.77 610.86 T (\051) 169.62 610.86 T 1 F (o) 148.24 591.75 T (u) 153.27 591.75 T (t) 158.3 591.75 T (p) 161.33 591.75 T (u) 166.36 591.75 T (t) 171.39 591.75 T 2 F (_) 174.58 591.75 T 1 F (p) 180.29 591.75 T (a) 185.32 591.75 T (t) 190.35 591.75 T (h) 193.38 591.75 T (s) 198.41 591.75 T 2 F (_) 202.44 591.75 T 1 F (a) 207.47 591.75 T (f) 212.5 591.75 T (f) 215.54 591.75 T (e) 218.57 591.75 T (c) 223.09 591.75 T (t) 227.62 591.75 T (e) 230.65 591.75 T (d) 235.18 591.75 T (D) 244.16 591.75 T 3 F (\050) 240.45 591.75 T (\051) 251.29 591.75 T 1 7 Q (D) 72.61 582.38 T (c) 86.14 582.38 T (r) 89.79 582.38 T (i) 93.05 582.38 T (t) 95.54 582.38 T (i) 98.02 582.38 T (c) 100.5 582.38 T (a) 104.15 582.38 T (l) 108.19 582.38 T (o) 112.97 582.38 T (u) 117.01 582.38 T (t) 121.04 582.38 T (p) 123.53 582.38 T (u) 127.57 582.38 T (t) 131.6 582.38 T (s) 134.09 582.38 T (B) 140.23 582.38 T 3 F (\050) 137.35 582.38 T (\051) 145.01 582.38 T (\316) 79.41 582.38 T (") 67.56 582.38 T 3 12 Q (\345) 103.17 589.83 T 2 9 Q (=) 177.11 610.86 T 53.86 73.61 294.24 720 C 0 0 612 792 C 53.86 73.61 294.24 720 C 53.86 536.53 279.51 556.53 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q 0 X 0 0 0 1 0 0 0 K (t) 54.86 548.78 T (o) 57.89 548.78 T (t) 62.92 548.78 T (a) 65.95 548.78 T (l) 70.98 548.78 T 2 F (_) 74.02 548.78 T 1 F (p) 79.73 548.78 T (a) 84.76 548.78 T (t) 89.79 548.78 T (h) 92.82 548.78 T (s) 97.85 548.78 T 2 F (_) 101.88 548.78 T 1 F (a) 106.91 548.78 T (f) 111.94 548.78 T (f) 114.98 548.78 T (e) 118.01 548.78 T (c) 122.54 548.78 T (t) 127.06 548.78 T (e) 130.09 548.78 T (d) 134.62 548.78 T (B) 143.6 548.78 T 3 F (\050) 139.89 548.78 T (\051) 149.74 548.78 T 1 F (i) 54.86 539.78 T (n) 57.89 539.78 T (p) 62.92 539.78 T (u) 67.95 539.78 T (t) 72.98 539.78 T 2 F (_) 76.18 539.78 T 1 F (p) 81.88 539.78 T (a) 86.91 539.78 T (t) 91.94 539.78 T (h) 94.97 539.78 T (s) 100 539.78 T 2 F (_) 104.04 539.78 T 1 F (a) 109.07 539.78 T (f) 114.1 539.78 T (f) 117.13 539.78 T (e) 120.16 539.78 T (c) 124.69 539.78 T (t) 129.21 539.78 T (e) 132.24 539.78 T (d) 136.77 539.78 T (B) 145.75 539.78 T 3 F (\050) 142.04 539.78 T (\051) 151.89 539.78 T 1 F (o) 164.46 539.78 T (u) 169.49 539.78 T (t) 174.52 539.78 T (p) 177.55 539.78 T (u) 182.58 539.78 T (t) 187.61 539.78 T 2 F (_) 190.8 539.78 T 1 F (p) 196.51 539.78 T (a) 201.54 539.78 T (t) 206.57 539.78 T (h) 209.6 539.78 T (s) 214.63 539.78 T 2 F (_) 218.66 539.78 T 1 F (a) 223.69 539.78 T (f) 228.72 539.78 T (f) 231.76 539.78 T (e) 234.79 539.78 T (c) 239.31 539.78 T (t) 243.84 539.78 T (e) 246.87 539.78 T (d) 251.4 539.78 T (B) 260.38 539.78 T 3 F (\050) 256.67 539.78 T (\051) 266.52 539.78 T 2 F (+) 157.13 539.78 T (=) 157.23 548.78 T 53.86 73.61 294.24 720 C 0 0 612 792 C 53.86 73.61 294.24 720 C 68.62 492.53 262.23 512.53 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q 0 X 0 0 0 1 0 0 0 K (C) 69.62 504.78 T (r) 76.15 504.78 T (i) 80.18 504.78 T (t) 83.21 504.78 T (i) 86.25 504.78 T (c) 89.28 504.78 T (a) 93.8 504.78 T (l) 98.83 504.78 T (i) 101.87 504.78 T (t) 104.9 504.78 T (y) 107.93 504.78 T (B) 116.16 504.78 T 3 F (\050) 112.46 504.78 T (\051) 122.3 504.78 T 1 F (B) 139.43 504.78 T (a) 145.46 504.78 T (s) 150.49 504.78 T (e) 154.52 504.78 T 2 F (_) 159.05 504.78 T 1 F (B) 164.15 504.78 T (L) 170.18 504.78 T (E) 175.72 504.78 T 2 F (_) 181.95 504.78 T 1 F (C) 186.98 504.78 T (r) 193.52 504.78 T (i) 197.55 504.78 T (t) 200.58 504.78 T (i) 203.61 504.78 T (c) 206.64 504.78 T (a) 211.17 504.78 T (l) 216.2 504.78 T (i) 219.23 504.78 T (t) 222.26 504.78 T (y) 225.3 504.78 T (B) 233.53 504.78 T 3 F (\050) 229.82 504.78 T (\051) 239.67 504.78 T (e) 73.25 495.78 T 1 F (t) 83.95 495.78 T (o) 86.98 495.78 T (t) 92.01 495.78 T (a) 95.04 495.78 T (l) 100.07 495.78 T 2 F (_) 103.11 495.78 T 1 F (p) 108.82 495.78 T (a) 113.85 495.78 T (t) 118.88 495.78 T (h) 121.91 495.78 T (s) 126.94 495.78 T 2 F (_) 130.97 495.78 T 1 F (a) 136 495.78 T (f) 141.03 495.78 T (f) 144.06 495.78 T (e) 147.1 495.78 T (c) 151.62 495.78 T (t) 156.15 495.78 T (e) 159.18 495.78 T (d) 163.71 495.78 T (B) 172.69 495.78 T 3 F (\050) 168.98 495.78 T (\051) 178.82 495.78 T (\327) 79.45 495.78 T (\050) 69.62 495.78 T (\051) 182.46 495.78 T 2 F (+) 244.91 504.78 T (=) 129.79 504.78 T 53.86 73.61 294.24 720 C 0 0 612 792 C 53.86 73.61 294.24 720 C 88 400.48 242.85 442.53 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q 0 X 0 0 0 1 0 0 0 K (A) 89.46 429.58 T (t) 95.49 429.58 T (t) 98.52 429.58 T (r) 101.56 429.58 T (a) 105.59 429.58 T (c) 110.62 429.58 T (t) 115.14 429.58 T (i) 118.18 429.58 T (o) 121.21 429.58 T (n) 126.24 429.58 T (B) 134.98 429.58 T 3 F (\050) 131.27 429.58 T (\051) 141.11 429.58 T (a) 155.17 429.58 T 2 F (=) 147.1 429.58 T 1 F (C) 167.6 429.58 T (r) 174.13 429.58 T (i) 178.16 429.58 T (t) 181.19 429.58 T (i) 184.22 429.58 T (c) 187.26 429.58 T (a) 191.78 429.58 T (l) 196.81 429.58 T (i) 199.85 429.58 T (t) 202.88 429.58 T (y) 205.91 429.58 T (B) 214.14 429.58 T 3 F (\050) 210.44 429.58 T (\051) 220.28 429.58 T (\327) 163.1 429.58 T 2 F (1) 92.64 409.55 T 3 F (a) 106.13 409.55 T 2 F (\320) 99.39 409.55 T 3 F (\050) 89 409.55 T (\051) 112.45 409.55 T 1 F (N) 124.75 414.76 T (e) 131.29 414.76 T (t) 135.81 414.76 T (s) 138.84 414.76 T (B) 146.58 414.76 T 3 F (\050) 142.88 414.76 T (\051) 152.72 414.76 T 1 F (N) 167.3 414.76 T (e) 173.84 414.76 T (t) 178.36 414.76 T (s) 181.39 414.76 T (C) 189.06 414.76 T 3 F (\050) 185.43 414.76 T (\051) 195.9 414.76 T (\307) 157.96 414.76 T 1 F (G) 158.49 403.73 T 2 F (-) 122.37 409.76 T (-) 123.87 409.76 T (-) 125.37 409.76 T (-) 126.87 409.76 T (-) 128.36 409.76 T (-) 129.86 409.76 T (-) 131.36 409.76 T (-) 132.86 409.76 T (-) 134.36 409.76 T (-) 135.86 409.76 T (-) 137.35 409.76 T (-) 138.85 409.76 T (-) 140.35 409.76 T (-) 141.85 409.76 T (-) 143.35 409.76 T (-) 144.85 409.76 T (-) 146.35 409.76 T (-) 147.85 409.76 T (-) 149.34 409.76 T (-) 150.84 409.76 T (-) 152.34 409.76 T (-) 153.84 409.76 T (-) 155.34 409.76 T (-) 156.84 409.76 T (-) 158.33 409.76 T (-) 159.83 409.76 T (-) 161.33 409.76 T (-) 162.83 409.76 T (-) 164.33 409.76 T (-) 165.83 409.76 T (-) 167.32 409.76 T (-) 168.82 409.76 T (-) 170.32 409.76 T (-) 171.82 409.76 T (-) 173.32 409.76 T (-) 174.82 409.76 T (-) 176.32 409.76 T (-) 177.81 409.76 T (-) 179.31 409.76 T (-) 180.81 409.76 T (-) 182.31 409.76 T (-) 183.81 409.76 T (-) 185.31 409.76 T (-) 186.8 409.76 T (-) 188.3 409.76 T (-) 189.8 409.76 T (-) 191.3 409.76 T (-) 192.8 409.76 T (-) 194.3 409.76 T (-) 195.8 409.76 T (-) 197.29 409.76 T (-) 198.1 409.76 T 3 F (\327) 117.69 409.55 T 2 F (+) 225.52 429.58 T 123.27 413.41 123.27 421.51 2 L 0.41 H 2 Z N 199.8 413.41 199.8 421.51 2 L N 53.86 73.61 294.24 720 C 0 0 612 792 C 53.86 73.61 294.24 720 C 72.44 354.48 258.41 366.48 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 1 9 Q 0 X 0 0 0 1 0 0 0 K (G) 73.44 358.73 T (#BLE inputs + #BLE outputs + #BLE Clocks) 94 358.73 T 2 F (=) 84.43 358.73 T 53.86 73.61 294.24 720 C 0 0 612 792 C 317.76 73.61 558.14 720 C 317.76 449.64 558.14 640.3 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 50 50 410 302 216 151.2 340.55 487.79 FMBEGINEPSF %%BeginDocument: %!PS-Adobe-2.0 EPSF-2.0 %%Title: PSDAT/OptArea.ps %%Creator: gnuplot 3.5 (pre 3.6) patchlevel beta 347 %%CreationDate: Mon Sep 28 13:45:12 1998 %%DocumentFonts: (atend) %%BoundingBox: 50 50 410 302 %%Orientation: Portrait %%EndComments /gnudict 120 dict def gnudict begin /Color false def /Solid false def /gnulinewidth 5.000 def /userlinewidth gnulinewidth def /vshift -80 def /dl {10 mul} def /hpt_ 31.5 def /vpt_ 31.5 def /hpt hpt_ def /vpt vpt_ def /M {moveto} bind def /L {lineto} bind def /R {rmoveto} bind def /V {rlineto} bind def /vpt2 vpt 2 mul def /hpt2 hpt 2 mul def /Lshow { currentpoint stroke M 0 vshift R show } def /Rshow { currentpoint stroke M dup stringwidth pop neg vshift R show } def /Cshow { currentpoint stroke M dup stringwidth pop -2 div vshift R show } def /UP { dup vpt_ mul /vpt exch def hpt_ mul /hpt exch def /hpt2 hpt 2 mul def /vpt2 vpt 2 mul def } def /DL { Color {setrgbcolor Solid {pop []} if 0 setdash } {pop pop pop Solid {pop []} if 0 setdash} ifelse } def /BL { stroke gnulinewidth 2 mul setlinewidth } def /AL { stroke gnulinewidth 2 div setlinewidth } def /UL { gnulinewidth mul /userlinewidth exch def } def /PL { stroke userlinewidth setlinewidth } def /LTb { BL [] 0 0 0 DL } def /LTa { AL [1 dl 2 dl] 0 setdash 0 0 0 setrgbcolor } def /LT0 { PL [] 1 0 0 DL } def /LT1 { PL [4 dl 2 dl] 0 1 0 DL } def /LT2 { PL [2 dl 3 dl] 0 0 1 DL } def /LT3 { PL [1 dl 1.5 dl] 1 0 1 DL } def /LT4 { PL [5 dl 2 dl 1 dl 2 dl] 0 1 1 DL } def /LT5 { PL [4 dl 3 dl 1 dl 3 dl] 1 1 0 DL } def /LT6 { PL [2 dl 2 dl 2 dl 4 dl] 0 0 0 DL } def /LT7 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 1 0.3 0 DL } def /LT8 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 0.5 0.5 0.5 DL } def /Pnt { stroke [] 0 setdash gsave 1 setlinecap M 0 0 V stroke grestore } def /Dia { stroke [] 0 setdash 2 copy vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke Pnt } def /Pls { stroke [] 0 setdash vpt sub M 0 vpt2 V currentpoint stroke M hpt neg vpt neg R hpt2 0 V stroke } def /Box { stroke [] 0 setdash 2 copy exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke Pnt } def /Crs { stroke [] 0 setdash exch hpt sub exch vpt add M hpt2 vpt2 neg V currentpoint stroke M hpt2 neg 0 R hpt2 vpt2 V stroke } def /TriU { stroke [] 0 setdash 2 copy vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke Pnt } def /Star { 2 copy Pls Crs } def /BoxF { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath fill } def /TriUF { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath fill } def /TriD { stroke [] 0 setdash 2 copy vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke Pnt } def /TriDF { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath fill} def /DiaF { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath fill } def /Pent { stroke [] 0 setdash 2 copy gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore Pnt } def /PentF { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath fill grestore } def /Circle { stroke [] 0 setdash 2 copy hpt 0 360 arc stroke Pnt } def /CircleF { stroke [] 0 setdash hpt 0 360 arc fill } def /C0 { BL [] 0 setdash 2 copy moveto vpt 90 450 arc } bind def /C1 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill vpt 0 360 arc closepath } bind def /C2 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C3 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill vpt 0 360 arc closepath } bind def /C4 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc closepath } bind def /C5 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc } bind def /C6 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 270 arc closepath fill vpt 0 360 arc closepath } bind def /C7 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 270 arc closepath fill vpt 0 360 arc closepath } bind def /C8 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C9 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 450 arc closepath fill vpt 0 360 arc closepath } bind def /C10 { BL [] 0 setdash 2 copy 2 copy moveto vpt 270 360 arc closepath fill 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C11 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C12 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C13 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C14 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 360 arc closepath fill vpt 0 360 arc } bind def /C15 { BL [] 0 setdash 2 copy vpt 0 360 arc closepath fill vpt 0 360 arc closepath } bind def /Rec { newpath 4 2 roll moveto 1 index 0 rlineto 0 exch rlineto neg 0 rlineto closepath } bind def /Square { dup Rec } bind def /Bsquare { vpt sub exch vpt sub exch vpt2 Square } bind def /S0 { BL [] 0 setdash 2 copy moveto 0 vpt rlineto BL Bsquare } bind def /S1 { BL [] 0 setdash 2 copy vpt Square fill Bsquare } bind def /S2 { BL [] 0 setdash 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S3 { BL [] 0 setdash 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S4 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S5 { BL [] 0 setdash 2 copy 2 copy vpt Square fill exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S6 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill Bsquare } bind def /S7 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill 2 copy vpt Square fill Bsquare } bind def /S8 { BL [] 0 setdash 2 copy vpt sub vpt Square fill Bsquare } bind def /S9 { BL [] 0 setdash 2 copy vpt sub vpt vpt2 Rec fill Bsquare } bind def /S10 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S11 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S12 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill Bsquare } bind def /S13 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy vpt Square fill Bsquare } bind def /S14 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S15 { BL [] 0 setdash 2 copy Bsquare fill Bsquare } bind def /D0 { gsave translate 45 rotate 0 0 S0 stroke grestore } bind def /D1 { gsave translate 45 rotate 0 0 S1 stroke grestore } bind def /D2 { gsave translate 45 rotate 0 0 S2 stroke grestore } bind def /D3 { gsave translate 45 rotate 0 0 S3 stroke grestore } bind def /D4 { gsave translate 45 rotate 0 0 S4 stroke grestore } bind def /D5 { gsave translate 45 rotate 0 0 S5 stroke grestore } bind def /D6 { gsave translate 45 rotate 0 0 S6 stroke grestore } bind def /D7 { gsave translate 45 rotate 0 0 S7 stroke grestore } bind def /D8 { gsave translate 45 rotate 0 0 S8 stroke grestore } bind def /D9 { gsave translate 45 rotate 0 0 S9 stroke grestore } bind def /D10 { gsave translate 45 rotate 0 0 S10 stroke grestore } bind def /D11 { gsave translate 45 rotate 0 0 S11 stroke grestore } bind def /D12 { gsave translate 45 rotate 0 0 S12 stroke grestore } bind def /D13 { gsave translate 45 rotate 0 0 S13 stroke grestore } bind def /D14 { gsave translate 45 rotate 0 0 S14 stroke grestore } bind def /D15 { gsave translate 45 rotate 0 0 S15 stroke grestore } bind def /DiaE { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke } def /BoxE { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke } def /TriUE { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke } def /TriDE { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke } def /PentE { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore } def /CircE { stroke [] 0 setdash hpt 0 360 arc stroke } def /Opaque { gsave closepath 1 setgray fill grestore 0 setgray closepath } def /DiaW { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V Opaque stroke } def /BoxW { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V Opaque stroke } def /TriUW { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V Opaque stroke } def /TriDW { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V Opaque stroke } def /PentW { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat Opaque stroke grestore } def /CircW { stroke [] 0 setdash hpt 0 360 arc Opaque stroke } def /BoxFill { gsave Rec 1 setgray fill grestore } def end %%EndProlog gnudict begin gsave 50 50 translate 0.050 0.050 scale 0 setgray newpath (Times-Roman) findfont 240 scalefont setfont 1.000 UL LTb 1008 480 M 63 0 V 5841 0 R -63 0 V 864 480 M (0) Rshow 1008 1090 M 63 0 V 5841 0 R -63 0 V -5985 0 R (1e+06) Rshow 1008 1701 M 63 0 V 5841 0 R -63 0 V -5985 0 R (2e+06) Rshow 1008 2311 M 63 0 V 5841 0 R -63 0 V -5985 0 R (3e+06) Rshow 1008 2921 M 63 0 V 5841 0 R -63 0 V -5985 0 R (4e+06) Rshow 1008 3531 M 63 0 V 5841 0 R -63 0 V -5985 0 R (5e+06) Rshow 1008 4142 M 63 0 V 5841 0 R -63 0 V -5985 0 R (6e+06) Rshow 1008 4752 M 63 0 V 5841 0 R -63 0 V -5985 0 R (7e+06) Rshow 1008 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (0) Cshow 1598 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (2) Cshow 2189 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (4) Cshow 2779 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (6) Cshow 3370 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (8) Cshow 3960 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (10) Cshow 4550 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (12) Cshow 5141 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (14) Cshow 5731 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (16) Cshow 6322 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (18) Cshow 6912 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (20) Cshow 1.000 UL LTb 1008 480 M 5904 0 V 0 4272 V -5904 0 V 0 -4272 V 1.000 UP 1.000 UL LT0 5841 903 M (Timing-Driven Packing ) Rshow 5985 903 M 639 0 V 1303 3397 M 295 73 V 296 -274 V 295 -6 V 295 -19 V 295 43 V 295 -49 V 296 80 V 295 79 V 295 79 V 295 116 V 295 104 V 296 37 V 295 61 V 295 55 V 295 103 V 295 6 V 296 98 V 295 31 V 295 170 V 1303 3397 Pls 1598 3470 Pls 1894 3196 Pls 2189 3190 Pls 2484 3171 Pls 2779 3214 Pls 3074 3165 Pls 3370 3245 Pls 3665 3324 Pls 3960 3403 Pls 4255 3519 Pls 4550 3623 Pls 4846 3660 Pls 5141 3721 Pls 5436 3776 Pls 5731 3879 Pls 6026 3885 Pls 6322 3983 Pls 6617 4014 Pls 6912 4184 Pls 6304 903 Pls 1.000 UP 1.000 UL LT1 5841 663 M (Non-Timing Packing ) Rshow 5985 663 M 639 0 V 1303 3397 M 295 122 V 296 -213 V 295 48 V 295 0 V 295 80 V 295 0 V 296 85 V 295 61 V 295 189 V 295 141 V 295 110 V 296 97 V 295 13 V 295 97 V 295 134 V 295 -79 V 296 201 V 295 104 V 295 86 V 1303 3397 Crs 1598 3519 Crs 1894 3306 Crs 2189 3354 Crs 2484 3354 Crs 2779 3434 Crs 3074 3434 Crs 3370 3519 Crs 3665 3580 Crs 3960 3769 Crs 4255 3910 Crs 4550 4020 Crs 4846 4117 Crs 5141 4130 Crs 5436 4227 Crs 5731 4361 Crs 6026 4282 Crs 6322 4483 Crs 6617 4587 Crs 6912 4673 Crs 6304 663 Crs stroke grestore end showpage %%Trailer %%DocumentFonts: Times-Roman %%EndDocument FMENDEPSF 4 9 Q 0 X 0 0 0 1 0 0 0 K (Figure 8. Area vs. Cluster Size) 379.44 458.87 T 2 F (Cluster Size) 436.08 476.54 T 318.18 487.71 338.01 638.55 R (Minimum-W) 0 -270 324.18 501.72 TF (idth T) 0 -270 324.18 548.87 TF (ransistor Areas) 0 -270 324.18 570.3 TF (\050Geometric A) 0 -270 334.18 494.12 TF (v) 0 -270 334.18 543.19 TF (erage Ov) 0 -270 334.18 547.55 TF (er 25 Circuits\051) 0 -270 334.18 580.15 TF 318.18 487.71 338.01 638.55 R 317.76 73.61 558.14 720 C 0 0 612 792 C 317.76 73.61 558.14 720 C 317.76 258.56 558.14 449.64 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 50 50 410 302 216 151.2 340.67 296.35 FMBEGINEPSF %%BeginDocument: %!PS-Adobe-2.0 EPSF-2.0 %%Title: PSDAT/CritPathComp.ps %%Creator: gnuplot 3.5 (pre 3.6) patchlevel beta 347 %%CreationDate: Mon Sep 28 13:45:12 1998 %%DocumentFonts: (atend) %%BoundingBox: 50 50 410 302 %%Orientation: Portrait %%EndComments /gnudict 120 dict def gnudict begin /Color false def /Solid false def /gnulinewidth 5.000 def /userlinewidth gnulinewidth def /vshift -80 def /dl {10 mul} def /hpt_ 31.5 def /vpt_ 31.5 def /hpt hpt_ def /vpt vpt_ def /M {moveto} bind def /L {lineto} bind def /R {rmoveto} bind def /V {rlineto} bind def /vpt2 vpt 2 mul def /hpt2 hpt 2 mul def /Lshow { currentpoint stroke M 0 vshift R show } def /Rshow { currentpoint stroke M dup stringwidth pop neg vshift R show } def /Cshow { currentpoint stroke M dup stringwidth pop -2 div vshift R show } def /UP { dup vpt_ mul /vpt exch def hpt_ mul /hpt exch def /hpt2 hpt 2 mul def /vpt2 vpt 2 mul def } def /DL { Color {setrgbcolor Solid {pop []} if 0 setdash } {pop pop pop Solid {pop []} if 0 setdash} ifelse } def /BL { stroke gnulinewidth 2 mul setlinewidth } def /AL { stroke gnulinewidth 2 div setlinewidth } def /UL { gnulinewidth mul /userlinewidth exch def } def /PL { stroke userlinewidth setlinewidth } def /LTb { BL [] 0 0 0 DL } def /LTa { AL [1 dl 2 dl] 0 setdash 0 0 0 setrgbcolor } def /LT0 { PL [] 1 0 0 DL } def /LT1 { PL [4 dl 2 dl] 0 1 0 DL } def /LT2 { PL [2 dl 3 dl] 0 0 1 DL } def /LT3 { PL [1 dl 1.5 dl] 1 0 1 DL } def /LT4 { PL [5 dl 2 dl 1 dl 2 dl] 0 1 1 DL } def /LT5 { PL [4 dl 3 dl 1 dl 3 dl] 1 1 0 DL } def /LT6 { PL [2 dl 2 dl 2 dl 4 dl] 0 0 0 DL } def /LT7 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 1 0.3 0 DL } def /LT8 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 0.5 0.5 0.5 DL } def /Pnt { stroke [] 0 setdash gsave 1 setlinecap M 0 0 V stroke grestore } def /Dia { stroke [] 0 setdash 2 copy vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke Pnt } def /Pls { stroke [] 0 setdash vpt sub M 0 vpt2 V currentpoint stroke M hpt neg vpt neg R hpt2 0 V stroke } def /Box { stroke [] 0 setdash 2 copy exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke Pnt } def /Crs { stroke [] 0 setdash exch hpt sub exch vpt add M hpt2 vpt2 neg V currentpoint stroke M hpt2 neg 0 R hpt2 vpt2 V stroke } def /TriU { stroke [] 0 setdash 2 copy vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke Pnt } def /Star { 2 copy Pls Crs } def /BoxF { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath fill } def /TriUF { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath fill } def /TriD { stroke [] 0 setdash 2 copy vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke Pnt } def /TriDF { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath fill} def /DiaF { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath fill } def /Pent { stroke [] 0 setdash 2 copy gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore Pnt } def /PentF { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath fill grestore } def /Circle { stroke [] 0 setdash 2 copy hpt 0 360 arc stroke Pnt } def /CircleF { stroke [] 0 setdash hpt 0 360 arc fill } def /C0 { BL [] 0 setdash 2 copy moveto vpt 90 450 arc } bind def /C1 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill vpt 0 360 arc closepath } bind def /C2 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C3 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill vpt 0 360 arc closepath } bind def /C4 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc closepath } bind def /C5 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc } bind def /C6 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 270 arc closepath fill vpt 0 360 arc closepath } bind def /C7 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 270 arc closepath fill vpt 0 360 arc closepath } bind def /C8 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C9 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 450 arc closepath fill vpt 0 360 arc closepath } bind def /C10 { BL [] 0 setdash 2 copy 2 copy moveto vpt 270 360 arc closepath fill 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C11 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C12 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C13 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C14 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 360 arc closepath fill vpt 0 360 arc } bind def /C15 { BL [] 0 setdash 2 copy vpt 0 360 arc closepath fill vpt 0 360 arc closepath } bind def /Rec { newpath 4 2 roll moveto 1 index 0 rlineto 0 exch rlineto neg 0 rlineto closepath } bind def /Square { dup Rec } bind def /Bsquare { vpt sub exch vpt sub exch vpt2 Square } bind def /S0 { BL [] 0 setdash 2 copy moveto 0 vpt rlineto BL Bsquare } bind def /S1 { BL [] 0 setdash 2 copy vpt Square fill Bsquare } bind def /S2 { BL [] 0 setdash 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S3 { BL [] 0 setdash 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S4 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S5 { BL [] 0 setdash 2 copy 2 copy vpt Square fill exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S6 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill Bsquare } bind def /S7 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill 2 copy vpt Square fill Bsquare } bind def /S8 { BL [] 0 setdash 2 copy vpt sub vpt Square fill Bsquare } bind def /S9 { BL [] 0 setdash 2 copy vpt sub vpt vpt2 Rec fill Bsquare } bind def /S10 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S11 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S12 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill Bsquare } bind def /S13 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy vpt Square fill Bsquare } bind def /S14 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S15 { BL [] 0 setdash 2 copy Bsquare fill Bsquare } bind def /D0 { gsave translate 45 rotate 0 0 S0 stroke grestore } bind def /D1 { gsave translate 45 rotate 0 0 S1 stroke grestore } bind def /D2 { gsave translate 45 rotate 0 0 S2 stroke grestore } bind def /D3 { gsave translate 45 rotate 0 0 S3 stroke grestore } bind def /D4 { gsave translate 45 rotate 0 0 S4 stroke grestore } bind def /D5 { gsave translate 45 rotate 0 0 S5 stroke grestore } bind def /D6 { gsave translate 45 rotate 0 0 S6 stroke grestore } bind def /D7 { gsave translate 45 rotate 0 0 S7 stroke grestore } bind def /D8 { gsave translate 45 rotate 0 0 S8 stroke grestore } bind def /D9 { gsave translate 45 rotate 0 0 S9 stroke grestore } bind def /D10 { gsave translate 45 rotate 0 0 S10 stroke grestore } bind def /D11 { gsave translate 45 rotate 0 0 S11 stroke grestore } bind def /D12 { gsave translate 45 rotate 0 0 S12 stroke grestore } bind def /D13 { gsave translate 45 rotate 0 0 S13 stroke grestore } bind def /D14 { gsave translate 45 rotate 0 0 S14 stroke grestore } bind def /D15 { gsave translate 45 rotate 0 0 S15 stroke grestore } bind def /DiaE { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke } def /BoxE { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke } def /TriUE { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke } def /TriDE { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke } def /PentE { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore } def /CircE { stroke [] 0 setdash hpt 0 360 arc stroke } def /Opaque { gsave closepath 1 setgray fill grestore 0 setgray closepath } def /DiaW { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V Opaque stroke } def /BoxW { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V Opaque stroke } def /TriUW { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V Opaque stroke } def /TriDW { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V Opaque stroke } def /PentW { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat Opaque stroke grestore } def /CircW { stroke [] 0 setdash hpt 0 360 arc Opaque stroke } def /BoxFill { gsave Rec 1 setgray fill grestore } def end %%EndProlog gnudict begin gsave 50 50 translate 0.050 0.050 scale 0 setgray newpath (Times-Roman) findfont 240 scalefont setfont 1.000 UL LTb 1296 480 M 63 0 V 5553 0 R -63 0 V -5697 0 R (0) Rshow 1296 907 M 63 0 V 5553 0 R -63 0 V -5697 0 R (5e-09) Rshow 1296 1334 M 63 0 V 5553 0 R -63 0 V -5697 0 R (1e-08) Rshow 1296 1762 M 63 0 V 5553 0 R -63 0 V -5697 0 R (1.5e-08) Rshow 1296 2189 M 63 0 V 5553 0 R -63 0 V -5697 0 R (2e-08) Rshow 1296 2616 M 63 0 V 5553 0 R -63 0 V -5697 0 R (2.5e-08) Rshow 1296 3043 M 63 0 V 5553 0 R -63 0 V -5697 0 R (3e-08) Rshow 1296 3470 M 63 0 V 5553 0 R -63 0 V -5697 0 R (3.5e-08) Rshow 1296 3898 M 63 0 V 5553 0 R -63 0 V -5697 0 R (4e-08) Rshow 1296 4325 M 63 0 V 5553 0 R -63 0 V -5697 0 R (4.5e-08) Rshow 1296 4752 M 63 0 V 5553 0 R -63 0 V -5697 0 R (5e-08) Rshow 1296 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (0) Cshow 1858 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (2) Cshow 2419 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (4) Cshow 2981 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (6) Cshow 3542 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (8) Cshow 4104 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (10) Cshow 4666 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (12) Cshow 5227 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (14) Cshow 5789 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (16) Cshow 6350 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (18) Cshow 6912 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (20) Cshow 1.000 UL LTb 1296 480 M 5616 0 V 0 4272 V -5616 0 V 0 -4272 V 1.000 UP 1.000 UL LT0 5841 903 M (Timing-Driven Packing ) Rshow 5985 903 M 639 0 V 1577 4675 M 281 -213 V 280 -616 V 281 -179 V 281 -60 V 281 -77 V 281 -119 V 280 -69 V 281 -51 V 281 -51 V 281 8 V 281 17 V 280 -94 V 281 -25 V 281 8 V 281 0 V 281 -68 V 280 -26 V 281 -17 V 281 17 V 1577 4675 Pls 1858 4462 Pls 2138 3846 Pls 2419 3667 Pls 2700 3607 Pls 2981 3530 Pls 3262 3411 Pls 3542 3342 Pls 3823 3291 Pls 4104 3240 Pls 4385 3248 Pls 4666 3265 Pls 4946 3171 Pls 5227 3146 Pls 5508 3154 Pls 5789 3154 Pls 6070 3086 Pls 6350 3060 Pls 6631 3043 Pls 6912 3060 Pls 6304 903 Pls 1.000 UP 1.000 UL LT1 5841 663 M (Non-Timing Packing ) Rshow 5985 663 M 639 0 V 1577 4675 M 281 -128 V 280 -402 V 281 -111 V 281 -94 V 281 -77 V 281 -85 V 280 -9 V 281 -102 V 281 -51 V 281 59 V 281 -94 V 280 0 V 281 -25 V 281 0 V 281 -77 V 281 17 V 280 -60 V 281 9 V 281 17 V 1577 4675 Crs 1858 4547 Crs 2138 4145 Crs 2419 4034 Crs 2700 3940 Crs 2981 3863 Crs 3262 3778 Crs 3542 3769 Crs 3823 3667 Crs 4104 3616 Crs 4385 3675 Crs 4666 3581 Crs 4946 3581 Crs 5227 3556 Crs 5508 3556 Crs 5789 3479 Crs 6070 3496 Crs 6350 3436 Crs 6631 3445 Crs 6912 3462 Crs 6304 663 Crs stroke grestore end showpage %%Trailer %%DocumentFonts: Times-Roman %%EndDocument FMENDEPSF 4 9 Q 0 X 0 0 0 1 0 0 0 K (Figure 9. Critical Path Delay vs. Cluster Size) 350.15 266.19 T 2 F (Cluster Size) 440.36 285.57 T 318.32 296.03 338.15 446.87 R (Critical P) 0 -270 324.32 313.4 TF (ath Delay \050In Seconds,) 0 -270 324.32 347.52 TF (Geometric A) 0 -270 334.32 303.94 TF (v) 0 -270 334.32 350.01 TF (erage Ov) 0 -270 334.32 354.37 TF (er 25 Circuits\051) 0 -270 334.32 386.97 TF 318.32 296.03 338.15 446.87 R 317.76 73.61 558.14 720 C 0 0 612 792 C 317.76 73.61 558.14 720 C 317.76 73.61 558.14 258.56 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 50 50 410 302 216 151.2 340.67 105.64 FMBEGINEPSF %%BeginDocument: %!PS-Adobe-2.0 EPSF-2.0 %%Title: PSDAT/AreaDelayProd.ps %%Creator: gnuplot 3.5 (pre 3.6) patchlevel beta 347 %%CreationDate: Mon Sep 28 13:54:46 1998 %%DocumentFonts: (atend) %%BoundingBox: 50 50 410 302 %%Orientation: Portrait %%EndComments /gnudict 120 dict def gnudict begin /Color false def /Solid false def /gnulinewidth 5.000 def /userlinewidth gnulinewidth def /vshift -80 def /dl {10 mul} def /hpt_ 31.5 def /vpt_ 31.5 def /hpt hpt_ def /vpt vpt_ def /M {moveto} bind def /L {lineto} bind def /R {rmoveto} bind def /V {rlineto} bind def /vpt2 vpt 2 mul def /hpt2 hpt 2 mul def /Lshow { currentpoint stroke M 0 vshift R show } def /Rshow { currentpoint stroke M dup stringwidth pop neg vshift R show } def /Cshow { currentpoint stroke M dup stringwidth pop -2 div vshift R show } def /UP { dup vpt_ mul /vpt exch def hpt_ mul /hpt exch def /hpt2 hpt 2 mul def /vpt2 vpt 2 mul def } def /DL { Color {setrgbcolor Solid {pop []} if 0 setdash } {pop pop pop Solid {pop []} if 0 setdash} ifelse } def /BL { stroke gnulinewidth 2 mul setlinewidth } def /AL { stroke gnulinewidth 2 div setlinewidth } def /UL { gnulinewidth mul /userlinewidth exch def } def /PL { stroke userlinewidth setlinewidth } def /LTb { BL [] 0 0 0 DL } def /LTa { AL [1 dl 2 dl] 0 setdash 0 0 0 setrgbcolor } def /LT0 { PL [] 1 0 0 DL } def /LT1 { PL [4 dl 2 dl] 0 1 0 DL } def /LT2 { PL [2 dl 3 dl] 0 0 1 DL } def /LT3 { PL [1 dl 1.5 dl] 1 0 1 DL } def /LT4 { PL [5 dl 2 dl 1 dl 2 dl] 0 1 1 DL } def /LT5 { PL [4 dl 3 dl 1 dl 3 dl] 1 1 0 DL } def /LT6 { PL [2 dl 2 dl 2 dl 4 dl] 0 0 0 DL } def /LT7 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 1 0.3 0 DL } def /LT8 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 0.5 0.5 0.5 DL } def /Pnt { stroke [] 0 setdash gsave 1 setlinecap M 0 0 V stroke grestore } def /Dia { stroke [] 0 setdash 2 copy vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke Pnt } def /Pls { stroke [] 0 setdash vpt sub M 0 vpt2 V currentpoint stroke M hpt neg vpt neg R hpt2 0 V stroke } def /Box { stroke [] 0 setdash 2 copy exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke Pnt } def /Crs { stroke [] 0 setdash exch hpt sub exch vpt add M hpt2 vpt2 neg V currentpoint stroke M hpt2 neg 0 R hpt2 vpt2 V stroke } def /TriU { stroke [] 0 setdash 2 copy vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke Pnt } def /Star { 2 copy Pls Crs } def /BoxF { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath fill } def /TriUF { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath fill } def /TriD { stroke [] 0 setdash 2 copy vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke Pnt } def /TriDF { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath fill} def /DiaF { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath fill } def /Pent { stroke [] 0 setdash 2 copy gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore Pnt } def /PentF { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath fill grestore } def /Circle { stroke [] 0 setdash 2 copy hpt 0 360 arc stroke Pnt } def /CircleF { stroke [] 0 setdash hpt 0 360 arc fill } def /C0 { BL [] 0 setdash 2 copy moveto vpt 90 450 arc } bind def /C1 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill vpt 0 360 arc closepath } bind def /C2 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C3 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill vpt 0 360 arc closepath } bind def /C4 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc closepath } bind def /C5 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc } bind def /C6 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 270 arc closepath fill vpt 0 360 arc closepath } bind def /C7 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 270 arc closepath fill vpt 0 360 arc closepath } bind def /C8 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C9 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 450 arc closepath fill vpt 0 360 arc closepath } bind def /C10 { BL [] 0 setdash 2 copy 2 copy moveto vpt 270 360 arc closepath fill 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C11 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C12 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C13 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C14 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 360 arc closepath fill vpt 0 360 arc } bind def /C15 { BL [] 0 setdash 2 copy vpt 0 360 arc closepath fill vpt 0 360 arc closepath } bind def /Rec { newpath 4 2 roll moveto 1 index 0 rlineto 0 exch rlineto neg 0 rlineto closepath } bind def /Square { dup Rec } bind def /Bsquare { vpt sub exch vpt sub exch vpt2 Square } bind def /S0 { BL [] 0 setdash 2 copy moveto 0 vpt rlineto BL Bsquare } bind def /S1 { BL [] 0 setdash 2 copy vpt Square fill Bsquare } bind def /S2 { BL [] 0 setdash 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S3 { BL [] 0 setdash 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S4 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S5 { BL [] 0 setdash 2 copy 2 copy vpt Square fill exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S6 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill Bsquare } bind def /S7 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill 2 copy vpt Square fill Bsquare } bind def /S8 { BL [] 0 setdash 2 copy vpt sub vpt Square fill Bsquare } bind def /S9 { BL [] 0 setdash 2 copy vpt sub vpt vpt2 Rec fill Bsquare } bind def /S10 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S11 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S12 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill Bsquare } bind def /S13 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy vpt Square fill Bsquare } bind def /S14 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S15 { BL [] 0 setdash 2 copy Bsquare fill Bsquare } bind def /D0 { gsave translate 45 rotate 0 0 S0 stroke grestore } bind def /D1 { gsave translate 45 rotate 0 0 S1 stroke grestore } bind def /D2 { gsave translate 45 rotate 0 0 S2 stroke grestore } bind def /D3 { gsave translate 45 rotate 0 0 S3 stroke grestore } bind def /D4 { gsave translate 45 rotate 0 0 S4 stroke grestore } bind def /D5 { gsave translate 45 rotate 0 0 S5 stroke grestore } bind def /D6 { gsave translate 45 rotate 0 0 S6 stroke grestore } bind def /D7 { gsave translate 45 rotate 0 0 S7 stroke grestore } bind def /D8 { gsave translate 45 rotate 0 0 S8 stroke grestore } bind def /D9 { gsave translate 45 rotate 0 0 S9 stroke grestore } bind def /D10 { gsave translate 45 rotate 0 0 S10 stroke grestore } bind def /D11 { gsave translate 45 rotate 0 0 S11 stroke grestore } bind def /D12 { gsave translate 45 rotate 0 0 S12 stroke grestore } bind def /D13 { gsave translate 45 rotate 0 0 S13 stroke grestore } bind def /D14 { gsave translate 45 rotate 0 0 S14 stroke grestore } bind def /D15 { gsave translate 45 rotate 0 0 S15 stroke grestore } bind def /DiaE { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke } def /BoxE { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke } def /TriUE { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke } def /TriDE { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke } def /PentE { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore } def /CircE { stroke [] 0 setdash hpt 0 360 arc stroke } def /Opaque { gsave closepath 1 setgray fill grestore 0 setgray closepath } def /DiaW { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V Opaque stroke } def /BoxW { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V Opaque stroke } def /TriUW { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V Opaque stroke } def /TriDW { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V Opaque stroke } def /PentW { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat Opaque stroke grestore } def /CircW { stroke [] 0 setdash hpt 0 360 arc Opaque stroke } def /BoxFill { gsave Rec 1 setgray fill grestore } def end %%EndProlog gnudict begin gsave 50 50 translate 0.050 0.050 scale 0 setgray newpath (Times-Roman) findfont 240 scalefont setfont 1.000 UL LTb 864 480 M 63 0 V 5985 0 R -63 0 V 720 480 M (0) Rshow 864 1334 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.05) Rshow 864 2189 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.1) Rshow 864 3043 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.15) Rshow 864 3898 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.2) Rshow 864 4752 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.25) Rshow 864 480 M 0 63 V 0 4209 R 0 -63 V 864 240 M (0) Cshow 1469 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (2) Cshow 2074 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (4) Cshow 2678 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (6) Cshow 3283 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (8) Cshow 3888 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (10) Cshow 4493 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (12) Cshow 5098 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (14) Cshow 5702 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (16) Cshow 6307 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (18) Cshow 6912 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (20) Cshow 1.000 UL LTb 864 480 M 6048 0 V 0 4272 V -6048 0 V 864 480 L 1.000 UP 1.000 UL LT0 5841 903 M (Timing Driven Packing) Rshow 5985 903 M 639 0 V 1166 4496 M 303 -120 V 302 -906 V 303 -153 V 302 -86 V 302 -17 V 303 -154 V 302 17 V 303 17 V 302 35 V 302 102 V 303 120 V 302 -69 V 303 35 V 302 51 V 302 85 V 303 -68 V 302 51 V 303 17 V 302 154 V 1166 4496 Pls 1469 4376 Pls 1771 3470 Pls 2074 3317 Pls 2376 3231 Pls 2678 3214 Pls 2981 3060 Pls 3283 3077 Pls 3586 3094 Pls 3888 3129 Pls 4190 3231 Pls 4493 3351 Pls 4795 3282 Pls 5098 3317 Pls 5400 3368 Pls 5702 3453 Pls 6005 3385 Pls 6307 3436 Pls 6610 3453 Pls 6912 3607 Pls 6304 903 Pls 1.000 UP 1.000 UL LT1 5841 663 M (Non-Timing Driven Packing) Rshow 5985 663 M 639 0 V 1166 4496 M 303 34 V 302 -649 V 303 -52 V 302 -85 V 302 17 V 303 -86 V 302 86 V 303 -51 V 302 153 V 302 205 V 303 18 V 302 85 V 303 -17 V 302 102 V 302 35 V 303 -52 V 302 120 V 303 120 V 302 102 V 1166 4496 Crs 1469 4530 Crs 1771 3881 Crs 2074 3829 Crs 2376 3744 Crs 2678 3761 Crs 2981 3675 Crs 3283 3761 Crs 3586 3710 Crs 3888 3863 Crs 4190 4068 Crs 4493 4086 Crs 4795 4171 Crs 5098 4154 Crs 5400 4256 Crs 5702 4291 Crs 6005 4239 Crs 6307 4359 Crs 6610 4479 Crs 6912 4581 Crs 6304 663 Crs stroke grestore end showpage %%Trailer %%DocumentFonts: Times-Roman %%EndDocument FMENDEPSF 4 9 Q 0 X 0 0 0 1 0 0 0 K (Figure 10. Area-Delay Product vs. Cluster Size) 347.69 83.13 T 319.42 105.97 339.25 256.8 R 2 F (Area-Delay Product) 0 -270 325.42 145.28 TF (\050Geometric A) 0 -270 335.42 105.97 TF (v) 0 -270 335.42 155.04 TF (erage Ov) 0 -270 335.42 159.4 TF (er 25 Circuits\051) 0 -270 335.42 192 TF 319.42 105.97 339.25 256.8 R (Cluster Size) 442.32 98.64 T 366.57 215.27 547.57 215.27 2 L V 0.5 H 2 Z 3 X N 365.77 196.92 547.27 196.92 2 L N 389.19 207.34 387.22 207.34 389.19 214.22 391.16 207.34 4 Y 0 Z 0 X N 389.19 207.34 387.22 207.34 389.19 214.22 391.16 207.34 4 Y V 389.19 203.63 391.16 203.63 389.19 196.75 387.22 203.63 4 Y N 389.19 203.63 391.16 203.63 389.19 196.75 387.22 203.63 4 Y V 389.19 207.09 389.19 203.88 2 L N (20%) 370.57 204.7 T 317.76 73.61 558.14 720 C 0 0 612 792 C 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "6" 6 %%Page: "7" 7 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 5 9 Q 0 X 0 0 0 1 0 0 0 K (7.1.1 Area and Dela) 53.86 714 T (y as Cluster Siz) 136.14 714 T (e is Increased) 198.51 714 T 2 F 1.07 (After the benchmark circuits were pack) 53.86 700 P 1.07 (ed with the tw) 201.3 700 P 1.07 (o dif) 255.66 700 P 1.07 (ferent) 273.25 700 P 0.84 (clustering algorithms, the) 53.86 690 P 0.84 (y were placed and routed using VPR to) 147.14 690 P 1.22 (obtain area and critical-path delay estimations. The total area of) 53.86 680 P 0.27 (each circuit \050logic plus routing\051 is gi) 53.86 670 P 0.27 (v) 186.24 670 P 0.27 (en in terms of the equi) 190.6 670 P 0.27 (v) 272.46 670 P 0.27 (alent) 276.74 670 P 2.27 (number of) 53.86 660 P 1 F 2.27 (minimum-width tr) 97.88 660 P 2.27 (ansistor ar) 164.76 660 P 2.27 (eas) 205.95 660 P 2 F 2.27 (. A minimum-width) 217.95 660 P -0.06 (transistor area is the layout area occupied by the smallest transistor) 53.86 650 P 0.99 (that can be contacted in a process, plus the minimum spacing to) 53.86 640 P (another transistor abo) 53.86 630 T (v) 131.71 630 T (e it and to its right [Betz98b, Betz99].) 136.07 630 T 0.14 (In Figure) 53.86 615 P 0.14 (8 we sho) 89.49 615 P 0.14 (w the geometric a) 121.53 615 P 0.14 (v) 185.99 615 P 0.14 (erage of the total circuit area) 190.35 615 P 0.2 (of the benchmarks vs. cluster size. It can be seen that the T) 53.86 605 P 0.2 (-VP) 267.38 605 P 0.2 (ack) 281.74 605 P -0.12 (algorithm has signi\336cantly impro) 53.86 595 P -0.12 (v) 173.13 595 P -0.12 (ed the area required for each cir-) 177.49 595 P 0.66 (cuit when compared to the original VP) 53.86 585 P 0.66 (ack algorithm, particularly) 197.18 585 P 4.75 (for lar) 53.86 575 P 4.75 (ger cluster sizes \050this impro) 80.68 575 P 4.75 (v) 199.02 575 P 4.75 (ement is e) 203.39 575 P 4.75 (xplained in) 249.24 575 P (Section) 53.86 565 T (7.1.2\051.) 83.11 565 T -0.22 (Area is af) 53.86 550 P -0.22 (fected by tw) 88.18 550 P -0.22 (o f) 132.13 550 P -0.22 (actors. First, as we increase cluster size we) 141.57 550 P 1.34 (reduce the routing requirements between clusters, so we require) 53.86 540 P 0.04 (less routing area. Second, as we increase cluster size, the total area) 53.86 530 P 1.53 (of the multiple) 53.86 520 P 1.53 (xors within each cluster gro) 109.78 520 P 1.53 (ws quadratically) 215.66 520 P 1.53 (. F) 275.84 520 P 1.53 (or) 286.74 520 P 1.53 (suf) 53.86 510 P 1.53 (\336ciently lar) 64.63 510 P 1.53 (ge clusters, the area reductions in the routing are) 107.25 510 P (o) 53.86 500 T (v) 58.22 500 T (ertak) 62.59 500 T (en by the increased area required within the lar) 80.49 500 T (ger clusters.) 249.27 500 T 0.47 (Figure) 53.86 485 P 0.47 (9 sho) 79.61 485 P 0.47 (ws the geometric a) 99.11 485 P 0.47 (v) 168.08 485 P 0.47 (erage of the critical path delay of) 172.44 485 P 1.07 (the benchmarks vs. cluster size for both algorithms, and demon-) 53.86 475 P 1.33 (strates that the delay for the T) 53.86 465 P 1.33 (-VP) 168.48 465 P 1.33 (ack algorithm is less than the) 182.85 465 P 1.45 (delay for the original VP) 53.86 455 P 1.45 (ack algorithm. Additionally) 149.02 455 P 1.45 (, this graph) 251.08 455 P 1.17 (sho) 53.86 445 P 1.17 (ws that the critical path delay is decreasing as cluster size is) 66.13 445 P 1.74 (increased. This means that for clusters of size one through 20,) 53.86 435 P 0.35 (lar) 53.86 425 P 0.35 (ger clusters pro) 63.19 425 P 0.35 (vide better speed \050a detailed e) 119.24 425 P 0.35 (xplanation of wh) 228.09 425 P 0.35 (y) 289.74 425 P (this occurs is gi) 53.86 415 T (v) 109.88 415 T (en in Section) 114.25 415 T (7.1.3\051.) 163.5 415 T 2 (In Figure) 53.86 400 P 2 (10 we sho) 91.35 400 P 2 (w the geometric a) 131.62 400 P 2 (v) 201.67 400 P 2 (erage of the area-delay) 206.03 400 P 0.13 (product of the benchmarks vs. cluster size. Comparing T) 53.86 390 P 0.13 (-VP) 258 390 P 0.13 (ack to) 272.37 390 P -0.19 (VP) 53.86 380 P -0.19 (ack, we can see that T) 65.22 380 P -0.19 (-VP) 142.9 380 P -0.19 (ack has impro) 157.27 380 P -0.19 (v) 207.24 380 P -0.19 (ed the area-delay prod-) 211.6 380 P -0.12 (uct by about 20% for clusters of size se) 53.86 370 P -0.12 (v) 194.13 370 P -0.12 (en through ten. This repre-) 198.49 370 P 1.24 (sents a comparison of both algorithms at their best performance) 53.86 360 P -0.05 (points. At lar) 53.86 350 P -0.05 (ger cluster sizes the T) 100.84 350 P -0.05 (-VP) 178.29 350 P -0.05 (ack algorithm pro) 192.65 350 P -0.05 (vides e) 256.41 350 P -0.05 (v) 281.38 350 P -0.05 (en) 285.74 350 P 0.95 (more of a performance g) 53.86 340 P 0.95 (ain. This is mainly due to the increased) 146.59 340 P 1.8 (number of nets that the T) 53.86 330 P 1.8 (-VP) 152.75 330 P 1.8 (ack algorithm completely absorbs) 167.11 330 P (within clusters, resulting in reduced circuit area.) 53.86 320 T 1.89 (Figure) 53.86 305 P 1.89 (10 mak) 79.61 305 P 1.89 (es an important result visible \321 clusters of size) 108.15 305 P 2.1 (se) 53.86 295 P 2.1 (v) 61.13 295 P 2.1 (en through ten pro) 65.5 295 P 2.1 (vide the best trade-of) 137.9 295 P 2.1 (f between area and) 220.21 295 P -0.07 (delay) 53.86 285 P -0.07 (. Compared to a cluster of size one, a cluster of size se) 72.77 285 P -0.07 (v) 267.2 285 P -0.07 (en has) 271.56 285 P 0.67 (an area-delay product that is 36% better) 53.86 275 P 0.67 (, and a cluster of size ten) 200.98 275 P (has an area-delay product that is 34% better) 53.86 265 T (.) 211.07 265 T 1.9 (On a) 53.86 250 P 1.9 (v) 72.82 250 P 1.9 (erage, circuits implemented in an FPGA with size se) 77.19 250 P 1.9 (v) 281.38 250 P 1.9 (en) 285.74 250 P -0.06 (clusters ha) 53.86 240 P -0.06 (v) 91.86 240 P -0.06 (e 30% less delay \050a 43% increase in speed\051 and use 8%) 96.22 240 P -0.08 (less area than circuits implemented in an FPGA with size one clus-) 53.86 230 P 0.35 (ters. Circuits implemented in an FPGA with size ten clusters ha) 53.86 220 P 0.35 (v) 285.88 220 P 0.35 (e) 290.24 220 P 1.31 (34% less delay \050a 52% increase in speed\051, and require no addi-) 53.86 210 P -0.21 (tional area compared to circuits implemented in an FPGA with size) 53.86 200 P (one clusters.) 53.86 190 T 1.7 (All of the indi) 53.86 175 P 1.7 (vidual benchmark circuits track) 109.47 175 P 1.7 (ed these a) 228.19 175 P 1.7 (v) 266.89 175 P 1.7 (erages) 271.25 175 P 0.79 (quite well \050with minor v) 53.86 165 P 0.79 (ariations, mostly at cluster sizes one and) 144.28 165 P (tw) 53.86 155 T (o\051.) 62.77 155 T 5 F (7.1.2 T) 53.86 138 T (-VP) 83.12 138 T (ac) 97.76 138 T (k Area Impro) 107.08 138 T (v) 158.46 138 T (ement o) 162.74 138 T (v) 195.12 138 T (er VP) 199.4 138 T (ac) 221.55 138 T (k) 230.87 138 T 2 F 1.83 (As Figure) 53.86 124 P 1.83 (8 sho) 93.68 124 P 1.83 (ws, T) 114.53 124 P 1.83 (-VP) 135.53 124 P 1.83 (ack produces circuits that require less) 149.89 124 P -0.04 (area than circuits pack) 53.86 114 P -0.04 (ed with VP) 134.38 114 P -0.04 (ack. T) 174.67 114 P -0.04 (o understand the reason for) 196.41 114 P -0.12 (this surprising result, one must compare the structure of the pack) 53.86 104 P -0.12 (ed) 285.74 104 P 0.95 (circuits produced by VP) 53.86 94 P 0.95 (ack and T) 143.8 94 P 0.95 (-VP) 180.35 94 P 0.95 (ack. The criticality term in) 194.72 94 P 1.96 (the T) 53.86 84 P 1.96 (-VP) 73.74 84 P 1.96 (ack attraction function \0501.8\051 mak) 88.1 84 P 1.96 (es T) 214.09 84 P 1.96 (-VP) 230.47 84 P 1.96 (ack prefer to) 244.83 84 P 1.15 (cluster a BLE with BLEs that are in its f) 317.76 508.22 P 1.15 (an-in or f) 472.8 508.22 P 1.15 (an-out, rather) 508.51 508.22 P -0.22 (than with BLEs that it shares inputs with. As a result, T) 317.76 498.22 P -0.22 (-VP) 514.26 498.22 P -0.22 (ack pro-) 528.62 498.22 P 0.94 (duces circuit packings in which man) 317.76 488.22 P 0.94 (y lo) 453.55 488.22 P 0.94 (w-f) 468.01 488.22 P 0.94 (anout nets ha) 480.41 488.22 P 0.94 (v) 529.6 488.22 P 0.94 (e been) 533.97 488.22 P (completely absorbed into logic clusters) 317.76 478.22 T 2 7.2 Q (1) 458.75 481.82 T 2 9 Q (.) 462.35 478.22 T 0.91 (Figure) 317.76 463.22 P 0.91 (11 sho) 343.51 463.22 P 0.91 (ws the number of nets absorbed vs. cluster size for) 367.95 463.22 P 0.5 (both VP) 317.76 453.22 P 0.5 (ack and T) 347.88 453.22 P 0.5 (-VP) 383.54 453.22 P 0.5 (ack. Since T) 397.9 453.22 P 0.5 (-VP) 442.81 453.22 P 0.5 (ack has absorbed more nets) 457.17 453.22 P 1.16 (than VP) 317.76 443.22 P 1.16 (ack, it has fe) 348.04 443.22 P 1.16 (wer nets to route between clusters than the) 396.79 443.22 P 0.23 (output of VP) 317.76 433.22 P 0.23 (ack; ho) 364.6 433.22 P 0.23 (we) 390.86 433.22 P 0.23 (v) 401.12 433.22 P 0.23 (er) 405.49 433.22 P 0.23 (, the a) 412.12 433.22 P 0.23 (v) 434.15 433.22 P 0.23 (erage f) 438.52 433.22 P 0.23 (anout of each inter) 463.4 433.22 P 0.23 (-cluster) 531.15 433.22 P 0.11 (net is slightly higher \050not sho) 317.76 423.22 P 0.11 (wn\051. The net result is that the circuits) 423.36 423.22 P -0.18 (pack) 317.76 413.22 P -0.18 (ed with T) 334.67 413.22 P -0.18 (-VP) 367.98 413.22 P -0.18 (ack are some) 382.34 413.22 P -0.18 (what easier to route than the circuits) 428.74 413.22 P 1.49 (pack) 317.76 403.22 P 1.49 (ed with VP) 334.67 403.22 P 1.49 (ack, resulting in a reduction in the routing area) 378.01 403.22 P (required) 317.76 393.22 T 2 7.2 Q (2) 347.75 396.82 T 2 9 Q (.) 351.35 393.22 T 5 F (7.1.3 Explanation of Dela) 317.76 376.22 T (y Results) 420.55 376.22 T 2 F 2.13 (In Figure) 317.76 362.22 P 2.13 (12 we sho) 355.39 362.22 P 2.13 (w the relationship between the number of) 395.91 362.22 P -0.05 (internal \050intra-cluster \321 f) 317.76 352.22 P -0.05 (ast\051 and e) 410.24 352.22 P -0.05 (xternal \050inter) 444.49 352.22 P -0.05 (-cluster \321 slo) 490.99 352.22 P -0.05 (wer\051) 541.65 352.22 P 1.32 (connections on the critical path. As cluster size is increased the) 317.76 342.22 P 1.33 (number of internal connections on the critical path is increased,) 317.76 332.22 P -0.14 (and the number of e) 317.76 322.22 P -0.14 (xternal connections is decreased. This pro) 389.03 322.22 P -0.14 (vides) 539.14 322.22 P 1.31 (a circuit speedup due to f) 317.76 312.22 P 1.31 (act that internal connections are f) 414.96 312.22 P 1.31 (aster) 541.15 312.22 P (than e) 317.76 302.22 T (xternal connections) 339.37 302.22 T 2 7.2 Q (3) 409.61 305.82 T 2 9 Q (.) 413.21 302.22 T -0.17 (It is interesting to note that for clusters of size greater than four) 317.76 287.22 P -0.17 (, the) 542.81 287.22 P 0.17 (number of e) 317.76 277.22 P 0.17 (xternal \050inter) 361.46 277.22 P 0.17 (-cluster\051 nets on the critical path does not) 408.2 277.22 P 2.93 (decrease as much with cluster size as the inter) 317.76 267.22 P 2.93 (-cluster delay) 506.48 267.22 P 0.54 (decreases with cluster size \050see Figure) 317.76 257.22 P 0.54 (13\051. From size four to size) 460.44 257.22 P 0.62 (twenty we ha) 317.76 247.22 P 0.62 (v) 366.8 247.22 P 0.62 (e a reduction in the number of e) 371.17 247.22 P 0.62 (xternal nets on the) 490.06 247.22 P 0.88 (critical path \050Figure) 317.76 237.22 P 0.88 (12\051 of about 18%; compare this to the inter) 393.27 237.22 P 0.88 (-) 555.14 237.22 P 317.76 220.03 558.14 234.2 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 326.27 232.21 468 232.21 2 L 0.5 H 2 Z 0 X 0 0 0 1 0 0 0 K N 0 0 612 792 C 2 6.4 Q 0 X 0 0 0 1 0 0 0 K (1) 317.76 217.89 T 2 8 Q 0.26 (For a net to be completely absorbed into a cluster, it must have all of its) 324.85 214.69 P (terminals contained within that cluster.) 324.85 204.69 T 2 6.4 Q (2) 317.76 197.89 T 2 8 Q 1.01 (This result shows the importance of using a full CAD flow, including) 324.85 194.69 P 1.15 (placement and routing, to evaluate many FPGA issues. It would have) 324.85 184.69 P -0.19 (been difficult or impossible to guess that the output of T-VPack would be) 324.85 174.69 P -0.37 (easier to route than the output of VPack without actually placing and rout-) 324.85 164.69 P 0.83 (ing the outputs from both packing algorithms. In fact, since the circuit) 324.85 154.69 P 0.22 (packings produced by T-VPack have more point-to-point connections to) 324.85 144.69 P -0.47 (route between clusters \050despite having fewer nets\051, one would likely guess) 324.85 134.69 P (that T-VPack\325s circuits would be more difficult to route.) 324.85 124.69 T 2 6.4 Q (3) 317.76 117.89 T 2 8 Q -0.29 (As cluster size is increased, internal cluster multiplexor and wiring delays) 324.85 114.69 P 0.11 (increase. If we were to keep increasing the cluster size, this effect would) 324.85 104.69 P -0.05 (eventually result in internal delays becoming large enough that any gains) 324.85 94.69 P (obtained from making connections local to the cluster would be lost.) 324.85 84.69 T 317.76 80.03 558.14 720 C 317.76 514.22 558.14 720 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 50 50 410 302 217.25 151.2 344.73 564.74 FMBEGINEPSF %%BeginDocument: %!PS-Adobe-2.0 EPSF-2.0 %%Title: PSDAT/Packed_Frac_Outputs_Made_Local.ps %%Creator: gnuplot 3.5 (pre 3.6) patchlevel beta 347 %%CreationDate: Mon Sep 28 18:46:02 1998 %%DocumentFonts: (atend) %%BoundingBox: 50 50 410 302 %%Orientation: Portrait %%EndComments /gnudict 120 dict def gnudict begin /Color false def /Solid false def /gnulinewidth 5.000 def /userlinewidth gnulinewidth def /vshift -80 def /dl {10 mul} def /hpt_ 31.5 def /vpt_ 31.5 def /hpt hpt_ def /vpt vpt_ def /M {moveto} bind def /L {lineto} bind def /R {rmoveto} bind def /V {rlineto} bind def /vpt2 vpt 2 mul def /hpt2 hpt 2 mul def /Lshow { currentpoint stroke M 0 vshift R show } def /Rshow { currentpoint stroke M dup stringwidth pop neg vshift R show } def /Cshow { currentpoint stroke M dup stringwidth pop -2 div vshift R show } def /UP { dup vpt_ mul /vpt exch def hpt_ mul /hpt exch def /hpt2 hpt 2 mul def /vpt2 vpt 2 mul def } def /DL { Color {setrgbcolor Solid {pop []} if 0 setdash } {pop pop pop Solid {pop []} if 0 setdash} ifelse } def /BL { stroke gnulinewidth 2 mul setlinewidth } def /AL { stroke gnulinewidth 2 div setlinewidth } def /UL { gnulinewidth mul /userlinewidth exch def } def /PL { stroke userlinewidth setlinewidth } def /LTb { BL [] 0 0 0 DL } def /LTa { AL [1 dl 2 dl] 0 setdash 0 0 0 setrgbcolor } def /LT0 { PL [] 1 0 0 DL } def /LT1 { PL [4 dl 2 dl] 0 1 0 DL } def /LT2 { PL [2 dl 3 dl] 0 0 1 DL } def /LT3 { PL [1 dl 1.5 dl] 1 0 1 DL } def /LT4 { PL [5 dl 2 dl 1 dl 2 dl] 0 1 1 DL } def /LT5 { PL [4 dl 3 dl 1 dl 3 dl] 1 1 0 DL } def /LT6 { PL [2 dl 2 dl 2 dl 4 dl] 0 0 0 DL } def /LT7 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 1 0.3 0 DL } def /LT8 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 0.5 0.5 0.5 DL } def /Pnt { stroke [] 0 setdash gsave 1 setlinecap M 0 0 V stroke grestore } def /Dia { stroke [] 0 setdash 2 copy vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke Pnt } def /Pls { stroke [] 0 setdash vpt sub M 0 vpt2 V currentpoint stroke M hpt neg vpt neg R hpt2 0 V stroke } def /Box { stroke [] 0 setdash 2 copy exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke Pnt } def /Crs { stroke [] 0 setdash exch hpt sub exch vpt add M hpt2 vpt2 neg V currentpoint stroke M hpt2 neg 0 R hpt2 vpt2 V stroke } def /TriU { stroke [] 0 setdash 2 copy vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke Pnt } def /Star { 2 copy Pls Crs } def /BoxF { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath fill } def /TriUF { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath fill } def /TriD { stroke [] 0 setdash 2 copy vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke Pnt } def /TriDF { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath fill} def /DiaF { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath fill } def /Pent { stroke [] 0 setdash 2 copy gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore Pnt } def /PentF { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath fill grestore } def /Circle { stroke [] 0 setdash 2 copy hpt 0 360 arc stroke Pnt } def /CircleF { stroke [] 0 setdash hpt 0 360 arc fill } def /C0 { BL [] 0 setdash 2 copy moveto vpt 90 450 arc } bind def /C1 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill vpt 0 360 arc closepath } bind def /C2 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C3 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill vpt 0 360 arc closepath } bind def /C4 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc closepath } bind def /C5 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc } bind def /C6 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 270 arc closepath fill vpt 0 360 arc closepath } bind def /C7 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 270 arc closepath fill vpt 0 360 arc closepath } bind def /C8 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C9 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 450 arc closepath fill vpt 0 360 arc closepath } bind def /C10 { BL [] 0 setdash 2 copy 2 copy moveto vpt 270 360 arc closepath fill 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C11 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C12 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C13 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C14 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 360 arc closepath fill vpt 0 360 arc } bind def /C15 { BL [] 0 setdash 2 copy vpt 0 360 arc closepath fill vpt 0 360 arc closepath } bind def /Rec { newpath 4 2 roll moveto 1 index 0 rlineto 0 exch rlineto neg 0 rlineto closepath } bind def /Square { dup Rec } bind def /Bsquare { vpt sub exch vpt sub exch vpt2 Square } bind def /S0 { BL [] 0 setdash 2 copy moveto 0 vpt rlineto BL Bsquare } bind def /S1 { BL [] 0 setdash 2 copy vpt Square fill Bsquare } bind def /S2 { BL [] 0 setdash 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S3 { BL [] 0 setdash 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S4 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S5 { BL [] 0 setdash 2 copy 2 copy vpt Square fill exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S6 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill Bsquare } bind def /S7 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill 2 copy vpt Square fill Bsquare } bind def /S8 { BL [] 0 setdash 2 copy vpt sub vpt Square fill Bsquare } bind def /S9 { BL [] 0 setdash 2 copy vpt sub vpt vpt2 Rec fill Bsquare } bind def /S10 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S11 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S12 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill Bsquare } bind def /S13 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy vpt Square fill Bsquare } bind def /S14 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S15 { BL [] 0 setdash 2 copy Bsquare fill Bsquare } bind def /D0 { gsave translate 45 rotate 0 0 S0 stroke grestore } bind def /D1 { gsave translate 45 rotate 0 0 S1 stroke grestore } bind def /D2 { gsave translate 45 rotate 0 0 S2 stroke grestore } bind def /D3 { gsave translate 45 rotate 0 0 S3 stroke grestore } bind def /D4 { gsave translate 45 rotate 0 0 S4 stroke grestore } bind def /D5 { gsave translate 45 rotate 0 0 S5 stroke grestore } bind def /D6 { gsave translate 45 rotate 0 0 S6 stroke grestore } bind def /D7 { gsave translate 45 rotate 0 0 S7 stroke grestore } bind def /D8 { gsave translate 45 rotate 0 0 S8 stroke grestore } bind def /D9 { gsave translate 45 rotate 0 0 S9 stroke grestore } bind def /D10 { gsave translate 45 rotate 0 0 S10 stroke grestore } bind def /D11 { gsave translate 45 rotate 0 0 S11 stroke grestore } bind def /D12 { gsave translate 45 rotate 0 0 S12 stroke grestore } bind def /D13 { gsave translate 45 rotate 0 0 S13 stroke grestore } bind def /D14 { gsave translate 45 rotate 0 0 S14 stroke grestore } bind def /D15 { gsave translate 45 rotate 0 0 S15 stroke grestore } bind def /DiaE { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke } def /BoxE { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke } def /TriUE { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke } def /TriDE { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke } def /PentE { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore } def /CircE { stroke [] 0 setdash hpt 0 360 arc stroke } def /Opaque { gsave closepath 1 setgray fill grestore 0 setgray closepath } def /DiaW { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V Opaque stroke } def /BoxW { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V Opaque stroke } def /TriUW { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V Opaque stroke } def /TriDW { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V Opaque stroke } def /PentW { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat Opaque stroke grestore } def /CircW { stroke [] 0 setdash hpt 0 360 arc Opaque stroke } def /BoxFill { gsave Rec 1 setgray fill grestore } def end %%EndProlog gnudict begin gsave 50 50 translate 0.050 0.050 scale 0 setgray newpath (Times-Roman) findfont 240 scalefont setfont 1.000 UL LTb 864 480 M 63 0 V 5985 0 R -63 0 V 720 480 M (0) Rshow 864 907 M 63 0 V 5985 0 R -63 0 V 720 907 M (0.05) Rshow 864 1334 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.1) Rshow 864 1762 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.15) Rshow 864 2189 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.2) Rshow 864 2616 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.25) Rshow 864 3043 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.3) Rshow 864 3470 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.35) Rshow 864 3898 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.4) Rshow 864 4325 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.45) Rshow 864 4752 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.5) Rshow 864 480 M 0 63 V 0 4209 R 0 -63 V 864 240 M (0) Cshow 1469 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (2) Cshow 2074 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (4) Cshow 2678 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (6) Cshow 3283 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (8) Cshow 3888 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (10) Cshow 4493 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (12) Cshow 5098 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (14) Cshow 5702 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (16) Cshow 6307 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (18) Cshow 6912 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (20) Cshow 1.000 UL LTb 864 480 M 6048 0 V 0 4272 V -6048 0 V 864 480 L 1.000 UP 1.000 UL LT0 5841 903 M (Timing Vpack) Rshow 5985 903 M 639 0 V 1166 480 M 303 1212 V 302 1075 V 303 543 V 302 317 V 302 313 V 303 96 V 302 131 V 303 76 V 302 95 V 302 56 V 303 106 V 302 7 V 303 87 V 302 31 V 302 -21 V 303 42 V 302 39 V 303 32 V 302 -8 V 1166 480 Pls 1469 1692 Pls 1771 2767 Pls 2074 3310 Pls 2376 3627 Pls 2678 3940 Pls 2981 4036 Pls 3283 4167 Pls 3586 4243 Pls 3888 4338 Pls 4190 4394 Pls 4493 4500 Pls 4795 4507 Pls 5098 4594 Pls 5400 4625 Pls 5702 4604 Pls 6005 4646 Pls 6307 4685 Pls 6610 4717 Pls 6912 4709 Pls 6304 903 Pls 1.000 UP 1.000 UL LT1 5841 663 M (Non-Timing Vpack) Rshow 5985 663 M 639 0 V 1166 480 M 303 588 V 302 388 V 303 213 V 302 140 V 302 156 V 303 69 V 302 50 V 303 93 V 302 2 V 302 72 V 303 48 V 302 33 V 303 39 V 302 43 V 302 68 V 303 78 V 302 45 V 303 -76 V 302 38 V 1166 480 Crs 1469 1068 Crs 1771 1456 Crs 2074 1669 Crs 2376 1809 Crs 2678 1965 Crs 2981 2034 Crs 3283 2084 Crs 3586 2177 Crs 3888 2179 Crs 4190 2251 Crs 4493 2299 Crs 4795 2332 Crs 5098 2371 Crs 5400 2414 Crs 5702 2482 Crs 6005 2560 Crs 6307 2605 Crs 6610 2529 Crs 6912 2567 Crs 6304 663 Crs stroke grestore end showpage %%Trailer %%DocumentFonts: Times-Roman %%EndDocument FMENDEPSF 4 9 Q 0 X 0 0 0 1 0 0 0 K (Figure 11. Number of Nets Absorbed vs. Cluster Size) 336.56 533.83 T 2 F (Cluster Size) 435.13 554.33 T 323.76 564.08 343.59 714.92 R (Fraction of Nets Absorbed) 0 -270 329.76 591.63 TF (\050A) 0 -270 339.76 564.08 TF (v) 0 -270 339.76 572.91 TF (erage Ov) 0 -270 339.76 577.28 TF (er 25 Circuits\051) 0 -270 339.76 609.87 TF 323.76 564.08 343.59 714.92 R 317.76 80.03 558.14 720 C 0 0 612 792 C 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "7" 7 %%Page: "8" 8 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 2 9 Q 0 X 0 0 0 1 0 0 0 K 0.77 (cluster critical path delay \050Figure) 53.86 282.2 P 0.77 (13\051 which has been reduced by) 178.67 282.2 P 0.02 (40% o) 53.86 272.2 P 0.02 (v) 76.99 272.2 P 0.02 (er this same range. This means that the circuit speedup vis-) 81.35 272.2 P 1.19 (ible in Figure) 53.86 262.2 P 1.19 (13 for lar) 107 262.2 P 1.19 (ger cluster sizes is not only caused by a) 142.71 262.2 P -0.16 (reduction in the number of e) 53.86 252.2 P -0.16 (xternal nets on the critical path b) 155.17 252.2 P -0.16 (ut it is) 272.04 252.2 P 3.13 (also) 53.86 242.2 P 1 F 3.13 ( caused by inter) 68.36 242.2 P 3.13 (-cluster connections on the critical path) 134.82 242.2 P (becoming faster) 53.86 231.53 T 2 F (. This is e) 111.11 231.53 T (xplained belo) 145.97 231.53 T (w) 194.49 231.53 T (.) 200.4 231.53 T 0.36 (The impro) 53.86 216.2 P 0.36 (v) 91.83 216.2 P 0.36 (ement in inter) 96.19 216.2 P 0.36 (-cluster delay with increased cluster size) 146.73 216.2 P -0.03 (is caused in part by a reduction in the \322logical\323 manhattan distance) 53.86 206.2 P 2.32 (between connections in the FPGA as sho) 53.86 196.2 P 2.32 (wn in Figure) 215.03 196.2 P 2.32 (14. By) 267.92 196.2 P 0.56 (sizing b) 53.86 186.2 P 0.56 (uf) 82.49 186.2 P 0.56 (fers) 89.76 186.2 P 2 7.2 Q 0.45 (1) 103.25 189.79 P 2 9 Q 0.56 ( to compensate for the increased ph) 106.85 186.2 P 0.56 (ysical length of) 237.62 186.2 P 0.36 (routing wire se) 53.86 176.2 P 0.36 (gments associated with lar) 108.43 176.2 P 0.36 (ger clusters, the delay of) 204.58 176.2 P 1.66 (each routing se) 53.86 166.2 P 1.66 (gment has remained roughly constant. Since the) 111.53 166.2 P 0.3 (total number of se) 53.86 156.2 P 0.3 (gments on the critical path has decreased due to) 119.87 156.2 P 1.22 (the reduction in the \322logical\323 manhattan distance, the result is a) 53.86 146.2 P 53.86 129.02 294.24 143.2 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 62.36 141.21 204.09 141.21 2 L 0.5 H 2 Z 0 X 0 0 0 1 0 0 0 K N 0 0 612 792 C 2 6.4 Q 0 X 0 0 0 1 0 0 0 K (1) 53.86 126.89 T 2 8 Q -0.26 (Changes in delay and area due to different size routing buffers is account-) 60.94 123.69 P (ed for in VPRs timing and area models.) 60.94 113.69 T 2 9 Q -0.03 (greater impro) 317.76 450.89 P -0.03 (v) 366.33 450.89 P -0.03 (ement in critical path delay than the reduction in the) 370.7 450.89 P (number of nets on the critical path w) 317.76 440.23 T (ould indicate.) 449.9 440.23 T 0 F (7.2) 317.76 424.89 T (Eff) 339.36 424.89 T (ect of Routing T) 351.27 424.89 T (ransistor Sizing on Critical P) 419.05 424.89 T (ath) 541.31 424.89 T (Dela) 339.36 414.89 T (y and Area at V) 358.19 414.89 T (arious Cluster Siz) 422.68 414.89 T (es) 498.79 414.89 T 2 F 1.58 (The purpose of this section is to pro) 317.76 401.89 P 1.58 (vide a v) 457.95 401.89 P 1.58 (eri\336cation that the) 489.48 401.89 P -0.14 (manner in which we sized b) 317.76 391.89 P -0.14 (uf) 417.61 391.89 P -0.14 (fers and transistors is acceptable, and) 424.88 391.89 P 0.66 (did not f) 317.76 381.89 P 0.66 (a) 349.49 381.89 P 0.66 (v) 353.31 381.89 P 0.66 (or one cluster size o) 357.63 381.89 P 0.66 (v) 432.1 381.89 P 0.66 (er another) 436.47 381.89 P 0.66 (. In this section we use) 472.86 381.89 P 0.12 (only T) 317.76 371.89 P 0.12 (-VP) 340.81 371.89 P 0.12 (ack to pack the circuits since we ha) 355.17 371.89 P 0.12 (v) 483.05 371.89 P 0.12 (e demonstrated that) 487.41 371.89 P (it is superior to VP) 317.76 361.23 T (ack.) 385.63 361.23 T 0.89 (W) 317.76 345.89 P 0.89 (e ha) 325.54 345.89 P 0.89 (v) 340.99 345.89 P 0.89 (e repeated the e) 345.35 345.89 P 0.89 (xperiments described in Section) 404.1 345.89 P 0.89 (7.1 using) 524.25 345.89 P 0.28 (transistor and b) 317.76 335.89 P 0.28 (uf) 373.64 335.89 P 0.28 (fer sizes of one-half and double the sizes used in) 380.91 335.89 P 2.63 (Section) 317.76 325.89 P 2.63 (7.1. The results from these e) 347.01 325.89 P 2.63 (xperiments are sho) 462.25 325.89 P 2.63 (wn in) 535.26 325.89 P 1.72 (Figures) 317.76 315.89 P 1.72 (15, 16, and 17. These e) 347.01 315.89 P 1.72 (xperiments v) 438.97 315.89 P 1.72 (alidate the original) 487.21 315.89 P 53.86 109.02 294.24 720 C 54.63 502.85 293.46 720 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 50 50 410 302 216 151.2 82.48 566.78 FMBEGINEPSF %%BeginDocument: %!PS-Adobe-2.0 EPSF-2.0 %%Title: PSDAT/CritNetsOnCritPath.ps %%Creator: gnuplot 3.5 (pre 3.6) patchlevel beta 347 %%CreationDate: Mon Sep 28 14:05:51 1998 %%DocumentFonts: (atend) %%BoundingBox: 50 50 410 302 %%Orientation: Portrait %%EndComments /gnudict 120 dict def gnudict begin /Color false def /Solid false def /gnulinewidth 5.000 def /userlinewidth gnulinewidth def /vshift -80 def /dl {10 mul} def /hpt_ 31.5 def /vpt_ 31.5 def /hpt hpt_ def /vpt vpt_ def /M {moveto} bind def /L {lineto} bind def /R {rmoveto} bind def /V {rlineto} bind def /vpt2 vpt 2 mul def /hpt2 hpt 2 mul def /Lshow { currentpoint stroke M 0 vshift R show } def /Rshow { currentpoint stroke M dup stringwidth pop neg vshift R show } def /Cshow { currentpoint stroke M dup stringwidth pop -2 div vshift R show } def /UP { dup vpt_ mul /vpt exch def hpt_ mul /hpt exch def /hpt2 hpt 2 mul def /vpt2 vpt 2 mul def } def /DL { Color {setrgbcolor Solid {pop []} if 0 setdash } {pop pop pop Solid {pop []} if 0 setdash} ifelse } def /BL { stroke gnulinewidth 2 mul setlinewidth } def /AL { stroke gnulinewidth 2 div setlinewidth } def /UL { gnulinewidth mul /userlinewidth exch def } def /PL { stroke userlinewidth setlinewidth } def /LTb { BL [] 0 0 0 DL } def /LTa { AL [1 dl 2 dl] 0 setdash 0 0 0 setrgbcolor } def /LT0 { PL [] 1 0 0 DL } def /LT1 { PL [4 dl 2 dl] 0 1 0 DL } def /LT2 { PL [2 dl 3 dl] 0 0 1 DL } def /LT3 { PL [1 dl 1.5 dl] 1 0 1 DL } def /LT4 { PL [5 dl 2 dl 1 dl 2 dl] 0 1 1 DL } def /LT5 { PL [4 dl 3 dl 1 dl 3 dl] 1 1 0 DL } def /LT6 { PL [2 dl 2 dl 2 dl 4 dl] 0 0 0 DL } def /LT7 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 1 0.3 0 DL } def /LT8 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 0.5 0.5 0.5 DL } def /Pnt { stroke [] 0 setdash gsave 1 setlinecap M 0 0 V stroke grestore } def /Dia { stroke [] 0 setdash 2 copy vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke Pnt } def /Pls { stroke [] 0 setdash vpt sub M 0 vpt2 V currentpoint stroke M hpt neg vpt neg R hpt2 0 V stroke } def /Box { stroke [] 0 setdash 2 copy exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke Pnt } def /Crs { stroke [] 0 setdash exch hpt sub exch vpt add M hpt2 vpt2 neg V currentpoint stroke M hpt2 neg 0 R hpt2 vpt2 V stroke } def /TriU { stroke [] 0 setdash 2 copy vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke Pnt } def /Star { 2 copy Pls Crs } def /BoxF { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath fill } def /TriUF { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath fill } def /TriD { stroke [] 0 setdash 2 copy vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke Pnt } def /TriDF { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath fill} def /DiaF { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath fill } def /Pent { stroke [] 0 setdash 2 copy gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore Pnt } def /PentF { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath fill grestore } def /Circle { stroke [] 0 setdash 2 copy hpt 0 360 arc stroke Pnt } def /CircleF { stroke [] 0 setdash hpt 0 360 arc fill } def /C0 { BL [] 0 setdash 2 copy moveto vpt 90 450 arc } bind def /C1 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill vpt 0 360 arc closepath } bind def /C2 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C3 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill vpt 0 360 arc closepath } bind def /C4 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc closepath } bind def /C5 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc } bind def /C6 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 270 arc closepath fill vpt 0 360 arc closepath } bind def /C7 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 270 arc closepath fill vpt 0 360 arc closepath } bind def /C8 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C9 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 450 arc closepath fill vpt 0 360 arc closepath } bind def /C10 { BL [] 0 setdash 2 copy 2 copy moveto vpt 270 360 arc closepath fill 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C11 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C12 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C13 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C14 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 360 arc closepath fill vpt 0 360 arc } bind def /C15 { BL [] 0 setdash 2 copy vpt 0 360 arc closepath fill vpt 0 360 arc closepath } bind def /Rec { newpath 4 2 roll moveto 1 index 0 rlineto 0 exch rlineto neg 0 rlineto closepath } bind def /Square { dup Rec } bind def /Bsquare { vpt sub exch vpt sub exch vpt2 Square } bind def /S0 { BL [] 0 setdash 2 copy moveto 0 vpt rlineto BL Bsquare } bind def /S1 { BL [] 0 setdash 2 copy vpt Square fill Bsquare } bind def /S2 { BL [] 0 setdash 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S3 { BL [] 0 setdash 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S4 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S5 { BL [] 0 setdash 2 copy 2 copy vpt Square fill exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S6 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill Bsquare } bind def /S7 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill 2 copy vpt Square fill Bsquare } bind def /S8 { BL [] 0 setdash 2 copy vpt sub vpt Square fill Bsquare } bind def /S9 { BL [] 0 setdash 2 copy vpt sub vpt vpt2 Rec fill Bsquare } bind def /S10 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S11 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S12 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill Bsquare } bind def /S13 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy vpt Square fill Bsquare } bind def /S14 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S15 { BL [] 0 setdash 2 copy Bsquare fill Bsquare } bind def /D0 { gsave translate 45 rotate 0 0 S0 stroke grestore } bind def /D1 { gsave translate 45 rotate 0 0 S1 stroke grestore } bind def /D2 { gsave translate 45 rotate 0 0 S2 stroke grestore } bind def /D3 { gsave translate 45 rotate 0 0 S3 stroke grestore } bind def /D4 { gsave translate 45 rotate 0 0 S4 stroke grestore } bind def /D5 { gsave translate 45 rotate 0 0 S5 stroke grestore } bind def /D6 { gsave translate 45 rotate 0 0 S6 stroke grestore } bind def /D7 { gsave translate 45 rotate 0 0 S7 stroke grestore } bind def /D8 { gsave translate 45 rotate 0 0 S8 stroke grestore } bind def /D9 { gsave translate 45 rotate 0 0 S9 stroke grestore } bind def /D10 { gsave translate 45 rotate 0 0 S10 stroke grestore } bind def /D11 { gsave translate 45 rotate 0 0 S11 stroke grestore } bind def /D12 { gsave translate 45 rotate 0 0 S12 stroke grestore } bind def /D13 { gsave translate 45 rotate 0 0 S13 stroke grestore } bind def /D14 { gsave translate 45 rotate 0 0 S14 stroke grestore } bind def /D15 { gsave translate 45 rotate 0 0 S15 stroke grestore } bind def /DiaE { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke } def /BoxE { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke } def /TriUE { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke } def /TriDE { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke } def /PentE { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore } def /CircE { stroke [] 0 setdash hpt 0 360 arc stroke } def /Opaque { gsave closepath 1 setgray fill grestore 0 setgray closepath } def /DiaW { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V Opaque stroke } def /BoxW { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V Opaque stroke } def /TriUW { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V Opaque stroke } def /TriDW { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V Opaque stroke } def /PentW { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat Opaque stroke grestore } def /CircW { stroke [] 0 setdash hpt 0 360 arc Opaque stroke } def /BoxFill { gsave Rec 1 setgray fill grestore } def end %%EndProlog gnudict begin gsave 50 50 translate 0.050 0.050 scale 0 setgray newpath (Times-Roman) findfont 240 scalefont setfont 1.000 UL LTb 576 480 M 63 0 V 6273 0 R -63 0 V 432 480 M (0) Rshow 576 907 M 63 0 V 6273 0 R -63 0 V 432 907 M (1) Rshow 576 1334 M 63 0 V 6273 0 R -63 0 V -6417 0 R (2) Rshow 576 1762 M 63 0 V 6273 0 R -63 0 V -6417 0 R (3) Rshow 576 2189 M 63 0 V 6273 0 R -63 0 V -6417 0 R (4) Rshow 576 2616 M 63 0 V 6273 0 R -63 0 V -6417 0 R (5) Rshow 576 3043 M 63 0 V 6273 0 R -63 0 V -6417 0 R (6) Rshow 576 3470 M 63 0 V 6273 0 R -63 0 V -6417 0 R (7) Rshow 576 3898 M 63 0 V 6273 0 R -63 0 V -6417 0 R (8) Rshow 576 4325 M 63 0 V 6273 0 R -63 0 V -6417 0 R (9) Rshow 576 4752 M 63 0 V 6273 0 R -63 0 V -6417 0 R (10) Rshow 576 480 M 0 63 V 0 4209 R 0 -63 V 576 240 M (0) Cshow 1210 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (2) Cshow 1843 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (4) Cshow 2477 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (6) Cshow 3110 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (8) Cshow 3744 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (10) Cshow 4378 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (12) Cshow 5011 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (14) Cshow 5645 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (16) Cshow 6278 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (18) Cshow 6912 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (20) Cshow 1.000 UL LTb 576 480 M 6336 0 V 0 4272 V -6336 0 V 576 480 L 1.000 UP 1.000 UL LT0 5841 903 M (T-VPack Internal Nets on Crit Path) Rshow 5985 903 M 639 0 V 893 480 M 317 376 V 316 397 V 317 342 V 317 167 V 317 0 V 317 183 V 316 -98 V 317 -13 V 317 201 V 317 30 V 317 51 V 316 17 V 317 69 V 317 162 V 317 -56 V 317 -34 V 316 154 V 317 38 V 317 -38 V 893 480 Pls 1210 856 Pls 1526 1253 Pls 1843 1595 Pls 2160 1762 Pls 2477 1762 Pls 2794 1945 Pls 3110 1847 Pls 3427 1834 Pls 3744 2035 Pls 4061 2065 Pls 4378 2116 Pls 4694 2133 Pls 5011 2202 Pls 5328 2364 Pls 5645 2308 Pls 5962 2274 Pls 6278 2428 Pls 6595 2466 Pls 6912 2428 Pls 6304 903 Pls 1.000 UP 1.000 UL LT1 5841 663 M (T-VPack External Nets on Crit Path) Rshow 5985 663 M 639 0 V 893 4679 M 317 -474 V 316 -594 V 317 -145 V 317 -196 V 317 0 V 317 -9 V 316 68 V 317 -12 V 317 -137 V 317 -13 V 317 -68 V 316 -43 V 317 -51 V 317 -81 V 317 98 V 317 4 V 316 -115 V 317 0 V 317 34 V 893 4679 Crs 1210 4205 Crs 1526 3611 Crs 1843 3466 Crs 2160 3270 Crs 2477 3270 Crs 2794 3261 Crs 3110 3329 Crs 3427 3317 Crs 3744 3180 Crs 4061 3167 Crs 4378 3099 Crs 4694 3056 Crs 5011 3005 Crs 5328 2924 Crs 5645 3022 Crs 5962 3026 Crs 6278 2911 Crs 6595 2911 Crs 6912 2945 Crs 6304 663 Crs stroke grestore end showpage %%Trailer %%DocumentFonts: Times-Roman %%EndDocument FMENDEPSF 4 9 Q 0 X 0 0 0 1 0 0 0 K (Figure 12. Internal and External Nets on the Critical Path) 60.34 536.81 T (\050Post Place and Route, T-VPack Only\051) 98.96 525.81 T 2 F (Cluster Size) 173.43 556.62 T 59.1 567.8 78.93 718.63 R (Internal and External Nets on Critical) 0 -270 65.1 575.6 TF (P) 0 -270 75.1 585.27 TF (ath \050A) 0 -270 75.1 590.13 TF (v) 0 -270 75.1 612.21 TF (erage Ov) 0 -270 75.1 616.58 TF (er 25 Circuits\051) 0 -270 75.1 649.17 TF 59.1 567.8 78.93 718.63 R 53.86 109.02 294.24 720 C 0 0 612 792 C 53.86 109.02 294.24 720 C 53.86 288.19 294.24 502.85 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 50 50 410 302 216 151.2 79.62 350.84 FMBEGINEPSF %%BeginDocument: %!PS-Adobe-2.0 EPSF-2.0 %%Title: PSDAT/CritDelay.ps %%Creator: gnuplot 3.5 (pre 3.6) patchlevel beta 347 %%CreationDate: Mon Sep 28 14:16:52 1998 %%DocumentFonts: (atend) %%BoundingBox: 50 50 410 302 %%Orientation: Portrait %%EndComments /gnudict 120 dict def gnudict begin /Color false def /Solid false def /gnulinewidth 5.000 def /userlinewidth gnulinewidth def /vshift -80 def /dl {10 mul} def /hpt_ 31.5 def /vpt_ 31.5 def /hpt hpt_ def /vpt vpt_ def /M {moveto} bind def /L {lineto} bind def /R {rmoveto} bind def /V {rlineto} bind def /vpt2 vpt 2 mul def /hpt2 hpt 2 mul def /Lshow { currentpoint stroke M 0 vshift R show } def /Rshow { currentpoint stroke M dup stringwidth pop neg vshift R show } def /Cshow { currentpoint stroke M dup stringwidth pop -2 div vshift R show } def /UP { dup vpt_ mul /vpt exch def hpt_ mul /hpt exch def /hpt2 hpt 2 mul def /vpt2 vpt 2 mul def } def /DL { Color {setrgbcolor Solid {pop []} if 0 setdash } {pop pop pop Solid {pop []} if 0 setdash} ifelse } def /BL { stroke gnulinewidth 2 mul setlinewidth } def /AL { stroke gnulinewidth 2 div setlinewidth } def /UL { gnulinewidth mul /userlinewidth exch def } def /PL { stroke userlinewidth setlinewidth } def /LTb { BL [] 0 0 0 DL } def /LTa { AL [1 dl 2 dl] 0 setdash 0 0 0 setrgbcolor } def /LT0 { PL [] 1 0 0 DL } def /LT1 { PL [4 dl 2 dl] 0 1 0 DL } def /LT2 { PL [2 dl 3 dl] 0 0 1 DL } def /LT3 { PL [1 dl 1.5 dl] 1 0 1 DL } def /LT4 { PL [5 dl 2 dl 1 dl 2 dl] 0 1 1 DL } def /LT5 { PL [4 dl 3 dl 1 dl 3 dl] 1 1 0 DL } def /LT6 { PL [2 dl 2 dl 2 dl 4 dl] 0 0 0 DL } def /LT7 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 1 0.3 0 DL } def /LT8 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 0.5 0.5 0.5 DL } def /Pnt { stroke [] 0 setdash gsave 1 setlinecap M 0 0 V stroke grestore } def /Dia { stroke [] 0 setdash 2 copy vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke Pnt } def /Pls { stroke [] 0 setdash vpt sub M 0 vpt2 V currentpoint stroke M hpt neg vpt neg R hpt2 0 V stroke } def /Box { stroke [] 0 setdash 2 copy exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke Pnt } def /Crs { stroke [] 0 setdash exch hpt sub exch vpt add M hpt2 vpt2 neg V currentpoint stroke M hpt2 neg 0 R hpt2 vpt2 V stroke } def /TriU { stroke [] 0 setdash 2 copy vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke Pnt } def /Star { 2 copy Pls Crs } def /BoxF { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath fill } def /TriUF { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath fill } def /TriD { stroke [] 0 setdash 2 copy vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke Pnt } def /TriDF { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath fill} def /DiaF { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath fill } def /Pent { stroke [] 0 setdash 2 copy gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore Pnt } def /PentF { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath fill grestore } def /Circle { stroke [] 0 setdash 2 copy hpt 0 360 arc stroke Pnt } def /CircleF { stroke [] 0 setdash hpt 0 360 arc fill } def /C0 { BL [] 0 setdash 2 copy moveto vpt 90 450 arc } bind def /C1 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill vpt 0 360 arc closepath } bind def /C2 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C3 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill vpt 0 360 arc closepath } bind def /C4 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc closepath } bind def /C5 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc } bind def /C6 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 270 arc closepath fill vpt 0 360 arc closepath } bind def /C7 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 270 arc closepath fill vpt 0 360 arc closepath } bind def /C8 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C9 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 450 arc closepath fill vpt 0 360 arc closepath } bind def /C10 { BL [] 0 setdash 2 copy 2 copy moveto vpt 270 360 arc closepath fill 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C11 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C12 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C13 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C14 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 360 arc closepath fill vpt 0 360 arc } bind def /C15 { BL [] 0 setdash 2 copy vpt 0 360 arc closepath fill vpt 0 360 arc closepath } bind def /Rec { newpath 4 2 roll moveto 1 index 0 rlineto 0 exch rlineto neg 0 rlineto closepath } bind def /Square { dup Rec } bind def /Bsquare { vpt sub exch vpt sub exch vpt2 Square } bind def /S0 { BL [] 0 setdash 2 copy moveto 0 vpt rlineto BL Bsquare } bind def /S1 { BL [] 0 setdash 2 copy vpt Square fill Bsquare } bind def /S2 { BL [] 0 setdash 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S3 { BL [] 0 setdash 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S4 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S5 { BL [] 0 setdash 2 copy 2 copy vpt Square fill exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S6 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill Bsquare } bind def /S7 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill 2 copy vpt Square fill Bsquare } bind def /S8 { BL [] 0 setdash 2 copy vpt sub vpt Square fill Bsquare } bind def /S9 { BL [] 0 setdash 2 copy vpt sub vpt vpt2 Rec fill Bsquare } bind def /S10 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S11 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S12 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill Bsquare } bind def /S13 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy vpt Square fill Bsquare } bind def /S14 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S15 { BL [] 0 setdash 2 copy Bsquare fill Bsquare } bind def /D0 { gsave translate 45 rotate 0 0 S0 stroke grestore } bind def /D1 { gsave translate 45 rotate 0 0 S1 stroke grestore } bind def /D2 { gsave translate 45 rotate 0 0 S2 stroke grestore } bind def /D3 { gsave translate 45 rotate 0 0 S3 stroke grestore } bind def /D4 { gsave translate 45 rotate 0 0 S4 stroke grestore } bind def /D5 { gsave translate 45 rotate 0 0 S5 stroke grestore } bind def /D6 { gsave translate 45 rotate 0 0 S6 stroke grestore } bind def /D7 { gsave translate 45 rotate 0 0 S7 stroke grestore } bind def /D8 { gsave translate 45 rotate 0 0 S8 stroke grestore } bind def /D9 { gsave translate 45 rotate 0 0 S9 stroke grestore } bind def /D10 { gsave translate 45 rotate 0 0 S10 stroke grestore } bind def /D11 { gsave translate 45 rotate 0 0 S11 stroke grestore } bind def /D12 { gsave translate 45 rotate 0 0 S12 stroke grestore } bind def /D13 { gsave translate 45 rotate 0 0 S13 stroke grestore } bind def /D14 { gsave translate 45 rotate 0 0 S14 stroke grestore } bind def /D15 { gsave translate 45 rotate 0 0 S15 stroke grestore } bind def /DiaE { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke } def /BoxE { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke } def /TriUE { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke } def /TriDE { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke } def /PentE { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore } def /CircE { stroke [] 0 setdash hpt 0 360 arc stroke } def /Opaque { gsave closepath 1 setgray fill grestore 0 setgray closepath } def /DiaW { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V Opaque stroke } def /BoxW { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V Opaque stroke } def /TriUW { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V Opaque stroke } def /TriDW { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V Opaque stroke } def /PentW { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat Opaque stroke grestore } def /CircW { stroke [] 0 setdash hpt 0 360 arc Opaque stroke } def /BoxFill { gsave Rec 1 setgray fill grestore } def end %%EndProlog gnudict begin gsave 50 50 translate 0.050 0.050 scale 0 setgray newpath (Times-Roman) findfont 240 scalefont setfont 1.000 UL LTb 1296 480 M 63 0 V 5553 0 R -63 0 V -5697 0 R (0) Rshow 1296 907 M 63 0 V 5553 0 R -63 0 V -5697 0 R (5e-09) Rshow 1296 1334 M 63 0 V 5553 0 R -63 0 V -5697 0 R (1e-08) Rshow 1296 1762 M 63 0 V 5553 0 R -63 0 V -5697 0 R (1.5e-08) Rshow 1296 2189 M 63 0 V 5553 0 R -63 0 V -5697 0 R (2e-08) Rshow 1296 2616 M 63 0 V 5553 0 R -63 0 V -5697 0 R (2.5e-08) Rshow 1296 3043 M 63 0 V 5553 0 R -63 0 V -5697 0 R (3e-08) Rshow 1296 3470 M 63 0 V 5553 0 R -63 0 V -5697 0 R (3.5e-08) Rshow 1296 3898 M 63 0 V 5553 0 R -63 0 V -5697 0 R (4e-08) Rshow 1296 4325 M 63 0 V 5553 0 R -63 0 V -5697 0 R (4.5e-08) Rshow 1296 4752 M 63 0 V 5553 0 R -63 0 V -5697 0 R (5e-08) Rshow 1296 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (0) Cshow 1858 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (2) Cshow 2419 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (4) Cshow 2981 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (6) Cshow 3542 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (8) Cshow 4104 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (10) Cshow 4666 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (12) Cshow 5227 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (14) Cshow 5789 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (16) Cshow 6350 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (18) Cshow 6912 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (20) Cshow 1.000 UL LTb 1296 480 M 5616 0 V 0 4272 V -5616 0 V 0 -4272 V 1.000 UP 1.000 UL LT0 5841 4569 M (Total Path Delay) Rshow 5985 4569 M 639 0 V 1577 4675 M 281 -213 V 280 -616 V 281 -179 V 281 -60 V 281 -77 V 281 -119 V 280 -69 V 281 -51 V 281 -51 V 281 8 V 281 17 V 280 -94 V 281 -25 V 281 8 V 281 0 V 281 -68 V 280 -26 V 281 -17 V 281 17 V 1577 4675 Pls 1858 4462 Pls 2138 3846 Pls 2419 3667 Pls 2700 3607 Pls 2981 3530 Pls 3262 3411 Pls 3542 3342 Pls 3823 3291 Pls 4104 3240 Pls 4385 3248 Pls 4666 3265 Pls 4946 3171 Pls 5227 3146 Pls 5508 3154 Pls 5789 3154 Pls 6070 3086 Pls 6350 3060 Pls 6631 3043 Pls 6912 3060 Pls 6304 4569 Pls 1.000 UP 1.000 UL LT1 5841 4329 M (Inter-Cluster Delay) Rshow 5985 4329 M 639 0 V 1577 4231 M 281 -573 V 280 -615 V 281 -256 V 281 -111 V 281 -86 V 281 -188 V 280 -51 V 281 -77 V 281 -77 V 281 -68 V 281 9 V 280 -77 V 281 -26 V 281 -43 V 281 -17 V 281 -51 V 280 -43 V 281 -25 V 281 -9 V 1577 4231 Crs 1858 3658 Crs 2138 3043 Crs 2419 2787 Crs 2700 2676 Crs 2981 2590 Crs 3262 2402 Crs 3542 2351 Crs 3823 2274 Crs 4104 2197 Crs 4385 2129 Crs 4666 2138 Crs 4946 2061 Crs 5227 2035 Crs 5508 1992 Crs 5789 1975 Crs 6070 1924 Crs 6350 1881 Crs 6631 1856 Crs 6912 1847 Crs 6304 4329 Crs 1.000 UP 1.000 UL LT2 5841 4089 M (Intra-Cluster Delay) Rshow 5985 4089 M 639 0 V 1577 882 M 281 310 V 280 36 V 281 37 V 281 59 V 281 0 V 281 62 V 280 0 V 281 17 V 281 8 V 281 60 V 281 0 V 280 0 V 281 17 V 281 17 V 281 9 V 281 0 V 280 17 V 281 8 V 281 9 V 1577 882 Star 1858 1192 Star 2138 1228 Star 2419 1265 Star 2700 1324 Star 2981 1324 Star 3262 1386 Star 3542 1386 Star 3823 1403 Star 4104 1411 Star 4385 1471 Star 4666 1471 Star 4946 1471 Star 5227 1488 Star 5508 1505 Star 5789 1514 Star 6070 1514 Star 6350 1531 Star 6631 1539 Star 6912 1548 Star 6304 4089 Star stroke grestore end showpage %%Trailer %%DocumentFonts: Times-Roman %%EndDocument FMENDEPSF 4 9 Q 0 X 0 0 0 1 0 0 0 K (Figure 13. Critical Path External, Internal, and Total Path) 57.84 319.31 T (Delay \050Post Place and Route, T-VPack Only\051) 85.47 308.31 T 2 F (Cluster Size) 172.05 339.11 T 57.73 350.29 77.56 501.13 R ( Delay Components \050In Seconds,) 0 -270 63.73 366.34 TF (Geometric A) 0 -270 73.73 358.2 TF (v) 0 -270 73.73 404.27 TF (erage Ov) 0 -270 73.73 408.63 TF (er 25 Circuits\051) 0 -270 73.73 441.23 TF 57.73 350.29 77.56 501.13 R 53.86 109.02 294.24 720 C 0 0 612 792 C 317.76 109.02 558.14 720 C 317.76 456.89 558.14 720 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 476.08 548.24 529.42 616.24 R 7 X 0 0 0 1 0 0 0 K V 0.5 H 2 Z 3 X N 476.08 618.91 529.42 686.91 R 7 X V 3 X N 388.75 546.58 413.42 577.24 R 7 X V 3 X N 361.42 546.58 386.08 577.24 R 7 X V 3 X N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 388.75 583.91 413.42 614.58 R 7 X V 3 X N 361.42 583.91 386.08 614.58 R 7 X V 3 X N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 388.75 619.91 413.42 650.58 R 7 X V 3 X N 361.42 619.91 386.08 650.58 R 7 X V 3 X N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 388.75 655.91 413.42 686.58 R 7 X V 3 X N 361.42 655.91 386.08 686.58 R 7 X V 3 X N 4 9 Q 0 X (Figure 14. Decreased Manhattan Distance as Cluster Size) 328.02 488.96 T (Increases) 421.14 477.96 T 364.42 677.84 370.42 683.84 R 7 X V 0 X N 364.42 659.39 370.42 665.39 R 7 X V 0 X N 364.42 640.93 370.42 646.93 R 7 X V 0 X N 364.42 622.47 370.42 628.47 R 7 X V 0 X N 364.42 604.02 370.42 610.02 R 7 X V 0 X N 364.42 585.56 370.42 591.56 R 7 X V 0 X N 364.42 567.1 370.42 573.1 R 7 X V 0 X N 364.42 548.64 370.42 554.64 R 7 X V 0 X N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 377.62 677.84 383.62 683.84 R 7 X V 0 X N 377.62 659.39 383.62 665.39 R 7 X V 0 X N 377.62 640.93 383.62 646.93 R 7 X V 0 X N 377.62 622.47 383.62 628.47 R 7 X V 0 X N 377.62 604.02 383.62 610.02 R 7 X V 0 X N 377.62 585.56 383.62 591.56 R 7 X V 0 X N 377.62 567.1 383.62 573.1 R 7 X V 0 X N 377.62 548.64 383.62 554.64 R 7 X V 0 X N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 390.82 677.84 396.82 683.84 R 7 X V 0 X N 390.82 659.39 396.82 665.39 R 7 X V 0 X N 390.82 640.93 396.82 646.93 R 7 X V 0 X N 390.82 622.47 396.82 628.47 R 7 X V 0 X N 390.82 604.02 396.82 610.02 R 7 X V 0 X N 390.82 585.56 396.82 591.56 R 7 X V 0 X N 390.82 567.1 396.82 573.1 R 7 X V 0 X N 390.82 548.64 396.82 554.64 R 7 X V 0 X N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 404.02 677.84 410.02 683.84 R 7 X V 0 X N 404.02 659.39 410.02 665.39 R 7 X V 0 X N 404.02 640.93 410.02 646.93 R 7 X V 0 X N 404.02 622.47 410.02 628.47 R 7 X V 0 X N 404.02 604.02 410.02 610.02 R 7 X V 0 X N 404.02 585.56 410.02 591.56 R 7 X V 0 X N 404.02 567.1 410.02 573.1 R 7 X V 0 X N 404.02 548.64 410.02 554.64 R 7 X V 0 X N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 480.42 679.18 486.42 685.18 R 7 X V 0 X N 480.42 660.72 486.42 666.72 R 7 X V 0 X N 480.42 642.26 486.42 648.26 R 7 X V 0 X N 480.42 623.81 486.42 629.81 R 7 X V 0 X N 480.42 605.35 486.42 611.35 R 7 X V 0 X N 480.42 586.89 486.42 592.89 R 7 X V 0 X N 480.42 568.43 486.42 574.43 R 7 X V 0 X N 480.42 549.98 486.42 555.98 R 7 X V 0 X N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 493.62 679.18 499.62 685.18 R 7 X V 0 X N 493.62 660.72 499.62 666.72 R 7 X V 0 X N 493.62 642.26 499.62 648.26 R 7 X V 0 X N 493.62 623.81 499.62 629.81 R 7 X V 0 X N 493.62 605.35 499.62 611.35 R 7 X V 0 X N 493.62 586.89 499.62 592.89 R 7 X V 0 X N 493.62 568.43 499.62 574.43 R 7 X V 0 X N 493.62 549.98 499.62 555.98 R 7 X V 0 X N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 506.82 679.18 512.82 685.18 R 7 X V 0 X N 506.82 660.72 512.82 666.72 R 7 X V 0 X N 506.82 642.26 512.82 648.26 R 7 X V 0 X N 506.82 623.81 512.82 629.81 R 7 X V 0 X N 506.82 605.35 512.82 611.35 R 7 X V 0 X N 506.82 586.89 512.82 592.89 R 7 X V 0 X N 506.82 568.43 512.82 574.43 R 7 X V 0 X N 506.82 549.98 512.82 555.98 R 7 X V 0 X N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 520.02 679.18 526.02 685.18 R 7 X V 0 X N 520.02 660.72 526.02 666.72 R 7 X V 0 X N 520.02 642.26 526.02 648.26 R 7 X V 0 X N 520.02 623.81 526.02 629.81 R 7 X V 0 X N 520.02 605.35 526.02 611.35 R 7 X V 0 X N 520.02 586.89 526.02 592.89 R 7 X V 0 X N 520.02 568.43 526.02 574.43 R 7 X V 0 X N 520.02 549.98 526.02 555.98 R 7 X V 0 X N 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 470.08 687.58 470.08 621.58 2 L 1 H N 470.75 614.43 470.75 547.77 2 L N 471.42 682.24 484.75 682.24 2 L N 358.08 686.24 358.08 655.58 2 L N 358.08 650.91 358.08 620.24 2 L N 358.08 613.58 358.08 582.91 2 L N 357.42 576.91 357.42 546.24 2 L N 358.75 680.91 368.08 680.91 2 L N 4 10 Q (A) 364.08 688.24 T (B) 364.08 538.91 T (A) 480.08 688.24 T (B) 480.08 539.58 T (Cluster Size 4) 357.42 707.58 T (Cluster Size 16) 471.42 707.58 T (1) 350.08 667.91 T (2) 350.08 635.24 T (3) 350.08 597.24 T (4) 348.08 557.91 T (1) 461.42 650.58 T (2) 461.42 577.91 T 2 F (Manhattan Distance) 360.75 524.58 T (A to B = 4) 360.75 514.58 T (Manhattan Distance) 469.42 524.58 T (A to B = 2) 469.42 514.58 T 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 358.08 550.91 367.42 550.91 2 L N 471.42 552.91 484.75 552.91 2 L N 317.76 109.02 558.14 720 C 0 0 612 792 C 317.76 109.02 558.14 720 C 317.76 109.02 558.14 311.99 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 50 50 410 302 216 151.2 342.11 159.2 FMBEGINEPSF %%BeginDocument: %!PS-Adobe-2.0 EPSF-2.0 %%Title: PSDAT/OptArea.ps %%Creator: gnuplot 3.5 (pre 3.6) patchlevel beta 347 %%CreationDate: Mon Sep 28 14:21:32 1998 %%DocumentFonts: (atend) %%BoundingBox: 50 50 410 302 %%Orientation: Portrait %%EndComments /gnudict 120 dict def gnudict begin /Color false def /Solid false def /gnulinewidth 5.000 def /userlinewidth gnulinewidth def /vshift -80 def /dl {10 mul} def /hpt_ 31.5 def /vpt_ 31.5 def /hpt hpt_ def /vpt vpt_ def /M {moveto} bind def /L {lineto} bind def /R {rmoveto} bind def /V {rlineto} bind def /vpt2 vpt 2 mul def /hpt2 hpt 2 mul def /Lshow { currentpoint stroke M 0 vshift R show } def /Rshow { currentpoint stroke M dup stringwidth pop neg vshift R show } def /Cshow { currentpoint stroke M dup stringwidth pop -2 div vshift R show } def /UP { dup vpt_ mul /vpt exch def hpt_ mul /hpt exch def /hpt2 hpt 2 mul def /vpt2 vpt 2 mul def } def /DL { Color {setrgbcolor Solid {pop []} if 0 setdash } {pop pop pop Solid {pop []} if 0 setdash} ifelse } def /BL { stroke gnulinewidth 2 mul setlinewidth } def /AL { stroke gnulinewidth 2 div setlinewidth } def /UL { gnulinewidth mul /userlinewidth exch def } def /PL { stroke userlinewidth setlinewidth } def /LTb { BL [] 0 0 0 DL } def /LTa { AL [1 dl 2 dl] 0 setdash 0 0 0 setrgbcolor } def /LT0 { PL [] 1 0 0 DL } def /LT1 { PL [4 dl 2 dl] 0 1 0 DL } def /LT2 { PL [2 dl 3 dl] 0 0 1 DL } def /LT3 { PL [1 dl 1.5 dl] 1 0 1 DL } def /LT4 { PL [5 dl 2 dl 1 dl 2 dl] 0 1 1 DL } def /LT5 { PL [4 dl 3 dl 1 dl 3 dl] 1 1 0 DL } def /LT6 { PL [2 dl 2 dl 2 dl 4 dl] 0 0 0 DL } def /LT7 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 1 0.3 0 DL } def /LT8 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 0.5 0.5 0.5 DL } def /Pnt { stroke [] 0 setdash gsave 1 setlinecap M 0 0 V stroke grestore } def /Dia { stroke [] 0 setdash 2 copy vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke Pnt } def /Pls { stroke [] 0 setdash vpt sub M 0 vpt2 V currentpoint stroke M hpt neg vpt neg R hpt2 0 V stroke } def /Box { stroke [] 0 setdash 2 copy exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke Pnt } def /Crs { stroke [] 0 setdash exch hpt sub exch vpt add M hpt2 vpt2 neg V currentpoint stroke M hpt2 neg 0 R hpt2 vpt2 V stroke } def /TriU { stroke [] 0 setdash 2 copy vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke Pnt } def /Star { 2 copy Pls Crs } def /BoxF { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath fill } def /TriUF { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath fill } def /TriD { stroke [] 0 setdash 2 copy vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke Pnt } def /TriDF { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath fill} def /DiaF { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath fill } def /Pent { stroke [] 0 setdash 2 copy gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore Pnt } def /PentF { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath fill grestore } def /Circle { stroke [] 0 setdash 2 copy hpt 0 360 arc stroke Pnt } def /CircleF { stroke [] 0 setdash hpt 0 360 arc fill } def /C0 { BL [] 0 setdash 2 copy moveto vpt 90 450 arc } bind def /C1 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill vpt 0 360 arc closepath } bind def /C2 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C3 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill vpt 0 360 arc closepath } bind def /C4 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc closepath } bind def /C5 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc } bind def /C6 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 270 arc closepath fill vpt 0 360 arc closepath } bind def /C7 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 270 arc closepath fill vpt 0 360 arc closepath } bind def /C8 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C9 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 450 arc closepath fill vpt 0 360 arc closepath } bind def /C10 { BL [] 0 setdash 2 copy 2 copy moveto vpt 270 360 arc closepath fill 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C11 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C12 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C13 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C14 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 360 arc closepath fill vpt 0 360 arc } bind def /C15 { BL [] 0 setdash 2 copy vpt 0 360 arc closepath fill vpt 0 360 arc closepath } bind def /Rec { newpath 4 2 roll moveto 1 index 0 rlineto 0 exch rlineto neg 0 rlineto closepath } bind def /Square { dup Rec } bind def /Bsquare { vpt sub exch vpt sub exch vpt2 Square } bind def /S0 { BL [] 0 setdash 2 copy moveto 0 vpt rlineto BL Bsquare } bind def /S1 { BL [] 0 setdash 2 copy vpt Square fill Bsquare } bind def /S2 { BL [] 0 setdash 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S3 { BL [] 0 setdash 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S4 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S5 { BL [] 0 setdash 2 copy 2 copy vpt Square fill exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S6 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill Bsquare } bind def /S7 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill 2 copy vpt Square fill Bsquare } bind def /S8 { BL [] 0 setdash 2 copy vpt sub vpt Square fill Bsquare } bind def /S9 { BL [] 0 setdash 2 copy vpt sub vpt vpt2 Rec fill Bsquare } bind def /S10 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S11 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S12 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill Bsquare } bind def /S13 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy vpt Square fill Bsquare } bind def /S14 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S15 { BL [] 0 setdash 2 copy Bsquare fill Bsquare } bind def /D0 { gsave translate 45 rotate 0 0 S0 stroke grestore } bind def /D1 { gsave translate 45 rotate 0 0 S1 stroke grestore } bind def /D2 { gsave translate 45 rotate 0 0 S2 stroke grestore } bind def /D3 { gsave translate 45 rotate 0 0 S3 stroke grestore } bind def /D4 { gsave translate 45 rotate 0 0 S4 stroke grestore } bind def /D5 { gsave translate 45 rotate 0 0 S5 stroke grestore } bind def /D6 { gsave translate 45 rotate 0 0 S6 stroke grestore } bind def /D7 { gsave translate 45 rotate 0 0 S7 stroke grestore } bind def /D8 { gsave translate 45 rotate 0 0 S8 stroke grestore } bind def /D9 { gsave translate 45 rotate 0 0 S9 stroke grestore } bind def /D10 { gsave translate 45 rotate 0 0 S10 stroke grestore } bind def /D11 { gsave translate 45 rotate 0 0 S11 stroke grestore } bind def /D12 { gsave translate 45 rotate 0 0 S12 stroke grestore } bind def /D13 { gsave translate 45 rotate 0 0 S13 stroke grestore } bind def /D14 { gsave translate 45 rotate 0 0 S14 stroke grestore } bind def /D15 { gsave translate 45 rotate 0 0 S15 stroke grestore } bind def /DiaE { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke } def /BoxE { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke } def /TriUE { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke } def /TriDE { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke } def /PentE { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore } def /CircE { stroke [] 0 setdash hpt 0 360 arc stroke } def /Opaque { gsave closepath 1 setgray fill grestore 0 setgray closepath } def /DiaW { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V Opaque stroke } def /BoxW { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V Opaque stroke } def /TriUW { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V Opaque stroke } def /TriDW { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V Opaque stroke } def /PentW { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat Opaque stroke grestore } def /CircW { stroke [] 0 setdash hpt 0 360 arc Opaque stroke } def /BoxFill { gsave Rec 1 setgray fill grestore } def end %%EndProlog gnudict begin gsave 50 50 translate 0.050 0.050 scale 0 setgray newpath (Times-Roman) findfont 240 scalefont setfont 1.000 UL LTb 1008 480 M 63 0 V 5841 0 R -63 0 V 864 480 M (0) Rshow 1008 1014 M 63 0 V 5841 0 R -63 0 V -5985 0 R (1e+06) Rshow 1008 1548 M 63 0 V 5841 0 R -63 0 V -5985 0 R (2e+06) Rshow 1008 2082 M 63 0 V 5841 0 R -63 0 V -5985 0 R (3e+06) Rshow 1008 2616 M 63 0 V 5841 0 R -63 0 V -5985 0 R (4e+06) Rshow 1008 3150 M 63 0 V 5841 0 R -63 0 V -5985 0 R (5e+06) Rshow 1008 3684 M 63 0 V 5841 0 R -63 0 V -5985 0 R (6e+06) Rshow 1008 4218 M 63 0 V 5841 0 R -63 0 V -5985 0 R (7e+06) Rshow 1008 4752 M 63 0 V 5841 0 R -63 0 V -5985 0 R (8e+06) Rshow 1008 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (0) Cshow 1598 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (2) Cshow 2189 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (4) Cshow 2779 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (6) Cshow 3370 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (8) Cshow 3960 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (10) Cshow 4550 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (12) Cshow 5141 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (14) Cshow 5731 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (16) Cshow 6322 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (18) Cshow 6912 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (20) Cshow 1.000 UL LTb 1008 480 M 5904 0 V 0 4272 V -5904 0 V 0 -4272 V 1.000 UP 1.000 UL LT0 5841 1143 M (Regular Transistor Size ) Rshow 5985 1143 M 639 0 V 1303 3033 M 295 64 V 296 -241 V 295 -5 V 295 -16 V 295 37 V 295 -42 V 296 69 V 295 69 V 295 70 V 295 101 V 295 91 V 296 32 V 295 54 V 295 48 V 295 90 V 295 6 V 296 85 V 295 27 V 295 149 V 1303 3033 Pls 1598 3097 Pls 1894 2856 Pls 2189 2851 Pls 2484 2835 Pls 2779 2872 Pls 3074 2830 Pls 3370 2899 Pls 3665 2968 Pls 3960 3038 Pls 4255 3139 Pls 4550 3230 Pls 4846 3262 Pls 5141 3316 Pls 5436 3364 Pls 5731 3454 Pls 6026 3460 Pls 6322 3545 Pls 6617 3572 Pls 6912 3721 Pls 6304 1143 Pls 1.000 UP 1.000 UL LT1 5841 903 M (Half Transistor Size ) Rshow 5985 903 M 639 0 V 1303 2760 M 295 112 V 296 -245 V 295 -16 V 295 -32 V 295 26 V 295 -48 V 296 59 V 295 59 V 295 0 V 295 85 V 295 75 V 296 21 V 295 48 V 295 43 V 295 75 V 295 -5 V 296 80 V 295 26 V 295 118 V 1303 2760 Crs 1598 2872 Crs 1894 2627 Crs 2189 2611 Crs 2484 2579 Crs 2779 2605 Crs 3074 2557 Crs 3370 2616 Crs 3665 2675 Crs 3960 2675 Crs 4255 2760 Crs 4550 2835 Crs 4846 2856 Crs 5141 2904 Crs 5436 2947 Crs 5731 3022 Crs 6026 3017 Crs 6322 3097 Crs 6617 3123 Crs 6912 3241 Crs 6304 903 Crs 1.000 UP 1.000 UL LT2 5841 663 M (Double Transistor Size ) Rshow 5985 663 M 639 0 V 1303 3422 M 295 96 V 296 -96 V 295 16 V 295 0 V 295 54 V 295 -32 V 296 85 V 295 86 V 295 37 V 295 133 V 295 113 V 296 58 V 295 75 V 295 59 V 295 117 V 295 27 V 296 107 V 295 37 V 295 150 V 1303 3422 Star 1598 3518 Star 1894 3422 Star 2189 3438 Star 2484 3438 Star 2779 3492 Star 3074 3460 Star 3370 3545 Star 3665 3631 Star 3960 3668 Star 4255 3801 Star 4550 3914 Star 4846 3972 Star 5141 4047 Star 5436 4106 Star 5731 4223 Star 6026 4250 Star 6322 4357 Star 6617 4394 Star 6912 4544 Star 6304 663 Star stroke grestore end showpage %%Trailer %%DocumentFonts: Times-Roman %%EndDocument FMENDEPSF 4 9 Q 0 X 0 0 0 1 0 0 0 K (Figure 15. Area vs. Cluster Size for Various Transistor) 328.03 128.6 T (Sizings) 420.88 117.6 T 2 F (Cluster Size) 439.39 148.41 T 320.78 159.59 340.61 310.42 R (Minimum-W) 0 -270 326.78 173.6 TF (idth T) 0 -270 326.78 220.74 TF (ransistor Areas) 0 -270 326.78 242.18 TF (\050Geometric A) 0 -270 336.78 165.99 TF (v) 0 -270 336.78 215.06 TF (erage Ov) 0 -270 336.78 219.43 TF (er 25 Circuits\051) 0 -270 336.78 252.03 TF 320.78 159.59 340.61 310.42 R 317.76 109.02 558.14 720 C 0 0 612 792 C 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "8" 8 %%Page: "9" 9 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 2 9 Q 0 X 0 0 0 1 0 0 0 K 0.71 (transistor sizings that we used since the ne) 53.86 304.97 P 0.71 (w transistor sizings do) 211.35 304.97 P (not impro) 53.86 294.3 T (v) 88.98 294.3 T (e the area delay trade-of) 93.34 294.3 T (f.) 180.07 294.3 T 0 10 Q (8. P) 53.86 277.3 T (otential Sour) 74.03 277.3 T (ces of Inaccuracies) 134.95 277.3 T 2 9 Q 0.3 (Ev) 53.86 262.97 P 0.3 (ery ef) 63.72 262.97 P 0.3 (fort has been made to ensure that our results are accurate,) 84.54 262.97 P (ho) 53.86 252.97 T (we) 62.63 252.97 T (v) 72.9 252.97 T (er) 77.27 252.97 T (, there are three potential sources of inaccuracies.) 83.9 252.97 T 0.64 (First, without actually laying out the v) 53.86 237.97 P 0.64 (arious FPGA architectures,) 195.23 237.97 P 0.89 (there is some estimation in) 53.86 227.97 P 0.89 (v) 153.57 227.97 P 0.89 (olv) 157.9 227.97 P 0.89 (ed in determining ho) 169.26 227.97 P 0.89 (w much area) 246.47 227.97 P (v) 53.86 217.97 T (arious FPGA implementations will require.) 58.13 217.97 T 0.87 (Second, VPR uses the Elmore delay model [Elmo48] to e) 53.86 202.97 P 0.87 (v) 268.47 202.97 P 0.87 (aluate) 272.74 202.97 P 0.24 (the speeds of circuits implemented in v) 53.86 192.97 P 0.24 (arious FPGA architectures.) 196.03 192.97 P 0.74 (Generally the delays calculated by VPR are within 9% of SPICE) 53.86 182.97 P 1.13 (delays [Betz98b, Betz99]. Also, delay results can be af) 53.86 172.97 P 1.13 (fected by) 259.87 172.97 P (our area model since it af) 53.86 162.97 T (fects wire lengths and transistor sizings.) 144.86 162.97 T 1.74 (Third, area and delay results are af) 53.86 147.97 P 1.74 (fected by the quality of the) 188.79 147.97 P 0.96 (placement and routing softw) 53.86 137.97 P 0.96 (are. The tools used for these e) 159.39 137.97 P 0.96 (xperi-) 272.74 137.97 P 0.66 (ments ha) 53.86 127.97 P 0.66 (v) 86.59 127.97 P 0.66 (e been sho) 90.95 127.97 P 0.66 (wn to produce high quality results [Betz98b,) 130.04 127.97 P 1.21 (Betz99], b) 53.86 117.97 P 1.21 (ut it is al) 92.39 117.97 P 1.21 (w) 127.19 117.97 P 1.21 (ays possible that the CAD softw) 133.6 117.97 P 1.21 (are does a) 255.83 117.97 P (better job for certain architectures o) 53.86 107.97 T (v) 182.43 107.97 T (er others.) 186.8 107.97 T 0.78 (W) 317.76 714 P 0.78 (e ha) 325.54 714 P 0.78 (v) 340.88 714 P 0.78 (e tak) 345.25 714 P 0.78 (en considerable care to minimize the ef) 363.18 714 P 0.78 (fects of these) 509.1 714 P 2.42 (potential sources of inaccuracies, and we belie) 317.76 704 P 2.42 (v) 499.27 704 P 2.42 (e that the our) 503.64 704 P (results are of high quality) 317.76 694 T (.) 409.17 694 T 0 10 Q (9. Conc) 317.76 677.33 T (lusions) 356.46 677.33 T 2 9 Q 1.88 (W) 317.76 663 P 1.88 (e presented a ne) 325.54 663 P 1.88 (w timing-dri) 388.69 663 P 1.88 (v) 435.61 663 P 1.88 (en packing algorithm, T) 439.97 663 P 1.88 (-VP) 531.29 663 P 1.88 (ack) 545.65 663 P 1.39 (and demonstrated that this algorithm pro) 317.76 653 P 1.39 (vides signi\336cant timing) 470.84 653 P -0.14 (and area impro) 317.76 643 P -0.14 (v) 371.32 643 P -0.14 (ements o) 375.68 643 P -0.14 (v) 407.65 643 P -0.14 (er the original VP) 412.02 643 P -0.14 (ack algorithm. Circuits) 475.69 643 P -0.17 (pack) 317.76 633 P -0.17 (ed with T) 334.67 633 P -0.17 (-VP) 368 633 P -0.17 (ack ha) 382.36 633 P -0.17 (v) 405.25 633 P -0.17 (e an area-delay product that is 20% better) 409.62 633 P 0.77 (than circuits pack) 317.76 623 P 0.77 (ed with VP) 382.71 623 P 0.77 (ack for clusters of size se) 424.62 623 P 0.77 (v) 518.98 623 P 0.77 (en to ten,) 523.35 623 P (and for lar) 317.76 613 T (ger cluster sizes the impro) 355.09 613 T (v) 449.43 613 T (ement is e) 453.8 613 T (v) 490.07 613 T (en greater) 494.43 613 T (.) 529.67 613 T 0.84 (Using the area-delay product e) 317.76 598 P 0.84 (v) 431.37 598 P 0.84 (aluation metric, we demonstrated) 435.64 598 P 0.23 (that clusters of size se) 317.76 588 P 0.23 (v) 397.46 588 P 0.23 (en to ten are the best size to use when con-) 401.83 588 P -0.18 (structing an FPGA. Compared to circuits implemented in an FPGA) 317.76 578 P 0.31 (with size one clusters, circuits implemented in an FPGA with size) 317.76 568 P 0.49 (se) 317.76 558 P 0.49 (v) 325.04 558 P 0.49 (en clusters ha) 329.4 558 P 0.49 (v) 379.18 558 P 0.49 (e 30% less delay \050a 43% increase in speed\051 and) 383.55 558 P 0.54 (use 8% less area, and circuits implemented in an FPGA with size) 317.76 548 P 1.11 (ten clusters ha) 317.76 538 P 1.11 (v) 371.3 538 P 1.11 (e 34% less delay \050a 52% increase in speed\051, and) 375.67 538 P 0.19 (require no additional area. The reason for this impro) 317.76 528 P 0.19 (v) 507.4 528 P 0.19 (ement in cir-) 511.76 528 P 2.12 (cuit speed at lar) 317.76 518 P 2.12 (ger cluster sizes is partly due to an increased) 380.7 518 P 0.08 (number of critical connections becoming local within clusters, and) 317.76 508 P 2.63 (partly due to a reduction in the \322logical\323 manhattan distance) 317.76 498 P (between BLEs.) 317.76 488 T 0 10 Q (10. Ref) 317.76 471.33 T (erences) 353.23 471.33 T 2 9 Q ([Alte98]) 317.76 457 T (Altera Inc.,) 360.96 457 T 1 F (Data Book) 403.95 457 T 2 F (, 1998.) 442.69 457 T ([Betz97a]) 317.76 444 T 0.6 (V) 360.96 444 P 0.6 (. Betz and J. Rose, \322Cluster) 366.3 444 P 0.6 (-Based Logic Blocks for) 468.11 444 P 1.03 (FPGAs: Area-Ef) 360.96 434 P 1.03 (\336cienc) 422.01 434 P 1.03 (y vs. Input Sharing and Size,) 445.87 434 P 1.03 (\323) 554.15 434 P 1 F 1.99 (IEEE Custom Inte) 360.96 424 P 1.99 (gr) 430.07 424 P 1.99 (ated Cir) 437.94 424 P 1.99 (cuits Confer) 469.35 424 P 1.99 (ence) 515.26 424 P 1.99 (,) 531.66 424 P 2 F 1.99 (Santa) 538.14 424 P (Clara, CA,) 360.96 414 T (1997, pp. 551-554.) 401.96 414 T ([Betz97b]) 317.76 401 T 1.44 (V) 360.96 401 P 1.44 (. Betz and J. Rose, \322VPR: A Ne) 366.3 401 P 1.44 (w P) 490.66 401 P 1.44 (acking, Place-) 505.71 401 P 2.51 (ment and Routing T) 360.96 391 P 2.51 (ool for FPGA Research,) 440.02 391 P 2.51 (\323) 533.89 391 P 1 F 2.51 (Int\325l) 542.64 391 P (W) 360.96 381 T (orkshop on FPL) 367.63 381 T 2 F (, 1997, pp. 213-222.) 426.13 381 T ([Betz98a]) 317.76 368 T 0.79 (V) 360.96 368 P 0.79 (.Betz and J. Rose, \322Ho) 366.3 368 P 0.79 (w Much Logic Should Go in) 450.96 368 P -0.12 (an FPGA Logic Block?,) 360.96 358 P -0.12 (\323) 446.95 358 P 1 F -0.12 (IEEE Design and T) 453.07 358 P -0.12 (est Ma) 522.11 358 P -0.12 (ga-) 546.15 358 P (zine) 360.96 348 T (,) 375.37 348 T 2 F (Spring 1998,) 379.87 348 T (pp. 10-15.) 428.63 348 T ([Betz98b]) 317.76 335 T 1.2 (V) 360.96 335 P 1.2 (. Betz, \322) 366.3 335 P 1.2 (Architecture and CAD for Speed and Area) 397.48 335 P 0.14 (Optimization of FPGAs,) 360.96 325 P 0.14 (\323) 448.86 325 P 1 F 0.14 (Ph. D. Dissertation,) 455.24 325 P 0.14 (Univer-) 530.15 325 P (sity of T) 360.96 315 T (or) 389.14 315 T (onto,) 396.74 315 T 2 F (1998.) 417.24 315 T ([Betz98c]) 317.76 302 T 2.25 (V) 360.96 302 P 2.25 (. Betz, \322VPR and VP) 366.3 302 P 2.25 (ack User\325) 451.17 302 P 2.25 (s Manual \050V) 487.65 302 P 2.25 (ersion) 536.15 302 P 2 (4.17\051,) 360.96 292 P 2 (\323 May 5, 1998. \050) 381.33 292 P 1 F 2 (A) 448.8 292 P 2 (vailable for download fr) 453.8 292 P 2 (om) 547.14 292 P (http://www) 360.96 282 T (.eecg) 400.31 282 T (.tor) 418.92 282 T (onto.edu/~vaughn/vpr/vpr) 431.26 282 T (.html\051.) 524.38 282 T 2 F ([Betz99]) 317.76 269 T 0.27 (V) 360.96 269 P 0.27 (. Betz, J. Rose, A. Marquardt,) 366.3 269 P 1 F 0.27 (Ar) 477.41 269 P 0.27 (c) 486.08 269 P 0.27 (hitectur) 489.94 269 P 0.27 (e and CAD) 517.6 269 P 1.12 (for Deep-Submicr) 360.96 259 P 1.12 (on FPGAs) 426.42 259 P 2 F 1.12 (, Kluwer Academic Pub-) 465.29 259 P (lishers, \050e) 360.96 249 T (xpected publication date: February 1999\051.) 395.82 249 T ([Bro) 317.76 236 T (w92]) 334.04 236 T 0.4 (S. Bro) 360.96 236 P 0.4 (wn, R. Francis, J. Rose, and Z. Vranesic,) 384.14 236 P 1 F 0.4 (F) 536.55 236 P 0.4 (ield-) 541.65 236 P 1.5 (Pr) 360.96 226 P 1.5 (o) 369.56 226 P 1.5 (gr) 373.97 226 P 1.5 (ammable Gate Arr) 381.83 226 P 1.5 (ays) 452.18 226 P 2 F 1.5 (, Kluwer Academic Pub-) 464.18 226 P (lishers, 1992.) 360.96 216 T ([Bro) 317.76 203 T (w96]) 334.04 203 T 1.46 (S. Bro) 360.96 203 P 1.46 (wn and J. Rose, \322FPGA and CPLD Architec-) 385.2 203 P 0.46 (tures: A T) 360.96 193 P 0.46 (utorial,) 397.96 193 P 0.46 (\323) 423.08 193 P 1 F 0.46 (IEEE Design & T) 429.78 193 P 0.46 (est of Computer) 494.07 193 P 0.46 (s,) 552.39 193 P 2 F (Summer 1996, pp. 42-57.) 360.96 183 T ([Cong94]) 317.76 170 T 0.06 (J. Cong and Y) 360.96 170 P 0.06 (. Ding, \322Flo) 411.47 170 P 0.06 (wmap: An Optimal T) 454.36 170 P 0.06 (echnol-) 531.15 170 P 2.28 (ogy Mapping Algorithm for Delay Optimization in) 360.96 160 P 0.36 (Lookup-T) 360.96 150 P 0.36 (able Based FPGA Designs,) 396.74 150 P 0.36 (\323) 495.19 150 P 1 F 0.36 (IEEE T) 501.8 150 P 0.36 (r) 528.41 150 P 0.36 (ans. on) 531.78 150 P (CAD,) 360.96 140 T 2 F ( Jan. 1994, pp 1-12.) 381.21 140 T ([Elmo48]) 317.76 127 T 1.48 (W) 360.96 127 P 1.48 (. C. Elmore, \322The T) 368.63 127 P 1.48 (ransient Response of Damped) 445.97 127 P 0.83 (Linear Netw) 360.96 117 P 0.83 (orks with P) 406.94 117 P 0.83 (articular Re) 449.47 117 P 0.83 (g) 492.4 117 P 0.83 (ard to W) 496.86 117 P 0.83 (ideband) 529.65 117 P -0.08 (Ampli\336ers,) 360.96 107 P -0.08 (\323) 401.09 107 P 1 F -0.08 (J) 407.26 107 P -0.08 (. Applied Physics) 411.03 107 P 2 F -0.08 (, V) 473.12 107 P -0.08 (ol. 19, January 1948,) 482.88 107 P (pp. 55-63.) 360.96 97 T ([Fran92]) 317.76 84 T 1.82 (J. Frankle, \322Iterati) 360.96 84 P 1.82 (v) 429.87 84 P 1.82 (e and Adapti) 434.23 84 P 1.82 (v) 483.64 84 P 1.82 (e Slack Allocation) 488.01 84 P 53.86 81 294.24 720 C 53.86 518.76 294.24 720 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 50 50 410 302 216 151.2 81.77 566.65 FMBEGINEPSF %%BeginDocument: %!PS-Adobe-2.0 EPSF-2.0 %%Title: PSDAT/CritPathComp.ps %%Creator: gnuplot 3.5 (pre 3.6) patchlevel beta 347 %%CreationDate: Mon Sep 28 14:21:32 1998 %%DocumentFonts: (atend) %%BoundingBox: 50 50 410 302 %%Orientation: Portrait %%EndComments /gnudict 120 dict def gnudict begin /Color false def /Solid false def /gnulinewidth 5.000 def /userlinewidth gnulinewidth def /vshift -80 def /dl {10 mul} def /hpt_ 31.5 def /vpt_ 31.5 def /hpt hpt_ def /vpt vpt_ def /M {moveto} bind def /L {lineto} bind def /R {rmoveto} bind def /V {rlineto} bind def /vpt2 vpt 2 mul def /hpt2 hpt 2 mul def /Lshow { currentpoint stroke M 0 vshift R show } def /Rshow { currentpoint stroke M dup stringwidth pop neg vshift R show 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/D11 { gsave translate 45 rotate 0 0 S11 stroke grestore } bind def /D12 { gsave translate 45 rotate 0 0 S12 stroke grestore } bind def /D13 { gsave translate 45 rotate 0 0 S13 stroke grestore } bind def /D14 { gsave translate 45 rotate 0 0 S14 stroke grestore } bind def /D15 { gsave translate 45 rotate 0 0 S15 stroke grestore } bind def /DiaE { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke } def /BoxE { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke } def /TriUE { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke } def /TriDE { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke } def /PentE { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore } def /CircE { stroke [] 0 setdash hpt 0 360 arc stroke } def /Opaque { gsave closepath 1 setgray fill grestore 0 setgray closepath } def /DiaW { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V Opaque stroke } def /BoxW { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V Opaque stroke } def /TriUW { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V Opaque stroke } def /TriDW { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V Opaque stroke } def /PentW { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat Opaque stroke grestore } def /CircW { stroke [] 0 setdash hpt 0 360 arc Opaque stroke } def /BoxFill { gsave Rec 1 setgray fill grestore } def end %%EndProlog gnudict begin gsave 50 50 translate 0.050 0.050 scale 0 setgray newpath (Times-Roman) findfont 240 scalefont setfont 1.000 UL LTb 1008 480 M 63 0 V 5841 0 R -63 0 V 864 480 M (0) Rshow 1008 1090 M 63 0 V 5841 0 R -63 0 V -5985 0 R (1e-08) Rshow 1008 1701 M 63 0 V 5841 0 R -63 0 V -5985 0 R (2e-08) Rshow 1008 2311 M 63 0 V 5841 0 R -63 0 V -5985 0 R (3e-08) Rshow 1008 2921 M 63 0 V 5841 0 R -63 0 V -5985 0 R (4e-08) Rshow 1008 3531 M 63 0 V 5841 0 R -63 0 V -5985 0 R (5e-08) Rshow 1008 4142 M 63 0 V 5841 0 R -63 0 V -5985 0 R (6e-08) Rshow 1008 4752 M 63 0 V 5841 0 R -63 0 V -5985 0 R (7e-08) Rshow 1008 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (0) Cshow 1598 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (2) Cshow 2189 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (4) Cshow 2779 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (6) Cshow 3370 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (8) Cshow 3960 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (10) Cshow 4550 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (12) Cshow 5141 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (14) Cshow 5731 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (16) Cshow 6322 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (18) Cshow 6912 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (20) Cshow 1.000 UL LTb 1008 480 M 5904 0 V 0 4272 V -5904 0 V 0 -4272 V 1.000 UP 1.000 UL LT0 5841 1143 M (Regular Transistor Size ) Rshow 5985 1143 M 639 0 V 1303 3477 M 295 -153 V 296 -439 V 295 -129 V 295 -42 V 295 -55 V 295 -86 V 296 -49 V 295 -36 V 295 -37 V 295 6 V 295 13 V 296 -68 V 295 -18 V 295 6 V 295 0 V 295 -49 V 296 -18 V 295 -12 V 295 12 V 1303 3477 Pls 1598 3324 Pls 1894 2885 Pls 2189 2756 Pls 2484 2714 Pls 2779 2659 Pls 3074 2573 Pls 3370 2524 Pls 3665 2488 Pls 3960 2451 Pls 4255 2457 Pls 4550 2470 Pls 4846 2402 Pls 5141 2384 Pls 5436 2390 Pls 5731 2390 Pls 6026 2341 Pls 6322 2323 Pls 6617 2311 Pls 6912 2323 Pls 6304 1143 Pls 1.000 UP 1.000 UL LT1 5841 903 M (Half Transistor Size ) Rshow 5985 903 M 639 0 V 1303 4715 M 295 -524 V 296 -599 V 295 -238 V 295 -79 V 295 -18 V 295 -195 V 296 -86 V 295 -6 V 295 -92 V 295 -55 V 295 -30 V 296 -12 V 295 -67 V 295 -19 V 295 -18 V 295 -24 V 296 -55 V 295 -55 V 295 42 V 1303 4715 Crs 1598 4191 Crs 1894 3592 Crs 2189 3354 Crs 2484 3275 Crs 2779 3257 Crs 3074 3062 Crs 3370 2976 Crs 3665 2970 Crs 3960 2878 Crs 4255 2823 Crs 4550 2793 Crs 4846 2781 Crs 5141 2714 Crs 5436 2695 Crs 5731 2677 Crs 6026 2653 Crs 6322 2598 Crs 6617 2543 Crs 6912 2585 Crs 6304 903 Crs 1.000 UP 1.000 UL LT2 5841 663 M (Double Transistor Size ) Rshow 5985 663 M 639 0 V 1303 3074 M 295 -116 V 296 -360 V 295 -98 V 295 -49 V 295 -18 V 295 -31 V 296 -67 V 295 -24 V 295 -12 V 295 12 V 295 12 V 296 -43 V 295 -12 V 295 6 V 295 -12 V 295 -18 V 296 -6 V 295 -13 V 295 7 V 1303 3074 Star 1598 2958 Star 1894 2598 Star 2189 2500 Star 2484 2451 Star 2779 2433 Star 3074 2402 Star 3370 2335 Star 3665 2311 Star 3960 2299 Star 4255 2311 Star 4550 2323 Star 4846 2280 Star 5141 2268 Star 5436 2274 Star 5731 2262 Star 6026 2244 Star 6322 2238 Star 6617 2225 Star 6912 2232 Star 6304 663 Star stroke grestore end showpage %%Trailer %%DocumentFonts: Times-Roman %%EndDocument FMENDEPSF 4 9 Q 0 X 0 0 0 1 0 0 0 K (Figure 16. Critical Path Delay vs. Cluster Size for Various) 64.53 537.3 T (Transistor Sizings) 142.14 526.3 T 2 F (Cluster Size) 178.45 557.11 T 59.84 568.29 79.67 719.12 R (Critical P) 0 -270 65.84 585.66 TF (ath Delay \050In Seconds,) 0 -270 65.84 619.78 TF (Geometric A) 0 -270 75.84 576.2 TF (v) 0 -270 75.84 622.27 TF (erage Ov) 0 -270 75.84 626.63 TF (er 25 Circuits\051) 0 -270 75.84 659.23 TF 59.84 568.29 79.67 719.12 R 53.86 81 294.24 720 C 0 0 612 792 C 53.86 81 294.24 720 C 53.86 310.97 294.24 518.76 C 0 0 0 1 0 0 0 K 0 0 0 1 0 0 0 K 0 50 50 410 302 216 151.2 78.2 366.46 FMBEGINEPSF %%BeginDocument: %!PS-Adobe-2.0 EPSF-2.0 %%Title: PSDAT/AreaDelayProd.ps %%Creator: gnuplot 3.5 (pre 3.6) patchlevel beta 347 %%CreationDate: Mon Sep 28 14:21:48 1998 %%DocumentFonts: (atend) %%BoundingBox: 50 50 410 302 %%Orientation: Portrait %%EndComments /gnudict 120 dict def gnudict begin /Color false def /Solid false def /gnulinewidth 5.000 def /userlinewidth gnulinewidth def /vshift -80 def /dl {10 mul} def /hpt_ 31.5 def /vpt_ 31.5 def /hpt hpt_ def /vpt vpt_ def /M {moveto} bind def /L {lineto} bind def /R {rmoveto} bind def /V {rlineto} bind def /vpt2 vpt 2 mul def /hpt2 hpt 2 mul def /Lshow { currentpoint stroke M 0 vshift R show } def /Rshow { currentpoint stroke M dup stringwidth pop neg vshift R show } def /Cshow { currentpoint stroke M dup stringwidth pop -2 div vshift R show } def /UP { dup vpt_ mul /vpt exch def hpt_ mul /hpt exch def /hpt2 hpt 2 mul def /vpt2 vpt 2 mul def } def /DL { Color {setrgbcolor Solid {pop []} if 0 setdash } {pop pop pop Solid {pop []} if 0 setdash} ifelse } def /BL { stroke gnulinewidth 2 mul setlinewidth } def /AL { stroke gnulinewidth 2 div setlinewidth } def /UL { gnulinewidth mul /userlinewidth exch def } def /PL { stroke userlinewidth setlinewidth } def /LTb { BL [] 0 0 0 DL } def /LTa { AL [1 dl 2 dl] 0 setdash 0 0 0 setrgbcolor } def /LT0 { PL [] 1 0 0 DL } def /LT1 { PL [4 dl 2 dl] 0 1 0 DL } def /LT2 { PL [2 dl 3 dl] 0 0 1 DL } def /LT3 { PL [1 dl 1.5 dl] 1 0 1 DL } def /LT4 { PL [5 dl 2 dl 1 dl 2 dl] 0 1 1 DL } def /LT5 { PL [4 dl 3 dl 1 dl 3 dl] 1 1 0 DL } def /LT6 { PL [2 dl 2 dl 2 dl 4 dl] 0 0 0 DL } def /LT7 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 1 0.3 0 DL } def /LT8 { PL [2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 2 dl 4 dl] 0.5 0.5 0.5 DL } def /Pnt { stroke [] 0 setdash gsave 1 setlinecap M 0 0 V stroke grestore } def /Dia { stroke [] 0 setdash 2 copy vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke Pnt } def /Pls { stroke [] 0 setdash vpt sub M 0 vpt2 V currentpoint stroke M hpt neg vpt neg R hpt2 0 V stroke } def /Box { stroke [] 0 setdash 2 copy exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke Pnt } def /Crs { stroke [] 0 setdash exch hpt sub exch vpt add M hpt2 vpt2 neg V currentpoint stroke M hpt2 neg 0 R hpt2 vpt2 V stroke } def /TriU { stroke [] 0 setdash 2 copy vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke Pnt } def /Star { 2 copy Pls Crs } def /BoxF { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath fill } def /TriUF { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath fill } def /TriD { stroke [] 0 setdash 2 copy vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke Pnt } def /TriDF { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath fill} def /DiaF { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath fill } def /Pent { stroke [] 0 setdash 2 copy gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore Pnt } def /PentF { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath fill grestore } def /Circle { stroke [] 0 setdash 2 copy hpt 0 360 arc stroke Pnt } def /CircleF { stroke [] 0 setdash hpt 0 360 arc fill } def /C0 { BL [] 0 setdash 2 copy moveto vpt 90 450 arc } bind def /C1 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill vpt 0 360 arc closepath } bind def /C2 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C3 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill vpt 0 360 arc closepath } bind def /C4 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc closepath } bind def /C5 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc 2 copy moveto 2 copy vpt 180 270 arc closepath fill vpt 0 360 arc } bind def /C6 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 270 arc closepath fill vpt 0 360 arc closepath } bind def /C7 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 270 arc closepath fill vpt 0 360 arc closepath } bind def /C8 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C9 { BL [] 0 setdash 2 copy moveto 2 copy vpt 270 450 arc closepath fill vpt 0 360 arc closepath } bind def /C10 { BL [] 0 setdash 2 copy 2 copy moveto vpt 270 360 arc closepath fill 2 copy moveto 2 copy vpt 90 180 arc closepath fill vpt 0 360 arc closepath } bind def /C11 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 180 arc closepath fill 2 copy moveto 2 copy vpt 270 360 arc closepath fill vpt 0 360 arc closepath } bind def /C12 { BL [] 0 setdash 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C13 { BL [] 0 setdash 2 copy moveto 2 copy vpt 0 90 arc closepath fill 2 copy moveto 2 copy vpt 180 360 arc closepath fill vpt 0 360 arc closepath } bind def /C14 { BL [] 0 setdash 2 copy moveto 2 copy vpt 90 360 arc closepath fill vpt 0 360 arc } bind def /C15 { BL [] 0 setdash 2 copy vpt 0 360 arc closepath fill vpt 0 360 arc closepath } bind def /Rec { newpath 4 2 roll moveto 1 index 0 rlineto 0 exch rlineto neg 0 rlineto closepath } bind def /Square { dup Rec } bind def /Bsquare { vpt sub exch vpt sub exch vpt2 Square } bind def /S0 { BL [] 0 setdash 2 copy moveto 0 vpt rlineto BL Bsquare } bind def /S1 { BL [] 0 setdash 2 copy vpt Square fill Bsquare } bind def /S2 { BL [] 0 setdash 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S3 { BL [] 0 setdash 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S4 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S5 { BL [] 0 setdash 2 copy 2 copy vpt Square fill exch vpt sub exch vpt sub vpt Square fill Bsquare } bind def /S6 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill Bsquare } bind def /S7 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt vpt2 Rec fill 2 copy vpt Square fill Bsquare } bind def /S8 { BL [] 0 setdash 2 copy vpt sub vpt Square fill Bsquare } bind def /S9 { BL [] 0 setdash 2 copy vpt sub vpt vpt2 Rec fill Bsquare } bind def /S10 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S11 { BL [] 0 setdash 2 copy vpt sub vpt Square fill 2 copy exch vpt sub exch vpt2 vpt Rec fill Bsquare } bind def /S12 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill Bsquare } bind def /S13 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy vpt Square fill Bsquare } bind def /S14 { BL [] 0 setdash 2 copy exch vpt sub exch vpt sub vpt2 vpt Rec fill 2 copy exch vpt sub exch vpt Square fill Bsquare } bind def /S15 { BL [] 0 setdash 2 copy Bsquare fill Bsquare } bind def /D0 { gsave translate 45 rotate 0 0 S0 stroke grestore } bind def /D1 { gsave translate 45 rotate 0 0 S1 stroke grestore } bind def /D2 { gsave translate 45 rotate 0 0 S2 stroke grestore } bind def /D3 { gsave translate 45 rotate 0 0 S3 stroke grestore } bind def /D4 { gsave translate 45 rotate 0 0 S4 stroke grestore } bind def /D5 { gsave translate 45 rotate 0 0 S5 stroke grestore } bind def /D6 { gsave translate 45 rotate 0 0 S6 stroke grestore } bind def /D7 { gsave translate 45 rotate 0 0 S7 stroke grestore } bind def /D8 { gsave translate 45 rotate 0 0 S8 stroke grestore } bind def /D9 { gsave translate 45 rotate 0 0 S9 stroke grestore } bind def /D10 { gsave translate 45 rotate 0 0 S10 stroke grestore } bind def /D11 { gsave translate 45 rotate 0 0 S11 stroke grestore } bind def /D12 { gsave translate 45 rotate 0 0 S12 stroke grestore } bind def /D13 { gsave translate 45 rotate 0 0 S13 stroke grestore } bind def /D14 { gsave translate 45 rotate 0 0 S14 stroke grestore } bind def /D15 { gsave translate 45 rotate 0 0 S15 stroke grestore } bind def /DiaE { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V closepath stroke } def /BoxE { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V closepath stroke } def /TriUE { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V closepath stroke } def /TriDE { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V closepath stroke } def /PentE { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat closepath stroke grestore } def /CircE { stroke [] 0 setdash hpt 0 360 arc stroke } def /Opaque { gsave closepath 1 setgray fill grestore 0 setgray closepath } def /DiaW { stroke [] 0 setdash vpt add M hpt neg vpt neg V hpt vpt neg V hpt vpt V hpt neg vpt V Opaque stroke } def /BoxW { stroke [] 0 setdash exch hpt sub exch vpt add M 0 vpt2 neg V hpt2 0 V 0 vpt2 V hpt2 neg 0 V Opaque stroke } def /TriUW { stroke [] 0 setdash vpt 1.12 mul add M hpt neg vpt -1.62 mul V hpt 2 mul 0 V hpt neg vpt 1.62 mul V Opaque stroke } def /TriDW { stroke [] 0 setdash vpt 1.12 mul sub M hpt neg vpt 1.62 mul V hpt 2 mul 0 V hpt neg vpt -1.62 mul V Opaque stroke } def /PentW { stroke [] 0 setdash gsave translate 0 hpt M 4 {72 rotate 0 hpt L} repeat Opaque stroke grestore } def /CircW { stroke [] 0 setdash hpt 0 360 arc Opaque stroke } def /BoxFill { gsave Rec 1 setgray fill grestore } def end %%EndProlog gnudict begin gsave 50 50 translate 0.050 0.050 scale 0 setgray newpath (Times-Roman) findfont 240 scalefont setfont 1.000 UL LTb 864 480 M 63 0 V 5985 0 R -63 0 V 720 480 M (0) Rshow 864 1192 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.05) Rshow 864 1904 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.1) Rshow 864 2616 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.15) Rshow 864 3328 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.2) Rshow 864 4040 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.25) Rshow 864 4752 M 63 0 V 5985 0 R -63 0 V -6129 0 R (0.3) Rshow 864 480 M 0 63 V 0 4209 R 0 -63 V 864 240 M (0) Cshow 1469 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (2) Cshow 2074 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (4) Cshow 2678 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (6) Cshow 3283 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (8) Cshow 3888 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (10) Cshow 4493 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (12) Cshow 5098 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (14) Cshow 5702 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (16) Cshow 6307 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (18) Cshow 6912 480 M 0 63 V 0 4209 R 0 -63 V 0 -4449 R (20) Cshow 1.000 UL LTb 864 480 M 6048 0 V 0 4272 V -6048 0 V 864 480 L 1.000 UP 1.000 UL LT0 5841 1143 M (Regular Trans Size) Rshow 5985 1143 M 639 0 V 1166 3826 M 303 -99 V 302 -755 V 303 -128 V 302 -71 V 302 -15 V 303 -128 V 302 14 V 303 15 V 302 28 V 302 86 V 303 99 V 302 -57 V 303 29 V 302 43 V 302 71 V 303 -57 V 302 43 V 303 14 V 302 128 V 1166 3826 Pls 1469 3727 Pls 1771 2972 Pls 2074 2844 Pls 2376 2773 Pls 2678 2758 Pls 2981 2630 Pls 3283 2644 Pls 3586 2659 Pls 3888 2687 Pls 4190 2773 Pls 4493 2872 Pls 4795 2815 Pls 5098 2844 Pls 5400 2887 Pls 5702 2958 Pls 6005 2901 Pls 6307 2944 Pls 6610 2958 Pls 6912 3086 Pls 6304 1143 Pls 1.000 UP 1.000 UL LT1 5841 903 M (Half Trans Size) Rshow 5985 903 M 639 0 V 1166 4695 M 303 -342 V 302 -954 V 303 -242 V 302 -114 V 302 14 V 303 -227 V 302 -15 V 303 57 V 302 -85 V 302 28 V 303 43 V 302 14 V 303 -28 V 302 28 V 302 43 V 303 -28 V 302 14 V 303 -43 V 302 157 V 1166 4695 Crs 1469 4353 Crs 1771 3399 Crs 2074 3157 Crs 2376 3043 Crs 2678 3057 Crs 2981 2830 Crs 3283 2815 Crs 3586 2872 Crs 3888 2787 Crs 4190 2815 Crs 4493 2858 Crs 4795 2872 Crs 5098 2844 Crs 5400 2872 Crs 5702 2915 Crs 6005 2887 Crs 6307 2901 Crs 6610 2858 Crs 6912 3015 Crs 6304 903 Crs 1.000 UP 1.000 UL LT2 5841 663 M (Double Trans Size) Rshow 5985 663 M 639 0 V 1166 3812 M 303 -43 V 302 -569 V 303 -114 V 302 -57 V 302 14 V 303 -57 V 302 -28 V 303 42 V 302 15 V 302 128 V 303 100 V 302 -15 V 303 43 V 302 57 V 302 71 V 303 -14 V 302 71 V 303 14 V 302 114 V 1166 3812 Star 1469 3769 Star 1771 3200 Star 2074 3086 Star 2376 3029 Star 2678 3043 Star 2981 2986 Star 3283 2958 Star 3586 3000 Star 3888 3015 Star 4190 3143 Star 4493 3243 Star 4795 3228 Star 5098 3271 Star 5400 3328 Star 5702 3399 Star 6005 3385 Star 6307 3456 Star 6610 3470 Star 6912 3584 Star 6304 663 Star stroke grestore end showpage %%Trailer %%DocumentFonts: Times-Roman %%EndDocument FMENDEPSF 4 9 Q 0 X 0 0 0 1 0 0 0 K (Figure 17. Area-Delay Product vs. Cluster Size for Various) 55.77 335.35 T (Transistor Sizings) 135 324.35 T 2 F (Cluster Size) 173.45 355.16 T 56.27 366.34 76.1 517.17 R (Area-Delay Product) 0 -270 62.27 405.64 TF (\050Geometric A) 0 -270 72.27 372.74 TF (v) 0 -270 72.27 421.81 TF (erage Ov) 0 -270 72.27 426.17 TF (er 25 Circuits\051) 0 -270 72.27 458.77 TF 56.27 366.34 76.1 517.17 R 53.86 81 294.24 720 C 0 0 612 792 C 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "9" 9 %%Page: "10" 10 612 792 0 FMBEGINPAGE [0 0 0 1 0 0 0] [ 0 1 1 0 1 0 0] [ 1 0 1 0 0 1 0] [ 1 1 0 0 0 0 1] [ 1 0 0 0 0 1 1] [ 0 1 0 0 1 0 1] [ 0 0 1 0 1 1 0] 7 FrameSetSepColors FrameNoSep 0 0 0 1 0 0 0 K 2 9 Q 0 X 0 0 0 1 0 0 0 K 1.14 (for Performance-Dri) 97.06 714 P 1.14 (v) 171.69 714 P 1.14 (en Layout and FPGA Routing,) 176.06 714 P 1.14 (\323) 290.24 714 P (D) 97.06 704 T (A) 103.2 704 T (C, 1992, pp. 536 - 542.) 109.33 704 T ([Gall98]) 53.86 691 T 1.47 (D. Gallo) 97.06 691 P 1.47 (w) 129.3 691 P 1.47 (ay) 135.71 691 P 1.47 (, \322Implementation of Grayscale Con) 143.62 691 P 1.47 (v) 279.88 691 P 1.47 (er-) 284.25 691 P 1.19 (sion for V) 97.06 681 P 1.19 (ideo Image Processing on the T) 135.39 681 P 1.19 (ransmogri-) 254.74 681 P (\336er) 97.06 671 T (-2a,) 108.88 671 T (\323) 121.99 671 T 1 F (P) 128.23 671 T (er) 133.01 671 T (sonal Communication.) 140.42 671 T 2 F ([Hame98]) 53.86 658 T -0.05 (I. Hamer) 97.06 658 P -0.05 (, \322Implementation of DES on the T) 128.63 658 P -0.05 (ransmogri-) 254.74 658 P (\336er) 97.06 648 T (-2a,) 108.88 648 T (\323) 121.99 648 T 1 F ( P) 125.98 648 T (er) 133.01 648 T (sonal Communication.) 140.42 648 T 2 F ([Hitc83]) 53.86 635 T -0.16 (R. Hitchcock, G. Smith and D. Cheng, \322T) 97.06 635 P -0.16 (iming Analy-) 246.14 635 P 0.51 (sis of Computer) 97.06 625 P 0.51 (-Hardw) 155.4 625 P 0.51 (are,) 182.8 625 P 0.51 (\323) 195.41 625 P 1 F 0.51 (IBM J) 202.16 625 P 0.51 (ournal of Resear) 224.69 625 P 0.51 (c) 285.88 625 P 0.51 (h) 289.74 625 P (and De) 97.06 615 T (velopment,) 123.17 615 T 2 F ( Jan. 1983, pp. 100 - 105.) 162.41 615 T ([Le) 53.86 602 T (v) 66.12 602 T (e98]) 70.49 602 T 1.96 (P) 97.06 602 P 1.96 (. Le) 101.06 602 P 1.96 (v) 116.79 602 P 1.96 (entis, \322Using edif2blif V) 121.15 602 P 1.96 (ersion 1.0,) 215.01 602 P 1.96 (\323 June 30,) 254.08 602 P 8.81 (1998. \050) 97.06 592 P 1 F 8.81 (A) 131.37 592 P 8.81 (vailable for download fr) 136.37 592 P 8.81 (om http://) 250.17 592 P (www) 97.06 582 T (.eecg) 114.4 582 T (.tor) 133 582 T (onto.edu/~le) 145.35 582 T (venti/edif2blif/) 190.33 582 T (edif2blif) 97.06 572 T (.html) 126.93 572 T 2 F (\051.) 145.18 572 T ([Luce98]) 53.86 559 T (Lucent T) 97.06 559 T (echnologies,) 129.17 559 T 1 F ( FPGA Data Book) 174.41 559 T 2 F (, 1998) 240.65 559 T ([Meta92]) 53.86 546 T (Meta-Softw) 97.06 546 T (are,) 139.96 546 T 1 F (Hspice User\325) 155.45 546 T (s Manual) 202.83 546 T 2 F (, 1992.) 236.58 546 T ([P) 53.86 533 T (adi98]) 61.72 533 T 0.62 (K. P) 97.06 533 P 0.62 (adalia, \322Implementation of Grayscale Con) 113.54 533 P 0.62 (v) 267.88 533 P 0.62 (ersion) 272.24 533 P -0.06 (for V) 97.06 523 P -0.06 (ideo Image Processing on the T) 115.7 523 P -0.06 (ransmogri\336er) 228.82 523 P -0.06 (-2a,) 277.13 523 P -0.06 (\323) 290.24 523 P 1 F (P) 97.06 513 T (er) 101.84 513 T (sonal Communication.) 109.24 513 T 2 F ([Rose90]) 53.86 500 T 0.64 (J. Rose, R. J. Francis, D. Le) 97.06 500 P 0.64 (wis and P) 201.2 500 P 0.64 (. Cho) 236.49 500 P 0.64 (w) 256.41 500 P 0.64 (, \322) 262.33 500 P 0.64 (Archi-) 270.75 500 P 1.32 (tecture of Programmable Gate Arrays: The Ef) 97.06 490 P 1.32 (fect of) 269.68 490 P 0.92 (Logic Block Functionality on Area Ef) 97.06 480 P 0.92 (\336cienc) 238.18 480 P 0.92 (y) 262.04 480 P 0.92 (,) 265.95 480 P 0.92 (\323) 267.57 480 P 1 F 0.92 (IEEE) 274.74 480 P 0.78 (J) 97.06 470 P 0.78 (ournal of Solid State Cir) 100.83 470 P 0.78 (cuits,) 192.11 470 P 2 F 0.78 ( Oct. 1990, pp. 1217 -) 211.37 470 P (1225.) 97.06 460 T ([Rose91]) 53.86 447 T 0.79 (J. Rose and S. Bro) 97.06 447 P 0.79 (wn. \322Fle) 166.51 447 P 0.79 (xibility of Interconnection) 198.16 447 P 4.9 (Structures for Field-Programmable Gate Arrays,) 97.06 437 P 4.9 (\323) 290.24 437 P 1 F (JSSC) 97.06 427 T 2 F (, March 1991, pp. 277 - 282.) 116.06 427 T ([Rose93]) 317.76 714 T 0.51 (J. Rose, A. El Gamal and A. Sangio) 360.96 714 P 0.51 (v) 493.67 714 P 0.51 (anni-V) 497.94 714 P 0.51 (incentelli,) 522.39 714 P 2.71 (\322) 360.96 704 P 2.71 (Architecture of Field-Programmable Gate Arrays,) 364.24 704 P 2.71 (\323) 554.15 704 P 1 F -0.2 (Pr) 360.96 694 P -0.2 (oceedings IEEE,) 369.56 694 P 2 F -0.2 ( v) 429.35 694 P -0.2 (ol. 81, no. 7, July 1993, pp. 1013 -) 435.72 694 P (1029.) 360.96 684 T ([Sent92]) 317.76 671 T 0.76 (E. M. Sento) 360.96 671 P 0.76 (vich et al, \322SIS: A System for Sequential) 405.35 671 P -0.2 (Circuit Analysis,) 360.96 661 P -0.2 (\323) 421.13 661 P 1 F -0.2 (T) 427.17 661 P -0.2 (ec) 431.35 661 P -0.2 (h. Report No. UCB/ERL M92/41,) 439.21 661 P 2 F (Uni) 360.96 651 T (v) 374.24 651 T (ersity of California, Berk) 378.6 651 T (ele) 469 651 T (y) 479.36 651 T (, 1992.) 483.27 651 T ([Sw) 317.76 638 T (ar98]) 332.17 638 T 1.42 (J. Sw) 360.96 638 P 1.42 (artz, V) 381.8 638 P 1.42 (. Betz and J. Rose, \322) 406.55 638 P 1.42 (A F) 485.93 638 P 1.42 (ast Routability-) 500.96 638 P 1.77 (Dri) 360.96 628 P 1.77 (v) 372.74 628 P 1.77 (en Router for FPGAs,) 377.1 628 P 1.77 (\323) 460.79 628 P 1 F 1.77 (FPGA) 468.8 628 P 2 F 1.77 (, 1998, pp. 140 -) 491.8 628 P (149.) 360.96 618 T ([V) 317.76 605 T (ant98]) 326.26 605 T 1.84 (V) 360.96 605 P 1.84 (antis Corporation, \322VF1 Field Programmable Gate) 366.46 605 P (Array) 360.96 595 T (,) 381.37 595 T (\323) 382.99 595 T 1 F (Pr) 389.23 595 T (eliminary Data Sheet) 397.9 595 T 2 F (, 1998.) 474.39 595 T ([W) 317.76 582 T (est93]) 328.54 582 T -0.01 (N. W) 360.96 582 P -0.01 (este and K Eshraghian,) 379.73 582 P 1 F -0.01 (Principles of CMOS VLSI) 464.92 582 P 0.96 (Design; A System P) 360.96 572 P 0.96 (er) 434.37 572 P 0.96 (spective; Second Edition, Addi-) 441.77 572 P (son W) 360.96 562 T (esle) 382.38 562 T (y) 396.11 562 T 2 F (, 1993.) 399.52 562 T ([Xili94]) 317.76 549 T 3.03 (Xilinx Inc.,) 360.96 549 P 1 F 3.03 (The Pr) 410.51 549 P 3.03 (o) 437.89 549 P 3.03 (gr) 442.3 549 P 3.03 (ammable Lo) 450.16 549 P 3.03 (gic Data Book) 497.85 549 P 2 F 3.03 (,) 555.89 549 P (1994.) 360.96 539 T ([Xili97]) 317.76 526 T 0.99 (Xilinx Inc., \322XC5200 Series of FPGAs\323,) 360.96 526 P 1 F 0.99 (Data Book) 516.15 526 P 2 F 0.99 (,) 555.89 526 P (1997.) 360.96 516 T ([Xili98]) 317.76 503 T 1.41 (Xilinx Inc., \322V) 360.96 503 P 1.41 (irte) 417.24 503 P 1.41 (x 2.5 V Field Programmable Gate) 429.1 503 P (Arrays\323,) 360.96 493 T 1 F (Advance Pr) 393.95 493 T (oduct Data Sheet) 435.78 493 T 2 F (, 1998.) 497.77 493 T ([Y) 317.76 480 T (ang91]) 326.36 480 T 1.6 (S. Y) 360.96 480 P 1.6 (ang, \322Logic Synthesis and Optimization Bench-) 377.66 480 P 2.16 (marks, V) 360.96 470 P 2.16 (ersion 3.0,) 395.12 470 P 2.16 (\323) 434.4 470 P 1 F 2.16 (T) 442.8 470 P 2.16 (ec) 446.98 470 P 2.16 (h. Report,) 454.84 470 P 2 F 2.16 (Microelectronics) 497.16 470 P (Center of North Carolina, 1991.) 360.96 460 T ([Y) 317.76 447 T (e98]) 326.36 447 T 3.11 (A. Y) 360.96 447 P 3.11 (e, \322Procedural T) 380.66 447 P 3.11 (e) 445.47 447 P 3.11 (xture Mapping on FPGAs\323,) 449.33 447 P 1 F (M.A.Sc. Thesis, in Pr) 360.96 437 T (epar) 436.88 437 T (ation) 453.24 437 T 2 F (, 1998.) 471.74 437 T 0 0 0 1 0 0 0 K FMENDPAGE %%EndPage: "10" 10 %%Trailer %%BoundingBox: 0 0 612 792 %%PageOrder: Ascend %%Pages: 10 %%DocumentFonts: Helvetica-Bold %%+ Times-Italic %%+ Times-Roman %%+ Symbol %%+ Times-Bold %%+ Helvetica-Oblique %%EOF