I highly recommend you take the newest version of VPR from Verilog to Routing Download rather than one of these older ones. These versions are still available only as a convenience to those looking to reproduce older VPR results, use older netlist formats, etc.

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Software


Read the README file for Version 4.30 of VPR and T-VPack

Unix-friendly format: gzipped tarfile.
Download the VPR and T-VPack (Version 4.30). This version of VPR and T-VPack includes timing-driven placement and timing-driven packing (clustering). Kudos to Alexander (Sandy) Marquardt for making these enhancements to VPR.
This is the first version of T-VPack / VPR where the whole CAD flow was been timing-driven, from clustering to routing.

Windows-friendly format: .zip file
The exact same VPR and T-VPack Version 4.30 files -- just in a different archive format.

Uncompressed format: .tar file
The exact same VPR and T-VPack Version 4.30 files -- just in a different archive format. This format will take longer to download, but may be helpful if .gz files confuse your browser.

Download older (than 4.30) versions of VPR


Benchmark Circuits for Routing or Placement and Routing

Download the .net format netlists of the twenty large MCNC circuits used as benchmarks in the FPGA challenge.

Download the placements produced by VPR for the twenty large circuits above.

Download the technology-mapped .blif format netlists of the twenty large MCNC circuits used in most of our research (including the FPGA challenge). These circuits have been mapped to 4-LUTs and flip flops. If all you want are the circuits you need to compare your placement and routing results to ours for the placement and routing challenge, you're probably better off using the .net format netlists above. If you want to investigate different logic blocks, on the other hand, these .blif format netlists are useful, since they can be packed into different logic blocks. The .net format netlists above already have the LUTs and flip flops packed together into BLEs.

A Utility to Convert a VPR netlist to Quartus format

Download the nettovqm utility program. This program can convert a VPR format (.net) netlist into the .vqm format netlist used by Altera's Quartus CAD suite to represent a technology-mapped netlist. This lets you run a VPR-format netlist targeting 4-LUTs and size 1 logic clusters through Altera's commercial tools, and compare result quality. You can't do other LUT sizes since they don't match the LUT size in Altera's Stratix and Cyclone parts, and you can't do a cluster of size larger than 1 since Quartus needs an unclustered, technology-mapped netlist.

Download the README file for nettovqm. For information on how to proceed in interfacing your CAD tool to Quartus once you have a .vqm netlist, get the Quartus University Interface Program (QUIP) documentation from Altera.

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