Experience in Designing a Large-scale Multiprocessor using Field-Programmable Devices and Advanced CAD Tools
Abstract
This paper provides a case study that shows how a demanding
application stresses the capabilities of todays CAD tools, especially
in the integration of products from multiple vendors. We
relate our experiences in the design of a large, high-speed
multiprocessor
computer, using state of the art CAD tools. All logic circuitry
is targeted to field-programmable devices (FPDs). This
choice amplifies the difficulties associated with achieving a
highspeed
design, and places extra requirements on the CAD tools.
Two main CAD systems are discussed in the paper: Cadence Logic
Workbench (LWB) is employed for board-level design, and Altera
MAX+plusII is used for implementation of logic circuits in FPDs.
Each of these products is of great value for our project, but the
integration of the two is less than satisfactory. The paper describes
a custom procedure that we developed for integrating sub-designs
realized in FPDs (via MAX+plusII) into our board-level designs in
LWB. We also discuss experiences with Logic Modelling Smart
Models, for simulation of FPDs and other types of chips.
Reference
Stephen D. Brown, N. Manjikian, Z. Vranesic, S. Caranci, A. Grbic, R. Grindley, M. Gusat, K. Loveless, Z. Zilic, and S. Srbljic, "Experience in Designing a Large-scale Multiprocessor using Field-Programmable Devices and Advanced CAD Tools," IEEE Design Automation Conference, Las Vegas, June. 1996, pp. 427-432. This was nominated as a best paper.
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