Hybrid FPGA Architecture
Abstract
This paper proposes a new field-programmable architecture
that is a combination of two existing technologies:
Field Programmable Gate Arrays (FPGAs) based on
LookUp Tables (LUTs), and Complex Programmable Logic
Devices based on PALs/PLAs. The methodology used for
development of the new architecture, called Hybrid FPGA,
is based on analysis of a large set of benchmark circuits, in
which we determine what types of logic resources best
match the needs of the circuits. The proposed Hybrid FPGA
is evaluated by manually technology mapping a set of circuits
into the new architecture and estimating the total chip
area needed for each circuit, compared to the area that
would be required if only LUTs were available. Preliminary
results indicate that compared to LUT-based FPGAs the
Hybrid offers savings of more than a factor of two in terms
of chip area.
Reference
Alireza Kaviani and Stephen D. Brown, "Hybrid FPGA Architecture," FPGA.96, Monterey, CA, Feb. 1996, pp. 1-7.
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