Short Vector Extensions in Commercial Microprocessors

This Web page summarizes information about the short vector extensions that have been introduced or announced in almost every general-purpose microprocessor on the market. These extensions have also been called "SIMD (Single Instruction Multiple Data)" extensions.

This page is organized as follows:

If you know of any links that would be appropriate to include here, please email them to me and I'll add them to the page. Thanks to the following people who have provided relevant links: David L. Oppenheimer, Christoforos Kozyrakis, David Patterson, Andrew Geweke, Mark Stoodley, S.Navaneethan.

Summary of Short Vector Extensions
(listed in order of ship date or year announced)

Processor Vector Extension
(and links to further references below)
Year Web Reference
(Visual Instruction Set)
1995 (shipped) HOME PAGE
Hewlett-Packard PA-RISC MAX
(Multimedia Acceleration eXtensions)
1995 (shipped) 64-bit and Multimedia Extensions in the PA-RISC 2.0 Architecture (Technical White Paper)
Intel Pentium MMX
(MultiMedia eXtensions)
1996 (announced)
1997 (shipped)
Katmai 1998 (announced)
1999 (expected)
Silicon Graphics MDMX
(MIPS Digital Media eXtension)
1996 (announced) Slides and text describing "MIPS Extension for Digital Media with 3D"
Digital Alpha MVI
(Motion Video Instructions)
1996 (announced) Advanced Technology for Visual Computing: Alpha Architecture with MVI
PowerPC AltiVec AltiVec May 1998 (announced)
late 1998 (expected)
AMD K6-2 3DNow! Nov 1998 (shipped) HOME PAGE

Notes on Short Vector Extensions
(listed alphabetically by company name)

AMD K6-2 3DNow!

Digital Alpha MVI

Alpha Architecture Handbook, Version 3, Oct 1996 (pdf)
Section 4.13 describes "Multimedia (Graphics and Video) Support Instructions"
Only max, min, pack, unpack instructions. No arithmetic instructions.

Hewlett-Packard PA-RISC MAX

Excerpts from 64-bit and Multimedia Extensions in the PA-RISC 2.0 Architecture , Technical White Paper, Jerry Huck and Ruby Lee, 1996
The shift in the workloads of both technical and business computations to include an increasing amount of multimedia processing led to the Multimedia Acceleration eXtensions (MAX) which are part of the PA2 architecture. ... Previously, a subset of these multimedia instructions were included in the PA7100LC processor, an implementation of the PA-RISC 1.1 architecture, as implementation-specific features [6,8].
[6] Lee R.B., "Accelerating Multimedia with Enhanced Microprocessors", IEEE Micro, vol. 15, no. 2, Apr. 1995, pp.22-32.
[8] Gwennap L., "New PA-RISC Processor Decodes MPEG Video", Microprocessor Report Vol 8 Num 1, Jan 24, 1994, pp . 16-17.
The HP MAX instructions have been implemented in the PA-7100LC and PA-800 processors:
HP 9000 Model 712, Hewlett-Packard Journal, Vol. 96, No. 2, April 1995.
Issue featuring the HP 9000 Model 712 workstation, an entry-level workstation with multimedia capability provided by three VLSI chips: the multi-media enhanced PA-RISC 71000LC processor, a highly integrated I/O chip, and a high performance graphics chip. Some useful links:
  • A synopis of the nine articles that describe the HP 9000 Model 712.
  • Table of Contents including brief synopses.
  • Real-Time Software MPEG Video Decoder on Multimedia-Enhanced PA 7100LC Processors (PDF article)
PA-8000 Combines Complexity and Speed, Linley Gwennap, Microprocessor Report, Vol. 8, No. 15, 14 November 1994.
Article previewing HP's PA-8000 processor. Some highlights:
  • first shipment predicted for 1Q96
  • implements PA-RISC 2.0
  • enhancements: full 64-bit data and address, FPMAC instruction and multiple FP compare bits in FPU, MAX instructions to support multimedia data types, ability to operate in either big- or little-endian mode
Related links:
Hewlett-Packard Computing Technologies Microprocessors
Home page for HP microprocessors.
HP Precision Architecture

Intel Pentium MMX and Katmai

Important dates:
Date Event
7 May 1998 Intel completes beta version of Katmai processor which includes 70 SIMD floating-point instructions (reported in EE Times article). Intel and Microsoft are providing low-level compiler tools that support instrinsics that "give developers the ability to write in C with nearly the same efficiency as hand-coded assembly language."
Jan 1997 Pentium MMX hardware appears in the consumer market.
5 Mar 1996 Information about MMX technology is released to allow software developers to begin creating MMX products before the MMX hardware is available to the consumer.
Web pages on MMX performance
Intel's MMX Performance Data
Pointers to system-level performance data for integer benchmarks (eg., SPEC), multimedia benchmarks (eg., Intel Media, Norton Multimedia), FP benchmarks (eg., SPEC, 3D graphics, 3D WinBench).
MMX: Better in Fits and Starts
Feb 1997/Bits article by G. Armour Van Horn
Performance comparison of a 200MHz MMX-based PC and high-end 200MHz Mac running 5 Photoshop programs on a 8.17MB high-resolution RGB image.
Conclusion: "Although MMX delivered dramatic performance in some operations (see the chart), overall, a high-end Mac still beats an MMX Pentium." Includes graph of execution times.
Intel MMX for Multimedia PCs. Communications of the ACM, January 1997.
MMX CPU Information
A description of the various MMX implementations by AMD, Cyrix,and Intel. = Americana International Computers
MMX Technology
old Home page for MMX web space

PowerPC AltiVec

Architectural and Design Implications of Mediaprocessing, Pradeep Dubey, IBM T.J. Watson Research Center, 20 Mar 1998
A media processing tutorial that talks about various media applications, bandwidth and compute resource requirements, shows how the media instructions in various processors compare to each other, and also discusses how several media processing tasks map onto different media processors.

Tutorial slides of note:

Apple Ties Mac's Future To AltiVec Instructions, EE Times, 13 May 98
Article reporting that Apple is committed to using AltiVec and that "the Mac OS is even being altered to exploit the instructions." Excerpts from the article.
Motorola and IBM Split On Direction for PowerPC, EE Times, 11 May 98
Article reporting on IBM's decision to not offer the AltiVec extensions in their G4 generation of PowerPC processors. Motorola, on the other hand, will be implementing the AltiVec extensions in their G4 processors in order to target the emerging high-end digital signal processing market. Excerpts from the article.
Motorola to unveil new PowerPC design , CNET NEWS.COM, 6 May 1998
Article announcing introduction of AltiVec, a 162-instruction vector extension to the PowerPC. The hardware is a new 128-bit SIMD execution unit that can execute in parallel with the existing floating-point and integer units. Excerpts from the article.


The Visual Instruction Set (VIS): On-Chip Support for New Media Processing
Whitepaper for VIS (95-022)

Silicon Graphics MDMX

Joe Heinrich. MIPS RISC Architecture, Volume I: Introduction to the ISA (2nd ed.). Document Number 007-3515-001/007-3576-001, Feb 5, 1998.
Ch 2: Overview of application-specific extensions MDMX and MIPS16; no hardware has yet been implemented for MDMX.
Ch 5: Details of MDMX extension.

Last Updated: 21 Nov 1998
Corinna G. Lee (