<LI><A NAME="tex2html3" HREF="node2.html#90">General architecture for a centralized FCM</A>
<LI><A NAME="tex2html5" HREF="node2.html#119">L1 data mapping block</A>
<LI><A NAME="tex2html6" HREF="node2.html#147">Two example mappings</A>
<LI><A NAME="tex2html7" HREF="node2.html#156">Level 2 data and address mapping block topology (<I>n</I>=<I>m</I>=<I>r</I>=4)</A>
<LI><A NAME="tex2html9" HREF="node5.html#255">Effects of changing number of arrays (<I>n</I>) on delay and area</A>
<LI><A NAME="tex2html10" HREF="node5.html#262">Effects of changing number of arrays (<I>n</I>) on flexibility</A>
<LI><A NAME="tex2html11" HREF="node7.html#288">Effects of changing minimum output width of L1 Data Mapping Block on delay and area</A>
<LI><A NAME="tex2html12" HREF="node7.html#295">Effects of changing minimum output width of L1 Data Mapping Block on flexibility</A>
