Publications

BOOK CHAPTERS

[BC1] “CMOS
Focal-Plane Spatially-Oversampling Computational Image Sensor,” A.
Olyaei and R. Genov, in
“Circuits at the Nanoscale: Communications, Imaging, and Sensing,”
edited by K. Iniewski, CRC Press, 2008.

REFEREED JOURNAL PUBLICATIONS

[J13] “A
CMOS/Thin-Film Fluorescence Contact Imaging Microsystem,”
R. Singh, D. Ho, A. Nilchi, G. Gulak, P. Yau, R. Genov, subm. to
IEEE Transactions on Circuits and Systems I: Regular Papers (special issue on best IEEE ISCAS’09 papers, invited).

[J12] “128-Channel Fully Differential Digital Integrated Neural Recording
and Stimulation Interface,”
F. Shahrokhi, K. Abdelhalim,
D. Serletis, P. Carlen, R. Genov, subm. to IEEE Transactions on Biomedical Circuits and Systems
(special issue on best IEEE ISCAS’09
papers, invited).

[J11] “On-Silicon
Neural Activity Monitoring and Time-Frequency Analysis for Epileptic Seizure
Prediction,” J. Aziz, R. Karakiewicz, R. Genov, A. Chiu, B. Bardakjian,
M. Derchansky, P. Carlen, resubm.
IEEE Transactions on Neural Systems and Rehabilitation Engineering.

[J10] “Focal-Plane
Algorithmically-Multiplying CMOS Computational Image Sensor,” A. Nilchi, J. Aziz, and R. Genov,
IEEE Journal of Solid-State Circuits, Vol. 44, No. 6, pp. 1829-1839, June 2009.

[J9]
“256-Channel
Neural Recording and Delta Compression Microsystem
with 3D Electrodes,” J. Aziz, K. Abdelhalim,
R. Shulyzki, R. Genov, B.
Bardakjian, M. Derchansky,
D. Serletis, P. Carlen, IEEE Journal of
Solid-State Circuits, Vol. 44,
No. 3, pp. 995-1005, March 2009.

[J8]
“480-GMACS/mW Resonant
Adiabatic Mixed-Signal Processor Array for Charge-Based Pattern Recognition,”
R.
Karakiewicz, R. Genov, G.
Cauwenberghs, IEEE Journal of Solid-State
Circuits, Vol. 42, No. 11, Nov.
2007.

[J7]
“Brain-Silicon
Interface for High-Resolution In Vitro Neural Recording,” J.
Aziz, R. Genov, B. Bardakjian,
M. Derchansky, P. Carlen, IEEE Transactions on
Biomedical Circuits and Systems,
Vol. 1, No. 1, pp. 56-62, March 2007.

[J6]
“Focal-Plane
Spatially-Oversampling CMOS Image Compression Sensor,” A.
Olyaei and R. Genov, IEEE
Transactions on Circuits and Systems I: Regular Papers, Vol. 54, No. 1, pp. 26-34, Jan. 2007.

[J5]
“16-Channel
Integrated Potentiostat for Distributed Neurochemical Sensing,” R.
Genov, M. Stanacevic, M. Naware, G. Cauwenberghs, N. Thakor, IEEE Transactions on Circuits and Systems I:
Regular Papers, Vol. 53, No. 11,
pp. 2371-2376, Nov. 2006.

[J4]
“Dynamic
MOS Sigmoid Array Folding Analog-to-Digital Conversion,” R. Genov and G. Cauwenberghs, IEEE
Transactions on Circuits and Systems I: Regular Papers, Vol. 51, No. 1, pp. 182-186, Jan. 2004.

[J3]
“Silicon
Support Vector Machine with On-Line Learning,” R. Genov, S. Chakrabartty, G. Cauwenberghs, International Journal of Pattern
Recognition and Artificial Intelligence, Vol. 17, No. 3, pp. 385-404,
2003.

[J2]
“Kerneltron: Support Vector ‘Machine’ in Silicon

,” R. Genov,
G. Cauwenberghs, IEEE Transactions on Neural
Networks, Vol. 14, No. 5, pp. 1426-1434, Sept. 2003.

[J1]
“Charge-Mode Parallel Architecture for Matrix-Vector
Multiplication,” R. Genov,
G. Cauwenberghs, IEEE Transactions on Circuits
and Systems II: Analog and Digital Signal Processing, Vol. 48, No. 10,
pp. 930-936, Oct. 2001.

REFEREED
CONFERENCE  AND WORKSHOP
PUBLICATIONS

[C35]
“A Hybrid CMOS-Microfluidic Contact Imaging Microsystem,” R. Singh, L. Leng,
A. Guenther, and R. Genov, SPIE Optics and
Photonics Aug. 1-6, 2009. (invited)

[C34]
“CMOS Image Compression Sensor with
Algorithmically-Multiplying ADCs,” A. Nilchi, J. Aziz, and R. Genov, IEEE
Int. Symp. on Circuits and
Systems (ISCAS'2009), pp. 1497-1500, May 2009. (Best Paper on Sensory
Systems, Best Student Paper)

[C33]
“128-Channel Fully Differential Digital Neural Recording
and Stimulation Interface,” F. Shahrokhi,
K. Abdelhalim, R. Genov, IEEE
Int. Symp. on Circuits and
Systems (ISCAS'2009), pp. 1249-1252, May 2009. (Best Student Paper Contest
Finalist)

[C32]
“A Hybrid Thin-Film/CMOS Fluorescence Contact Imager,”
R. Singh, D. Ho, A. Nilchi, R. Genov
and G. Gulak, IEEE Int. Symp.
on Circuits and Systems (ISCAS'2009), pp.
2437-2440, May 2009.

[C31]
“A Fully Differential CMOS Potentiostat,”
M. Nazari, R. Genov, IEEE
Int. Symp. on Circuits and
Systems (ISCAS'2009), pp. 2177-2180, May 2009.

[C30]
“Multi-Step Binary-Weighted Capacitive Digital-to-Analog
Converter Architecture,” R. Singh, R. Genov, R. Kotamraju, B. Mazhari, IEEE
Midwest Symposium on Circuits and Systems (MWSCAS’08), Knoxville,
Tennessee, Aug. 10-13, 2008.

[C29]
“1.1 TMACS/mW Load-Balanced
Resonant Charge-Recycling Array Processor,” R. Karakiewicz, R. Genov, G. Cauwenberghs, IEEE
Custom Integrated Circuits Conference (CICC’2007), Sept. 2007.

[C28]
“In Vitro Epileptic Seizure Prediction Microsystem,”
J. Aziz, R. Karakiewicz, R. Genov,
A. W. L. Chiu, B. L. Bardakjian, M. Derchansky, P. L. Carlen, IEEE Int. Symp. on Circuits and Systems
(ISCAS'2007), May 2007.

[C27]
“256-Channel Neural Recording Microsystem
with On-Chip 3D Electrodes,” J. Aziz, R. Genov, M. Derchansky, B. Bardakjian, P. Carlen, IEEE International
Solid-State Circuits Conference (ISSCC’2007),
Feb. 2007.

[C26]
“ViPro: Focal-Plane
Spatially-Oversampling CMOS Image Compression Sensor,”
A. Olyaei, R. Genov, IEEE Custom Integrated Circuits Conference
(CICC’2006), Sept. 2006.

[C25]
“Towards Real-Time In-Implant Epileptic Seizure Prediction,”
J. N. Y. Aziz, R. Karakiewicz, R. Genov, B. L. Bardakjian, M. Derchansky and P. L. Carlen, IEEE Engineering in Medicine and Biology Conference (EMBC’2006),
Sept. 2006.

[C24]
“175 GMACS/mW Charge-Mode
Adiabatic Mixed-Signal Array Processor,” R. Karakiewicz, R. Genov, G. Cauwenberghs, IEEE
Symposium on VLSI Circuits, June 2006.

[C23]
“Real-Time Seizure Monitoring and Spectral Analysis Microsystem,” J. N. Y. Aziz,  R. Karakiewicz,  R. Genov, B.
L. Bardakjian, M. Derchansky,
P. L. Carlen, IEEE Int. Symp. on
Circuits and Systems (ISCAS'2006), May 2006.

[C22]
“256-Channel Integrated Neural Interface and Spatio-Temporal Signal Processor,”
J. N. Y. Aziz, R. Genov, B. L. Bardakjian,
M. Derchansky, P. L. Carlen, IEEE Int. Symp. on Circuits and Systems
(ISCAS'2006), May 2006.

[C21]
“Electro-Chemical Multi-Channel Integrated Neural Interface
Technologies,” J. N. Y. Aziz, R. Genov,
IEEE Int. Symp. on
Circuits and Systems (ISCAS'2006), May 2006.

[C20]
“Algorithmic Delta-Sigma Modulated FIR Filter,”
A. Olyaei, R. Genov, IEEE
Int. Symp. on Circuits and
Systems (ISCAS'2006), May 2006.

[C19]
“Multi-Channel Integrated Neural Interfaces for Distributed
Electro-Chemical Sensing,” J. Aziz, R. Genov, IEEE Midwest
Symposium on Circuits and Systems (MWSCAS’05), Cincinnati, Ohio,
Aug. 7-10, 2005.

[C18]
“Focal-Plane CMOS Wavelet Feature Extraction for Real-Time
Pattern Recognition,” A. Olyaei,
R. Genov, SPIE
Photonics North, Toronto,
Canada, Sept. 12-14, 2005.

[C17]
“Mixed-Signal CMOS Haar Wavelet
Compression Imager Architecture,” A. Olyaei, R. Genov, IEEE Midwest Symposium on Circuits and
Systems (MWSCAS’05), Cincinnati, Ohio, Aug. 7-10, 2005.

[C16]
“Minimal Activity Mixed-Signal VLSI Architecture for
Real-Time Linear Transforms in Video,” R. Karakiewicz and R. Genov, IEEE
Int. Symp. on Circuits and
Systems (ISCAS'2005), Kobe,
Japan, May
23-26, 2005.

[C15]
“Integrated Multi-Electrode Fluidic Nitric-Oxide Sensor and
VLSI Potentiostat Array,”
M. Naware, A. Rege, R. Genov, M. Stanacevic, G. Cauwenberghs, N. Thakor, IEEE
Int. Symp. on Circuits and
Systems (ISCAS'2004), Vancouver,
Canada, May
26-29, 2004.

[C14]
“VLSI Multi-Channel Track-and-Hold Potentiostat,”
R. Genov, M. Stanacevic,
M. Naware, G. Cauwenberghs,
N. Thakor, in Microtechnologies
for the New Millennium, Bioengineered and Bioinspired
Systems 2003, Proc. SPIE vol. 5119, May 2003.

[C13]
“Algorithmic Partial Analog-to-Digital Conversion in
Mixed-Signal Array Processors,” R. Genov, G. Cauwenberghs, Proc.
IEEE Int. Symp. on
Circuits and Systems (ISCAS'2003), Bangkok,
Thailand, May
25-28, 2003.

[C12]
“A 5.9mW 6.5GMACS CID/DRAM Array Processor,”
R. Genov, G. Cauwenberghs,
G. Mulliken, and F. Adil,
Proc. IEEE European Solid-State Circuits Conference (ESSCIRC’2002), Florence, Italy,
Sept. 24-26, 2002.

[C11]
“Kerneltron: Support
Vector ‘Machine’ in Silicon,” R. Genov, G. Cauwenberghs, Proc.
SVM’2002, Lecture Notes in Computer Science, Niagara Falls, ON,
Aug. 10, 2002.

[C10]
“Delta-Sigma Algorithmic Analog-to-Digital
Conversion,” G. Mulliken, F. Adil, G. Cauwenberghs, and  R. Genov, Proc. IEEE Int. Symp.
on Circuits and Systems (ISCAS'2002), Phoenix, AZ,
May 26-29, 2002.

[C9]
“Charge-Based MOS Correlated Double Sampling Comparator and
Folding Circuit,” R. Genov
and G. Cauwenberghs, Proc. IEEE Int. Symp. on Circuits and Systems
(ISCAS'2002), Phoenix,
AZ, May 26-29, 2002.

[C8]
“Neuromorphic
Processor for Real-Time Biosonar
Object Detection ,” G. Cauwenberghs,
R. T. Edwards, Y. Deng, R. Genov, and D. Lemonds, Proc. IEEE International Conference on
Acoustics, Speech, and Signal Processing (ICASSP’2002), Orlando,
FL, May 13-17, 2002.

[C7]
“Stochastic Mixed-Signal VLSI Architecture for
High-Dimensional Kernel Machines,” R. Genov, G. Cauwenberghs, Advances in Neural Information Processing
Systems (NIPS'2001), Cambridge,
MA: MIT Press, vol. 14, 2002.

[C6]
“CID/DRAM Mixed-Signal Parallel Distributed Array Processor,”
R. Genov, G. Cauwenberghs,
IEEE 14th International ASIC/SOC Conference (ASIC/SOC'2001), Washington, DC,
Sept. 12-15, 2001.

[C5]
“Massively Parallel Inner-Product Array Processor,”
R. Genov, G. Cauwenberghs,
Proc. of IEEE Int. Joint Conference on Neural Networks (IJCNN'2001),
Washington, DC, July 15-19, 2001.

[C4]
“Analog Array Processor with Digital Resolution Enhancement
and Offset Compensation,” R. Genov,
G. Cauwenberghs, Proc. of Conference on
Information Sciences and Systems (CISS'2001), Baltimore, MD, March 21-23,
2001.

[C3]
“Charge-Mode Parallel Architecture for Matrix-Vector
Multiplication,” R. Genov
and G. Cauwenberghs, Proc. of 43rd IEEE Midwest
Symposium on Circuits and Systems (MWSCAS'2000), Lansing, MI, Aug. 8-11,
2000. (Best Student Paper Award)

[C2]
“Learning to Navigate from Limited Sensory Input:
Experiments with the Khepera Microrobot,”
R. Genov, S. Madhavapeddi
and G. Cauwenberghs, Proc. of IEEE International
Joint Conference on Neural Networks (IJCNN'99), Washington, DC, vol. 3,
pp. 2061-2064, 1999. (Best Presentation Award)

[C1]
“16-Channel Single-Chip Current-Mode Track-and-Hold
Acquisition System with 100 dB Dynamic Range,” R. Genov and G. Cauwenberghs, Proc.
of IEEE International Symposium on Circuits and Systems (ISCAS'99),
Orlando, FL, vol. 6, pp. 350-353, 1999. (Best Student Paper Contest Finalist)

UNREFEREED
CONFERENCE  AND WORKSHOP
PUBLICATIONS

[UC3]
“CMOS Wavelet Compression Imager Architecture,”
A. Olyaei, R. Genov, IEEE CAS Emerging Technologies Workshop,
St. Petersburg, Russia, June 23-24, 2005.

[UC2]
“A 1GMACS/mW Mixed-Signal
Differential-Charge CID/DRAM Processor,” R. Genov, IEEE Int. Conf.
on Circuits and Systems for Communications (ICCSC’2004), Moscow, Russia, June 30 - July 2, 2004 (invited).

[UC1]
“Embedded Dynamic Memory and Charge-Mode Logic for Parallel
Array Processing,” R. Genov,
G. Cauwenberghs, Proc. of the 5th World
Multi-Conference on Systemics, Cybernetics and
Informatics (SCI'2001), Orlando, FL, July 22-25, 2001.

OTHER
PUBLICATIONS

[O1]
“Massively Parallel Mixed-Signal VLSI Kernel Machines,” R.
Genov, Ph.D. Dissertation, Department of Electrical and Computer Engineering, The Johns Hopkins University, May 2003.

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