Mazen A. R. Saghir

900 Pepper Tree Lane, Apt. 1211
Santa Clara, CA 95051, U.S.A.
Telephone: (408) 243-7938
E-Mail: mazen_saghir@yahoo.com


Career Objective

Design and development of embedded system software, optimizing compilers, and microprocessor design tools.


Education

November 1998

Ph.D., Electrical and Computer Engineering, University of Toronto
Thesis: Application-Specific Instruction-Set Architectures for Embedded DSP Applications

June 1993

M.A.Sc., Electrical and Computer Engineering, University of Toronto
Thesis: Architectural and Compiler Support for DSP Applications

December 1989

B.E., Computer and Communication Engineering
American University of Beirut (Lebanon)


Scholarships and Awards

1991-1997

Information Technology Research Centre Graduate Scholarship

1996

International Student Centre Volunteer Award

1993-94

University of Toronto Open Doctoral Fellowship

1992-93

Department of Electrical and Computer Engineering Teaching Assistant Award


Technical Skills

Programming Languages:

C/C++, Java, Perl, Miscellaneous Assembly (Improv Jazz PSA, Motorola 68000, DSP56001, DSP96002; Texas Instruments TMS320C50, TMS320C30, TMS320C6x)

Compilers:

Improv Solo, GNU (gcc), SUIF (scc)

Hardware Description Languages:

Verilog

Development Platforms:

UNIX, Windows NT


Work Experience

May 2001 - Apr. 2002

Technical Consulting Engineer
Improv Systems, Santa Clara

  • Supported key customers in developing Jazz Programmable System Architecture (PSA) IP-based solutions.
  • Contributed to the optimization of target application software.
  • Recommended suitable Jazz PSA platforms to meet target system requirements, including the specification of designer-defined computation units (DDCUs) to accelerate performance-critical code blocks.
  • Presented Improv's technology and demonstrated tools to potential customers.

Jan. 1999 - Apr. 2001

Senior Software Engineer
Improv Systems, Santa Clara

  • Designed, developed, and maintained the Jazz 2.0 Composer Library. Composer is a GUI-based tool for configuring designer-defined computation units (DDCUs), Jazz VLIW processors, and heterogeneous chip multiprocessor PSA platforms. It is also used to retarget the Solo compiler, the instruction-set simulator, and the JazzGen Verilog generator.
  • Upgraded and maintained the Jazz 2.0 assembler to accomodate the variable instruction encoding of composer-generated Jazz VLIW processors.
  • Designed, developed, and maintained the Java subset checker pass for the Solo compiler. The subset checker ensures that source application code adheres to the Improv Java subset.
  • Designed, developed, and maintained the cycle-annotation pre-processor pass for the Solo compiler. The preprocessor ensures that source application code is formatted in a manner that improves the accuracy of the cycle generator tool.
  • Upgraded and maintained the cycle generator tool (CycleGen). CycleGen annotates pre-processed Java source files with cycle count estimates of program code blocks.
  • Performed periodic performance evaluations on a set of in-house benchmarks to monitor the performance of the Solo compiler.

Jan. 1998 - Dec. 1998

Embedded Software Designer
Nortel Networks, Ottawa

  • Developed test and diagnostic software for OC-3, DS-3, and E-3 cards on the Passport 15000 switch.

May 1991 - Dec. 1997

Research Assistant
Department of Electrical and Computer Engineering,
University of Toronto

  • Developed a set of tools for customizing the data path and instruction-set architecture of a VLIW-based architecture to the functional, performance, and cost requirements of embedded DSP applications.
  • Developed an instruction-set simulator for a VLIW-based model DSP architecture.
  • Developed a data allocation pass and an alias analysis pass for the optimizing back-end of an experimental DSP compiler.
  • Added floating-point support to an experimental DSP compiler.
  • Developed a suite of six DSP applications and twelve DSP kernels and used them to assess the performance of the architecture and the compiler.

Jan. 1991 - Dec. 1996

Teaching Assistant
Department of Electrical and Computer Engineering,
University of Toronto

  • Supervised lab sessions and student projects for second and third year courses in Digital Systems and Computer Organization.
  • Assisted students in troubleshooting digital circuit designs and debugging assembly language programs.

 

 


Activities and Interests


Publications


References available upon request


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