Details of U.S. Patent Application 17/982136

Title: Systems and Methods to Generate a Miss Ratio Curve where Cache Data has a Time-To-Live
Inventors: Sari Sultan, Kia Shakiba, Albert Lee, Michael Stumm, Ming Chen, and Chung-Man Chow
Filing number: 17/982,136
Filing date: November 7, 2022

Abstract:

A method and system is disclosed which alters the performance of computer systems to make exception-less system calls, thus avoiding or reducing the direct and indirect overheads associated with making an exception-based system call. The invention can be employed with single core processor systems and with multi-core processor systems.

Classification:

BibTeX:

@patent(CachesTTL-Patent-17-982136,
    title = {Systems and Methods to Generate a Miss Ratio Curve where Cache Data has a Time-To-Live},
    author = {Sari Sultan and Kia Shakiba and Albert Lee and Michael Stumm and Ming Chen and Chung-Man Chow},
    day = {21},
    yearfiled = {2022},
    monthfiled = {November},
    dayfiled = {7},
    filing_num = {17/982,136},
)