Introductions, assignments for the first two weeks of the course

No meeting

If you can read this paper on MIPS R10000 processor.

Here are the lecture slides.

Visit by Marc Tremblay of Sun. Please attend his lecture which is part of the Distinguished Lecture Series.

1. Complexity Effective Superscalar Processors, S. Parlacharla, N. Jouppi and J. E. Smith, Proceedings of the Annual International Symposium on Computer Architecture, 1997.

• Presenter: Jason Zebchuk, Questionnaire,Presentation

1. Cyclone: a broadcast-free dynamic instruction scheduler with selective replay, Dan Ernst, Andrew Hamel, Todd M. Austin, Proceedings of the Annual International Symposium on Computer Architecture, 2003.

• Presenter: Myrto Papadopoulou, Questionnaire, Presentation

1. Dynamic history-length fitting: A third level of adaptivity for branch prediction, Toni Juan, Sanji Sanjeevan, Juan J. Navarro, Proceedings of the 25th Annual International Symposium on Computer Architecture, 1998.

• Presenter: Danyao Wang, Questionnaire, Presentation

1. A Scalable Front-End Architecture for Fast Instruction Delivery, Glenn Reinman, Todd Austin, and Brad Calder, ACM/IEEE 26th Annual International Symposium on Computer Architecture (ISCA-26), May 1999.

• Presenter: Alexander Choong, Questionnaire,Presentation

1. Memory Dependence Prediction Using Store Sets, G. Chrysos and J. Emer, Proceedings of the Annual International Symposium on Computer Architecture, 1998.

• Presenter: Jarek Marczewski, Questionnaire, Presentation.

1. Scalable Hardware Memory Disambiguation for High ILP Processors, S. Sethumadhavan, R. Desikan, and D. Burger, In the Proceedings of the Annual ACM/IEEE International Symposium on Microarchitecture, 2003.

• Presenter: Manisha Tatikonda, Questionnaire, Presentation

No meeting

1. Focusing Processor Policies via Critical-Path Prediction, B. Fields, S. Rubin and R. Bodik, Proceedings of the Annual International Symposium on Computer Architecture, 2001.

• Presenter: Vincent Mirian, Questionnaire, Slides.

1. rePLay: A Hardware Framework for Dynamic Optimization, S. J. Patel, S. S. Lumetta, IEEE Transactions on Computers, June 2001.

• Presenter: Alex Rodionov, Questionnaire, Slides..

1. Runahead Execution: An Alternative to Very Large Instruction Windows for Out-of-order Processors, Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt, Proceedings of the Annual International Conference on High-Performance Computer Architecture, 2003.

• Presenter: Mark Teper, Questionnaire 1 Oct28, Slides.

1. Continual Flow Pipelines, Srikanth T. Srinivasan Ravi Rajwar Haitham Akkary Amit Gandhi Mike Upton, Proceedings of the ACM Symposium on Architectural Support for Operating Systems and Programming Languages, 2004.

• Presenter: Godron Chiu, Questionnaire 2 Oct28, Slides.

1. Runahead A fully associative software-managed cache design, Erik G. Hallnor, Steven K. Reinhardt, Proceedings of the Annual International Conference on Computer Architecture, 2000.

• Presenter: Maryam Sadooghi-Alvandi, Questionnaire 1 Nov4, Slides, .

1. The V-Way Cache: Demand Based Associativity vi5 Global Replacement, Moinuddin K. Qureshi, David Thompson, and Yale N. Patt, Proceedings of the Annual International Conference on Computer Architecture, 2000.

• Presenter: Diego Huang, Questionnaire 2 Nov4, Slides, .

No meeting

1. Multiscalar Processors, Gurindar Sohi, S. Breach, T. N. Vijaykumar, Proceedings of the Annual International Conference on Computer Architecture, 1995.

• Presenter: Matthew Misler, Questionnaire 1 Nov18, Slides.

1. DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design, Todd Austin, Proceedings of the Annual International Symposium on Microarchitecture, 2000.

• Presenter: Kam Pui Tang, Questionnaire 2 Nov18,Slides, .

1. Techniques to Reduce the Soft Errors Rate in a High-Performance Microprocessor, Christopher Weaver, Joel Emer, Shubhendu S. Mukherjee, and Steven K. Reinhardt, Proceedings of the Annual International Conference on Computer Architecture, 2004.

• Presenter: Zefu Dai, Questionnaire 1 Nov25, Slides.

1. Slipstream Processors: Improving both Performance and Fault Tolerance, Karthik Sundaramoorthy, Zach Purser, Eric Rotenberg, Proceedings of the Annual International Symposium on Architectural Support for Programming Languages and Operating Systems, 2000.

• Presenter: Elias Ferzli , Questionnaire 2 Nov25, Slides.

1. Lifetime Reliability: Toward an Architectural Solution., Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers, IEEE Micro 25(3): 70-80 (2005).

• *AND** Top 5 Reasons Reliability is the Biggest Fallacy in Computer Architecture Research., Scott Mahlke, Panel held in Intl' Conference on High-Performance Computer Architecture (HPCA), Feb. 2007.
• Presenter: , Questionnaire 1 Dec2, Slides.

1. Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation, Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Toan Pham, Rajeev Rao, Conrad Ziesler, David Blaauw, Todd Austin, Trevor Mudge, and Krisztián Flautner, , 36th Annual International Symposium on Microarchitecture (MICRO-36), December 2003.

• Presenter: , Questionnaire 2 Dec2, Slides.