ECE1749H - Interconnection Networks for Parallel Computer ArchitecturesFall 2011
|
| Instructors: | |
| Prof. Natalie Enright Jerger | |
| PT374A (Pratt Buidling), Tel: 978-5056, Email: enright at eecg dot toronto dot edu | |
| Communication: Use e-mail as much as possible, Subject should start with "OCN:" Office hours: Stop by if door is open or make an appointment by email |
|
Course Description. Interconnection networks form the communication backbone of computers at a variety of scales, from the internet to on-chip networks in multi-core/many-core architectures. With growing emphasis on parallelism as a means of extracting additional processor performance, the communication substrate is a critical factor in both the performance and power consumption of many-core architectures. This course will explore the architecture and design of interconnection networks including topology, routing, flow control and router microarchitecture. This course will also look into the impact on communication requirements of various parallel architectures and cache coherence mechanisms. This course will focus on interconnection network architectures used in multiprocessor systems and many-core designs with emphasis on recent research innovations in these areas. |
|
| Debate Presentations | 15% | |
| Critique of assigned readings | 15% | |
| Quizzes | 15% | |
| Class Participation | 5% | |
| Final Project | 50% |
| Required Textbook: |
| N. Enright Jerger and L-S. Peh,
On-Chip Networks. Available for free download (within UofT): link. A papercopy of the book is also available for purchase (e.g. Amazon) but is not required. |
| Additional Readings: |
| See course outline for assigned research papers |
| Supplemental Textbook: |
| W. J. Dally and B. Towles, Principles and Practices of Interconnection Networks |