Talk 2.2: 9:30AM–10:45AM
| Session Name: | Advances in Integrated Circuit Design |
| Session Time: | 9:30AM–10:45AM |
| Author Name: | Faisal Musa |
| Author Email: | faisal@eecg.utoronto.ca |
| Talk Title: | A dual-function analog filter aided timing recovery scheme |
| Slides: | 2-2.pdf |
| Abstract: | This paper presents a baud-rate timing recovery scheme that is aided by signals generated from a dual-function analog filter. The analog filter functions as a simultaneous lowpass and bandpass filter to generate the data and its slope respectively. Peaking is introduced in the lowpass data path to equalize a lossy channel. The timing recovery loop utilizes the equalized data and slope signals obtained from the dual-function analog filter to recover a clock based on a modified minimum mean squared error (MMSE) criterion. Unlike previously published baud-rate techniques for multi-Gb/s NRZ data, this technique can lock to either random or alternating data patterns, even from a closed eye. As a proof of concept, a prototype dual-function analog filter was fabricated in a 0.18-$\mu$m CMOS process and used to recover a 2-GHz clock from a 2-Gb/s $2^{31}$-1 random data sequence based on the modified MMSE criterion. |
| Research Group: | Electronics |
| Degree Program: | Ph.D. |
| Author Bio: | Faisal A.Musa is currently working toward the Ph.D. degree at the University of Toronto. During the summer of 2004, he worked on the design of high-speed clock recovery systems at Intel's Microprocessor Technology Lab in Oregon. His research interests include modeling, design and implementation of high-speed chip-to-chip signaling interfaces. |