Talk 5.3: 1:30PM–2:45PM
| Session Name: | Computer Architectures, Compilers and Programming Models |
| Session Time: | 1:30PM–2:45PM |
| Author Name: | Davor Capalija |
| Author Email: | davor@eecg.toronto.edu |
| Talk Title: | Microarchitecture and FPGA Implementation of the Multi-Level Computing Architecture |
| Slides: | 5-3.ppt |
| Abstract: | Parallel Programmable Systems-on-a-chip (PP-SoC) are quickly becoming the dominant architectural paradigm for high-performance embedded systems. Programming of these systems is burdensome and considerably increases the already high costs of system development. The Multi-Level Computing Architecture (MLCA) promises to alleviate the programmability challenge with the use of a proven superscalar coarse-grain parallel programming model. Our goal is to design the microarchitecture of the MLCA and to implement it in FPGA technology. The main challenge is to find a design that delivers both the scalable performance and the reasonable area-efficiency in terms of the number of processing units. The FPGA implementation is underway and we show the preliminary results of our investigation. |
| Research Group: | Computer |
| Degree Program: | M.A.Sc. |
| Author Bio: | Davor Capalija is currently pursuing his Master's studies at the University of Toronto, ECE department. He is a member of the Computer Engineering Research Group. Davor received his Bachelor's degree from the University of Zagreb, Croatia in 2005. His research interests are computer architecture, FPGAs and compilers. |