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ECE532S: Digital Hardware

Paul Chow

Spring 2005

This page is used to provide supplementary information and links that mostly support the lab material. Other course information, mainly administrative and announcements, can be found on the CCNET course page.

This page can be viewed directly at

A special thanks to Xilinx for the donations that made the labs possible.

Course Description

Expected Background


Project and Lab Stuff

Past Projects

Things to Know

Checking Disk Quotas
To check your current disk space usage and limits on the ugsparcs, use the command ``quota -v''.

Directory and File Names
Do not have any directories or filenames in your path that have spaces in them. For example, do not have your project directory in the folder called ``My Documents''. To be safe, it would also be wise to take the same precaution when installing the tools.

Documentation for Hardware and Software

This is a site dedicated to the EDK tools and the Multimedia board. Labs/tutorials and other useful documentation for the tools and hardware used in this course are available here.

For Spring 2005, we will be using the 6.3 version of the Xilinx tools.


Virtex-II Data Sheets
This is the Xilinx web page for the Virtex-II data sheets. You should have a look through Module 2. In particular, pay attention to the Configurable Logic and the 18K Block SelectRAM sections.

Stratix Data Sheets
This is the Altera web page for the Stratix data sheets. You should have a look through Volume 1, Chapter 2. In particular, look at the sections on the Logic Array Blocks, the Logic Elements and the TriMatrix Memory.

A Design Example

This is a simple example illustrating good design practices. You should study it and emulate it!

Lecture References

Altera Custom Instructions

Xilinx FSLs
Attaching hardware to the MicroBlaze.

Timing Analysis
High-Speed Digital System Design: A Handbook of Interconnect Theory and Design Practices, Hall, Hall and McCall, Wiley. Chapter 8 is most directly relevant to the lectures. Chapter 9 gets more into setting up spreadsheets to do the computations. Available through UofT library online

Clock Domains and Synchronization
Digital Systems Engineering, Dally and Poulton, Cambridge. Chapter 10.

Synthesis and Scripting Techniques for Designing Multi-Asynchronous Clock Designs, Clifford E. Cummings, SNUG-2001.

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Next: ECE532S Course Description Up: PC's Home
Paul Chow 2006-08-10