A significant part of the course evaluation is based on a project that you will do using the Xilinx tools and the Multimedia board. Learning to use the tools quickly is important so that you can have enough time to do the project. The key is to learn enough of the tools to do what you need to do.
The TAs will be monitoring the board for activity.
Please do not email the TAs unless it is for something specific to you.
In most cases for the projects you will do, you won't need to figure out much more than the basic usage of the tools. If your design starts to push the limits of the capacity of the chip or requires particularly tight timing, then you may need to use more advanced features.
There will be four lab periods where you can work on these modules. Please do not switch lab days as we have limited equipment.
There will not be any grading done during these four periods. The TAs are there to help so use that time effectively.
You will likely need to work on these modules outside of the lab periods. A lot of the parts of the modules can be done without the hardware so, at the minimum, you should do as much preparation as you can and go to the lab periods just to work with the hardware. Some hardware will also be made available in the ECE Design Centre in the basement of Sanford Fleming.
During the 5th lab period you will be assigned a specific time slot where you will be graded on the lab demonstration design and a ModelSim simulation. The requirements are given here. This will be the 10% of your final grade assigned to the lab mark.
After last year's experience, we hope you can do a bit more because you are being given more information about the tools. You can see what was done last year. Look at the Handouts section for the project proposal and requirements from last year's course..
The basic guideline is that your project should incorporate at least one MicroBlaze processor and a hardware block of your own design.
You will need a block diagram of your system. The example shown here is fairly good. The only improvement I might make to it is to explicitly show the OPB bus as this would give a better idea about potential bottlenecks. Any software IP could be indicated as blocks within the the box labeled as the MicroBlaze processor.
As a general comment, the concepts were good. Many had difficulties with just getting some basic stuff running, like the audio or video so they could not get to the next stage. However, amongst all of these projects there are working instances that you can use to build upon. They have not been packaged for general distribution, so let me know what you need.
| Implementation of the Global Positioning System Digital Base-band |
| Digital Adaptive Equalization for Serial Data Communication |
| Real-Time Audio Processing |
| Photoshop Functionalities on FPGA |
| Xpod |
| A Real-Time Channel Vocoder |
| Audio-to-MIDI Converter |
| SVGA Network Poker |
| Super Mario Bros.FPGA |
| Character Recognition for Autonomous Rover |
| Hardware Based Ogg Vorbis Decoder |
| Karaoke Machine |
| Interactive Video Game |
| Week No. | Completion by end of | Grades | Activity |
| 1 | Jan 4/5 | First week of classes, no labs | |
| 4 | Jan 25/26 | Recommended completion of the required modules m01-m05, m07. | |
| 4 | Jan 26 lecture | 5% | Submit project proposal at start of lecture |
| 5 | Feb 1/2 | Recommended that you use lab period to test lab demo with TAs there to help | |
| 6 | Feb 8/9 | 10% | Grading of your lab demos for 10% of your final grade |
| 7 | Feb 21 | 20% | Test I during lecture |
| 8 | Feb 22/23 | 4% | Milestone I demos |
| 11 | Mar 22/23 | 6% | Project demos |
| 12 | Mar 28 lecture | 20% | Individual report due at start of lecture |
| 12 | Mar 28 lecture | 15% | Group report due at start of lecture |
| 13 | Apr 4 | 20% | Test II during lecture |