Program

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Please click for ECTI lab tour schedule.

Legend:
Student 
Industry
Panel    

Time Session Speaker
8:30 AM Registration and Breakfast
9:30 AM Welcome Address

Morning Keynote Speech I
Topic: FPGAs at 28nm: Meeting the Challenge of Modern Systems-on-a-Chip		 Paul Leventis (Altera)
10:00 AM Student Presentation:
11:00 AM Industry Presentation 1
Topic: Deep sub-micron CMOS Multi-Standard SERDES for High-Speed Wireline Links		 George Ng (Snowbush IP-A Division of Gennum)
11:20 AM Industry Presentation 2 Topic: An overview of OSPE and what we can offer professional engineers TBA (OSPE)
11:40 AM Industry Presentation 3
Topic: Online Advertisement and Analysis with MapReduce Tools		 Oleg Golubitsky (Google)
12:00 PM Industry Presentation 4
Topic: 		Olivier Trescases (IEEE Toronto Section)
12:20 PM Lunch/Industry Poster Session
1:00 PM Keynote Speech II
Topic: Monetizing University Research		 Andrew Sinclair (MaRS Innovation)
1:30 PM Student Presentation:
2:30 PM Coffee Break / Student Poster Session
3:00 PM Industry Presentation 5
Topic: Power - Every Watt Counts in Large Amounts		 Mario Filipas (AMD)
3:20 PM Industry Presentation 6
Topic: Bridging the Gap between academia and industry CMC Microsystems state-of-the-art research facilities		 James Dietrich (CMC Microsystems)
3:40 PM Industry Presentation 7
Topic:Model Driven Engineering: The next step in Software Development		 Greg Fenton (NexJ)
2:45 PM Student Presentations: (Sessions 3A, 3B, 3C)
5:00 PM Panel Discussion
Topic:Innovation: What are the driving factors? 		TBA
5:45 PM Closing Speech & Award Presentation
6:15 PM Banquet


ECTI Lab Tour Schedule

Each lab tour is about 30 minutes long.

Time Lab Facility Lab Manager
10:00 AM ECTI Electron Beam Nanolithography Facility Dr. Aju Jugessur
1:30 PM ECTI Bahen Prototyping Cleanroom Dr. Henry Lee
4:00 PM ECTI Pratt Microfabrication Cleanroom Dr. Edward Xu


Biographies

Paul Leventis
Director, Software & IP Engineering, Altera
Topic:FPGAs at 28nm: Meeting the Challenge of Modern Systems-on-a-Chip

Biography: Paul Leventis is Director of Software and IP Engineering at Altera Corporation and heads up the Toronto Technology Centre, a key Altera R&D facility that contributes broadly to Altera's FPGA compilation software and FPGA architectures. Paul began his career at Right Track CAD Corp in 1999, and has worked at Altera since its acquisition of Right Track in May 2000. Over the next eight years, he held a variety of technical management roles in the Altera Toronto Technology office, and contributed to the architecture of Altera's Stratix, Cyclone and MAX FPGA families. In June 2008, Paul left Toronto to head up the short-lived Altera Vietnam Technology Centre, a casualty of the 2009 recession. Paul then spent two years as Director of Design Automation & Methodology in Altera's San Jose IC Engineering group, where he oversaw design methodology for Altera's 28nm FPGA families, as well as EDA tool purchases and deployment. Paul received his BASc in Engineering Science and his MEng in ECE from the University of Toronto, and is co-inventor of 26 US patents and author of 4 conference papers.

Abstract: FPGAs are amongst the first chips in next-generation process technologies, including the 28nm process node. The tremendous transistor counts available at 28nm enable the design of very large and complex systems. When implemented on an FPGA, these systems often require "hard" logic to meet high-performance requirements. New FPGAs will include a wide variety of such blocks and thus make an excellent platform to implement large systems-on-a-chip. This talk will give an overview of some of the key new features of Altera's 28 nm FPGAs, such as partial reconfiguration, enhancements to the programmable fabric, and new hard blocks. I will describe some of the process challenges of designing fast FPGAs with good power consumption and reliability, and highlight the solutions used in Stratix V; I will also touch on the challenges of robustly analyzing design timing and power in advanced nodes. For FPGA designers to complete ever-larger systems in the same design time, FPGA CAD tools need to enable faster turnaround time and higher levels of design abstraction. I will describe products and research efforts underway to address these CAD challenges, including partial reconfiguration tools that allow designers to "swap in" portions of a circuit, and system design tools that work above the HDL level.

George Ng
Senior Project Manager, Snowbush IP, A Division of Gennum
Topic:Deep sub-micron CMOS Multi-Standard SERDES for High-Speed Wireline Links

Biography:George Ng is an Analog/Mixed Signal Designer at Snowbush IP. He joined Snowbush in 2008 and has been developing high-speed SERDES in various Deep Submicron CMOS technology nodes for numerous products and standards since then. He received his B.A.Sc and M.A.Sc degrees in electrical engineering from the University of Toronto, Toronto, Canada.

Oleg Golubitsky
Software Engineer, Google
Topic:Online Advertisement and Analysis with MapReduce Tools

Biography:Oleg Golubitsky received a PhD in Mathematics from Moscow State University and a PhD in Computer Science from the University of New Brunswick. He was an assistant professor of computer science at UNB and a postdoctoral fellow at the University of Pisa, Queen's University and the University of Western Ontario. Dr. Golubitsky has published over 20 journal and conference papers in the areas of computer algebra, differential algebra, mathematical handwriting recognition, and quantum computing. He attended the World Finals of the ACM International Collegiate Programming Contest, as a team member and as a coach. Since 2009 Dr. Golubitsky is a software engineer at Google.

Olivier Trescases
Ph.D., Student Activities Chair IEEE Toronto Section
Assistant Professor, University of Toronto
Topic: TBA

Biography: Olivier Trescases completed his master's and doctoral degrees at the University of Toronto in 2007 and 2004 respectively. His Ph.D. dissertation dealt with high-efficiency, digitally controlled integrated switched-mode power supplies for portable applications. Dr. Trescases has published over 25 papers in some of the top IEEE conferences in power electronics. He received two best-paper awards and one IEEE Vehicular Technology award. From 2007 to 2009, he worked as a concept engineer and mixed-signal circuit designer at Infineon Technologies in Austria, one of the top-10 semiconductor manufacturers. While at Infineon, he designed application-specific ICs in BCD (Bipolar/CMOS/DMOS) fabrication technologies for safety-critical automotive applications, such as electronic control units for airbag modules. He is the co-inventor for one pending and two granted patents. Dr. Trescases joined the Department of Electrical and Computer Engineering as an Assistant Professor in January 2009, where he conducts research on power electronics for automotive, industrial, aerospace and photovoltaic (solar) applications. He is currently engaged in a number of research projects dealing with distributed peak power tracking for solar applications, power converters for high-brightness LEDs, battery management circuits for electric vehicles, integrated power converters and digital control schemes. He currently teaches undergraduate and graduate-level courses on advanced switched-mode power supplies. He is a member of the executive committee for the IEEE Toronto Section, where is currently serving as Student Activities Chair. He is a member of the technical committee for IPEC, the International Conference on Electronics, Circuits and Systems (ICECS) and the CMOS Emerging Technologies Workshop (CMOSET). He has experience in a wide range of topics in the field of power electronics, such as digital control, efficiency optimization, mixed-signal IC design, protection schemes, system-level modeling, device-level design, packaging, and power transistors.

Andrew Sinclair
Senior Director, Medical Devices & Physical Sciences, MaRS Innovation
Topic:Monetizing University Research

Biography: Dr. Sinclair received his Ph.D. (1986- Chemistry) and B.Sc. (1981-Chemistry & Biochemistry) from the University of Toronto. Andrew has over a quarter century of industrial experience in large and small R&D organizations. For the last decade, prior to joining MaRS Innovation, he was the vice president of a contract research, development and testing organization with over 4000 staff worldwide. He has managed contract medical device development programs (up to $15M) in areas including drug eluting stents, orthopeadic implants, drug delivery technologies, wound dressings and custom synthesis for medical applications. Andy has had technical, financial management, and business development roles and has participated in due diligence on acquisitions. For several years he ran a division providing technology consulting to investors and financial institutions on technology based businesses. One of the initial two employees at MaRS Innovation, Dr. Sinclair has been involved in everything from the assessment of initial disclosures through spinning out companies and acting as CEO.
Abstract: While Canada is recognized as being world-class in research, we fall far behind in the commercialization of that research. This talk will review the tools available to, and processes to follow, for U of T researchers in taking their brilliant ideas to a commercial success. Topics covered will include:
• Patent before disclosing – how not to lose it from the start
• You and U of T – the role of U of T's Innovations and Partnerships office
• Resources to help you advance it – MaRS Innovation and other tools
• I want to start a company – focus on success, not just starting a company.
Andrew and other MaRS Innovation staff will also be around at breaks to discuss things in more detail.

Mario Filipas
Senior Manager, Software System Engineering, AMD Technologies, Inc.
Topic:Power - Every Watt Counts in Large Amounts

Biography: Mario Filipas is a Senior Manager at AMD responsible for Software System Engineering. He leads a team of Architects and Technical Leads with ownership for cross-component domain functionality and new product introduction. During his tenure at AMD, Mario's work has ranged from the development of entire kernel level drivers as a software programmer, to the management of a multi-site, company-wide initiative to provide software support for Windows 7. If someone were to describe his working style, it would be one in which involves continuous learning with the ongoing drive to attain engagement, effectiveness and innovation from those around him.
Abstract: The management of power consumption is not only a green initiative but it is also increasingly important to consumers. This talk touches upon some of AMD's power initiatives from a software point-of-view.

James Dietrich
mm/RF Systems Engineer, CMC Microsystems
Topic:Bridging the Gap between academia and industry CMC Microsystems state-of-the-art research facilities

Biography: Mr. James Dietrich, M.Sc., P.Eng., is a mm-wave/RF engineer with CMC Microsystems' Advanced RF Systems Lab located at the University of Manitoba. He has over 10 years experience in RF design and test as well as over 5 years experience in computational electromagnetics software development and application and as an engineering consultant. He has been an instructor at the University of Manitoba's Department of Electrical and Computer Engineering and plays a strong role in both the business development and client support activities of the ARFSL.
Abstract: CMC Microsystems, for the past 27 years has been providing researchers across Canada with tools and resources to Design, Make and Test Microsystems. In this presentation, I will be highlighting services offered through the four labs of the National Microelectronics and Photonics Testing Collaboratory (NMPTC), which offers state-of-the-art equipment along with professional support to enhance the research outcome. The NMPTC operates in a national test lab paradigm, with each site having the capacity to host visiting researchers, conduct test by remote control over the internet or offer test services on behalf of the client. By engaging in a collaborative relationship of test planning, troubleshooting and support, this resource also prepares researchers to become better engineers by equipping them with the tools, techniques and test skills required for today's advanced workplaces. The NMPTC is comprised of four advanced labs in the areas of digital systems, mixed-signal systems, optoelectronics & photonics systems and mm-wave radio frequency systems. Each lab houses the specialized equipment necessary to engage in industry relevant test beyond the capabilities of most universities.

Greg Fenton
Sr. Product Manager,NexJ Systems
Topic:Model Driven Engineering: The next step in Software Development