Selected Bibliography:

This page provides a list of recent publications related to the circuit aspect of ferroelectric capacitors for nonvolatile memories. Postscript files of the publications by FRMG at the Univ. of Toronto are downloadable.

[Univ. of Toronto] Ali Sheikholeslami and P. Glenn Gulak, A survey of circuit innovations in Ferroelectric random-access memories, Proceedings of the IEEE, Vol. 88, No. 3, pp. 667-689, May 2000.

[Univ. of Toronto] Ali Sheikholeslami and P. Glenn Gulak, A survey of behavioral modeling of ferroelectric capacitors, IEEE Transactions on Ultrosonics, Ferroelectrics, and Frequency Control. Vol. 44, No. 4, pp. 917-924, July 1997. Postscript.

[Matsushita] H. Hirano, T. Honda, et. al., 2-V/100-ns 1T/1C Nonvolatile Ferroelectric Memory Architechture with Bitline-Driven Read Scheme and Nonrelaxation Reference Cell, IEEE Journal of Solid-State Circuits, Vol. 32, No. 5, pp. 649-654, May 1997.

[Hitachi] H. Fujisawa, T. Sakata, et. al., The Charge-Share Modified (CSM) Precharge-Level Architecture for High-Speed and Low-Power Ferroelectric Memory, IEEE Journal of Solid-State Circuits, Vol. 32, No. 5, pp. 655-661, May 1997.

[Univ. of Toronto] Ali Sheikholeslami and P. Glenn Gulak, Transient modeling of ferroelectric capacitors for nonvolatile memories, IEEE Transactions on Ultrosonics, Ferroelectrics, and Frequency Control, Vol. 43, No. 3, pp. 450-456, May 1996. Postscript.

[Univ. of Toronto] Ali Sheikholeslami, P. Glenn Gulak, and Takahiro Hanyu, A multiple-valued ferroelectric content-addressable memory, Proc. of the 26th int. symp. on multiple-valued logic, pp. 74-79, May 1996. Postscript.

[NEC] H. Koike, T. Otsuki, et. al., A 60ns 1Mb Nonvolatile Ferroelectric Mamory with Non-driven Cell Plate Line Write/Read Scheme, ISSCC Digest of Technical Papers, pp. 368-369, Feb. 1996.

[Rohm Co.] T. Nakamura, Y. Nakao, et. al., A Single-Transistor Ferroelectric Memory Cell, ISSCC Digest of Technical Papers, pp. 68-69, Feb. 1995.

[Matsushita] T. Sumi, N. Moriwaki, et. al., A 256kb Nonvolatile Ferroelectric Memory at 3V and 100ns, ISSCC Digest of Technical Papers, pp. 268-269, Feb. 1994.

R. Womak and D. Tolsch, A 16kb Ferroelectric Nonvolatile Memory with a Bit Parallel Architecture, ISSCC Digest of Technical Papers, pp. 242-243, Feb. 1989.


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This page is maintained by Ali Sheikholeslami. Created on July 4, 1997. Last modified on July 19, 2000.