ECE1749H - Interconnection Networks for Parallel Computer Architectures

Spring 2011
Department of Electrical and Computer Engineering
University of Toronto

Instructor:
Prof. Natalie Enright Jerger


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Project Description

There are three project options. All 3 options require that you submit a written proposal by Feb 2, 2011 (tentative). You may work in groups of two; the scope of the project must be larger for group projects.

1. Propose your own topic. Webpage will be updated with some suggested topics or stop by my office to discuss your idea.

2. Pick a recent paper (can be one we discuss in class) from a top-tier conference and validate part of its results.

3. Students enrolled in both ECE 1749H and ECE 1755H (Parallel Computer Architecture and Programming, Prof. Steffan) may do one large project that spans a topic relevant to both classes. This project option will be subject to approval by myself and Prof. Steffan.


Project Proposal (due Feb 2, 2011) worth 25% of project grade

The project proposal should be at most two pages (please be concise). You must address the following in your project proposal:

1. Topic of project. This section should also include motivation for this work. Give reasons why this project is interesting and useful from the perspective of interconnection network design.

2. Methodology and Goals. Explain how you will evaluate your proposed idea. What simulation infrastructure will you use? What benchmarks will you use? You should explain what experiments you will be performing. Justify why these experiments are relevant. If you are validating an existing study, state which parts you will validate (you do not need to validate all the results). You may also add additional experiments that were absent from the original paper; explain how these may provide additional insight.

3. Related work. If proposing a novel topic, please cite and explain some relevant related work.

This plan may evolve as you begin your implementation but you must start with a clearly articulated plan.

Progress Report (due March 9, 2011) worth 15% of project grade

E-mail a brief progress report (1 page). Discuss current status of project, any difficulties encountered and anticipated changes from original project proposal.


Final Project Presentation (due April 13, 2011) and Report (due April 22, 2011) worth 60% of project grade

The final project grade will be assigned based on both the report and the presentation. The presentation will represent 20% of the overall project grade. The final report will compose 40% of the overall project grade.

Presentation Guidelines

You will be required to give a 8 minute presentation on the last day of class (April 13) with an additional 2-3 minutes per project for questions.

Report Guidelines

Try to limit this to at most 5 pages, in 2 column conference format. Be concise and do not use all 5 pages if you do not need to.

1. Introduction: include topic of project and the motivation for this work. If proposing a novel architecture, describe your design. If re-evaluating an existing paper, describe any limitations that lead to the need to validate the previous results.

2. Methodology: how did you evaluate this project? What tools/benchmarks were used? What parameters were used to configure your design? What are the limitations of your methodology?

3. Results: present results from your experiments. If this is a novel project, explain what insights these results provide and how they compare (quantitatively or qualitatively) against prior work. If this is a validation project, explain discrepancies or similarities between your results and the results in the paper.

4. Future directions: how would you extend this project? What do your results suggest about the future of on-chip network research.


Project Resources

Suggested project ideas will be posted on the course Blackboard page in late Jan.

Interconnection Network Simulator: booksim

FPGA network simulator (Danyao Wang)


Last modified: Wed Feb 9 09:13:43 EST 2011